From: "Paul A. Clarke" <pc@us.ibm.com>
To: gcc-patches@gcc.gnu.org
Cc: segher@kernel.crashing.org
Subject: [PATCH 2/2] rs6000: Add test for _mm_minpos_epu16
Date: Wed, 2 Jun 2021 17:13:16 -0500 [thread overview]
Message-ID: <20210602221316.202627-3-pc@us.ibm.com> (raw)
In-Reply-To: <20210602221316.202627-1-pc@us.ibm.com>
Copy the test for _mm_minpos_epu16 from
gcc/testsuite/gcc.target/i386/sse4_1-phminposuw.c, with
a few adjustments:
- Adjust the dejagnu directives for powerpc platform.
- Make the data not be monotonically increasing,
such that some of the returned values are not
always the first value (index 0).
- Fix a masking issue where the index was being truncated
to 2 bits instead of 3 bits, which wasn't found because
all of the returned indicies were 0 with the original
generated data.
- Support big-endian.
2021-06-02 Paul A. Clarke <pc@us.ibm.com>
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/sse4_1-phminposuw.c: Copy from
gcc/testsuite/gcc.target/i386, make more robust.
---
.../gcc.target/powerpc/sse4_1-phminposuw.c | 63 +++++++++++++++++++
1 file changed, 63 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/powerpc/sse4_1-phminposuw.c
diff --git a/gcc/testsuite/gcc.target/powerpc/sse4_1-phminposuw.c b/gcc/testsuite/gcc.target/powerpc/sse4_1-phminposuw.c
new file mode 100644
index 000000000000..0b6318500b1e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/sse4_1-phminposuw.c
@@ -0,0 +1,63 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#define NO_WARN_X86_INTRINSICS 1
+#ifndef CHECK_H
+#define CHECK_H "sse4_1-check.h"
+#endif
+
+#ifndef TEST
+#define TEST sse4_1_test
+#endif
+
+#include CHECK_H
+
+#include <smmintrin.h>
+
+#define NUM 64
+
+static void
+TEST (void)
+{
+ union
+ {
+ __m128i x[NUM/8];
+ unsigned short s[NUM];
+ } src;
+ unsigned short minVal[NUM/8];
+ int minInd[NUM/8];
+ unsigned short minValScalar, minIndScalar;
+ int i, j;
+ union
+ {
+ int i;
+ unsigned short s[2];
+ } res;
+
+ for (i = 0; i < NUM; i++)
+ src.s[i] = i * i - 68 * i + 1200;
+
+ for (i = 0, j = 0; i < NUM; i += 8, j++)
+ {
+ res.i = _mm_cvtsi128_si32 (_mm_minpos_epu16 (src.x [i/8]));
+ minVal[j] = res.s[0];
+ minInd[j] = res.s[1] & 0b111;
+ }
+
+ for (i = 0; i < NUM; i += 8)
+ {
+ minValScalar = src.s[i];
+ minIndScalar = 0;
+
+ for (j = i + 1; j < i + 8; j++)
+ if (minValScalar > src.s[j])
+ {
+ minValScalar = src.s[j];
+ minIndScalar = j - i;
+ }
+
+ if (minValScalar != minVal[i/8] && minIndScalar != minInd[i/8])
+ abort ();
+ }
+}
--
2.27.0
next prev parent reply other threads:[~2021-06-02 22:13 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-02 22:13 [PATCH 0/2] rs6000: Add support " Paul A. Clarke
2021-06-02 22:13 ` [PATCH 1/2] " Paul A. Clarke
2021-06-03 0:27 ` Segher Boessenkool
2021-06-03 17:59 ` Paul A. Clarke
2021-06-02 22:13 ` Paul A. Clarke [this message]
2021-06-03 1:50 ` [PATCH 2/2] rs6000: Add test " Segher Boessenkool
2021-06-03 18:01 ` Paul A. Clarke
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