Re: [PATCH] rs6000: Remove unspecs for vec_mrghl[bhw]

[Segher Boessenkool <segher@kernel.crashing.org>]

Hi!

On Wed, Jun 09, 2021 at 04:03:43PM +0800, Xionghu Luo wrote:
> >>--- a/gcc/testsuite/gcc.target/powerpc/builtins-1.c
> >>+++ b/gcc/testsuite/gcc.target/powerpc/builtins-1.c
> >>@@ -317,10 +317,10 @@ int main ()
> >>  /* { dg-final { scan-assembler-times "vctuxs" 2 } } */
> >>  
> >>  /* { dg-final { scan-assembler-times "vmrghb" 4 { target be } } } */
> >>-/* { dg-final { scan-assembler-times "vmrghb" 5 { target le } } } */
> >>+/* { dg-final { scan-assembler-times "vmrghb" 6 { target le } } } */
> >>  /* { dg-final { scan-assembler-times "vmrghh" 8 } } */
> >>-/* { dg-final { scan-assembler-times "xxmrghw" 8 } } */
> >>-/* { dg-final { scan-assembler-times "xxmrglw" 8 } } */
> >>+/* { dg-final { scan-assembler-times "xxmrghw" 4 } } */
> >>+/* { dg-final { scan-assembler-times "xxmrglw" 4 } } */
> >>  /* { dg-final { scan-assembler-times "vmrglh" 8 } } */
> >>  /* { dg-final { scan-assembler-times "xxlnor" 6 } } */
> >>  /* { dg-final { scan-assembler-times {\mvpkudus\M} 1 } } */
> >>@@ -347,7 +347,7 @@ int main ()
> >>  /* { dg-final { scan-assembler-times "vspltb" 6 } } */
> >>  /* { dg-final { scan-assembler-times "vspltw" 0 } } */
> >>  /* { dg-final { scan-assembler-times "vmrgow" 8 } } */
> >>-/* { dg-final { scan-assembler-times "vmrglb" 5 { target le } } } */
> >>+/* { dg-final { scan-assembler-times "vmrglb" 4 { target le } } } */
> >>  /* { dg-final { scan-assembler-times "vmrglb" 6 { target be } } } */
> >>  /* { dg-final { scan-assembler-times "vmrgew" 8 } } */
> >>  /* { dg-final { scan-assembler-times "vsplth" 8 } } */
> >
> >Are those changes correct?  It looks like a vmrglb became a vmrghb, and
> >that 4 each of xxmrghw and xxmrglw disappeared?  Both seem wrong?
> 
> 
> This case is built with "-mdejagnu-cpu=power8 -O0 -mno-fold-gimple -dp"
> and it also counted the generated instruction patterns.
> 
> 1) "vsx_xxmrghw_v4si" is replaced by "altivec_vmrglw_direct_v4si/0", so 
> it decreases from 8 to 4. (Likewise for vsx_xxmrglw_v4si.)
> 
>         li 9,48          # 1282 [c=4 l=4]  *movdi_internal64/3
> -       lxvd2x 0,31,9    # 31   [c=8 l=4]  *vsx_lxvd2x4_le_v4si
> -       xxpermdi 0,0,0,2         # 32   [c=4 l=4]  xxswapd_v4si
> -       xxmrglw 0,0,12   # 33   [c=4 l=4]  vsx_xxmrghw_v4si
> +       lxvd2x 12,31,9   # 31   [c=8 l=4]  *vsx_lxvd2x4_le_v4si
> +       xxpermdi 12,12,12,2      # 32   [c=4 l=4]  xxswapd_v4si
> +       xxmrglw 0,12,0   # 33   [c=4 l=4]  altivec_vmrglw_direct_v4si/0
>         xxpermdi 0,0,0,2         # 35   [c=4 l=4]  xxswapd_v4sf
> 
> Note that v0 and v12 is swapped in lxvd2x, these new 3 instructions
> produces same result than before.

And there was one xxmrglw in this snippet before, and now there still
is only one.

But, the testcase uses -dp, I see.  Please use \m and \M in the scans,
it helps :-)  (And convert more than just the few that hit errors ;-) )

(You may want to do that as a separate patch before this one, to make
counting easier (also for me ;-) ),

(I'll review the new patch later today).


Segher