From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by sourceware.org (Postfix) with ESMTPS id 84C8C3840020 for ; Thu, 1 Jul 2021 06:18:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 84C8C3840020 X-IronPort-AV: E=McAfee;i="6200,9189,10031"; a="294115043" X-IronPort-AV: E=Sophos;i="5.83,313,1616482800"; d="scan'208";a="294115043" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jun 2021 23:18:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.83,313,1616482800"; d="scan'208";a="489821512" Received: from scymds01.sc.intel.com ([10.148.94.138]) by orsmga001.jf.intel.com with ESMTP; 30 Jun 2021 23:18:09 -0700 Received: from shliclel320.sh.intel.com (shliclel320.sh.intel.com [10.239.236.50]) by scymds01.sc.intel.com with ESMTP id 1616GmfR031625; Wed, 30 Jun 2021 23:18:07 -0700 From: liuhongt To: gcc-patches@gcc.gnu.org Cc: crazylht@gmail.com, hjl.tools@gmail.com, ubizjak@gmail.com, jakub@redhat.com Subject: [PATCH 48/62] AVX512FP16: Add testcase for scalar FMA instructions. Date: Thu, 1 Jul 2021 14:16:34 +0800 Message-Id: <20210701061648.9447-49-hongtao.liu@intel.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20210701061648.9447-1-hongtao.liu@intel.com> References: <20210701061648.9447-1-hongtao.liu@intel.com> X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 01 Jul 2021 06:18:13 -0000 gcc/testsuite/ChangeLog: * gcc.target/i386/avx512fp16-vfmaddXXXsh-1a.c: New test. * gcc.target/i386/avx512fp16-vfmaddXXXsh-1b.c: Ditto. * gcc.target/i386/avx512fp16-vfmsubXXXsh-1a.c: Ditto. * gcc.target/i386/avx512fp16-vfmsubXXXsh-1b.c: Ditto. * gcc.target/i386/avx512fp16-vfnmaddXXXsh-1a.c: Ditto. * gcc.target/i386/avx512fp16-vfnmaddXXXsh-1b.c: Ditto. * gcc.target/i386/avx512fp16-vfnmsubXXXsh-1a.c: Ditto. * gcc.target/i386/avx512fp16-vfnmsubXXXsh-1b.c: Ditto. --- .../i386/avx512fp16-vfmaddXXXsh-1a.c | 28 ++++++ .../i386/avx512fp16-vfmaddXXXsh-1b.c | 90 +++++++++++++++++++ .../i386/avx512fp16-vfmsubXXXsh-1a.c | 28 ++++++ .../i386/avx512fp16-vfmsubXXXsh-1b.c | 89 ++++++++++++++++++ .../i386/avx512fp16-vfnmaddXXXsh-1a.c | 32 +++++++ .../i386/avx512fp16-vfnmaddXXXsh-1b.c | 90 +++++++++++++++++++ .../i386/avx512fp16-vfnmsubXXXsh-1a.c | 28 ++++++ .../i386/avx512fp16-vfnmsubXXXsh-1b.c | 90 +++++++++++++++++++ 8 files changed, 475 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddXXXsh-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddXXXsh-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubXXXsh-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubXXXsh-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vfnmaddXXXsh-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vfnmaddXXXsh-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vfnmsubXXXsh-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vfnmsubXXXsh-1b.c diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddXXXsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddXXXsh-1a.c new file mode 100644 index 00000000000..472454d116d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddXXXsh-1a.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -O2" } */ +/* { dg-final { scan-assembler-times "vfmadd...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfmadd...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfmadd231sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfmadd...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfmadd...sh\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfmadd...sh\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfmadd231sh\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfmadd...sh\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m128h a, b, c; +volatile __mmask8 m; + +void extern +avx512f_test (void) +{ + a = _mm_fmadd_sh (a, b, c); + a = _mm_mask_fmadd_sh (a, m, b, c); + c = _mm_mask3_fmadd_sh (a, b, c, m); + a = _mm_maskz_fmadd_sh (m, a, b, c); + a = _mm_fmadd_round_sh (a, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + a = _mm_mask_fmadd_round_sh (a, m, b, c, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); + c = _mm_mask3_fmadd_round_sh (a, b, c, m, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); + a = _mm_maskz_fmadd_round_sh (m, a, b, c, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddXXXsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddXXXsh-1b.c new file mode 100644 index 00000000000..a0eca9cde3a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddXXXsh-1b.c @@ -0,0 +1,90 @@ +/* { dg-do run { target avx512fp16 } } */ +/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */ + + +#define AVX512FP16 +#include "avx512fp16-helper.h" + +#define N_ELEMS 8 + +void NOINLINE +emulate_fmadd_sh(V512 * dest, V512 op1, V512 op2, + __mmask8 k, int zero_mask, int mask3) +{ + V512 v1, v2, v3, v4, v5, v6, v7, v8; + int i; + + unpack_ph_2twops(op1, &v1, &v2); + unpack_ph_2twops(op2, &v3, &v4); + unpack_ph_2twops(*dest, &v7, &v8); + + if ((k&1) || !k) + v5.f32[0] = v1.f32[0] * v3.f32[0] + v7.f32[0]; + else if (zero_mask) + v5.f32[0] = 0; + else + v5.f32[0] = v7.f32[0]; + + for (i = 1; i < 8; i++){ + if (mask3) + v5.f32[i] = v7.f32[i]; + else + v5.f32[i] = v1.f32[i]; + } + *dest = pack_twops_2ph(v5, v6); +} + +void +test_512 (void) +{ + V512 res; + V512 exp; + + init_src(); + + init_dest(&res, &exp); + emulate_fmadd_sh(&exp, src1, src2, 0x1, 0, 0); + res.xmmh[0] = _mm_fmadd_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0]); + check_results(&res, &exp, N_ELEMS, "_mm_fmadd_sh"); + init_dest(&res, &exp); + emulate_fmadd_sh(&exp, src1, src2, 0x1, 0, 1); + res.xmmh[0] = _mm_mask3_fmadd_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0], + 0x1); + check_results(&res, &exp, N_ELEMS, "_mm_mask3_fmadd_sh"); + init_dest(&res, &exp); + emulate_fmadd_sh(&exp, src1, src2, 0x1, 0, 0); + res.xmmh[0] = _mm_mask_fmadd_sh(src1.xmmh[0], 0x1, src2.xmmh[0], + res.xmmh[0]); + check_results(&res, &exp, N_ELEMS, "_mm_mask_fmadd_sh"); + init_dest(&res, &exp); + emulate_fmadd_sh(&exp, src1, src2, 0x3, 1, 0); + res.xmmh[0] = _mm_maskz_fmadd_sh(0x3, src1.xmmh[0], src2.xmmh[0], + res.xmmh[0]); + check_results(&res, &exp, N_ELEMS, "_mm_maskz_fmadd_sh"); + + init_dest(&res, &exp); + emulate_fmadd_sh(&exp, src1, src2, 0x1, 0, 0); + res.xmmh[0] = _mm_fmadd_round_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0], + _ROUND_NINT); + check_results(&res, &exp, N_ELEMS, "_mm_fmadd_sh"); + init_dest(&res, &exp); + emulate_fmadd_sh(&exp, src1, src2, 0x1, 0, 1); + res.xmmh[0] = _mm_mask3_fmadd_round_sh(src1.xmmh[0], src2.xmmh[0], + res.xmmh[0], 0x1, _ROUND_NINT); + check_results(&res, &exp, N_ELEMS, "_mm_mask3_fmadd_sh"); + init_dest(&res, &exp); + emulate_fmadd_sh(&exp, src1, src2, 0x1, 0, 0); + res.xmmh[0] = _mm_mask_fmadd_round_sh(src1.xmmh[0], 0x1, src2.xmmh[0], + res.xmmh[0], _ROUND_NINT); + check_results(&res, &exp, N_ELEMS, "_mm_mask_fmadd_sh"); + init_dest(&res, &exp); + emulate_fmadd_sh(&exp, src1, src2, 0x3, 1, 0); + res.xmmh[0] = _mm_maskz_fmadd_round_sh(0x3, src1.xmmh[0], src2.xmmh[0], + res.xmmh[0], _ROUND_NINT); + check_results(&res, &exp, N_ELEMS, "_mm_maskz_fmadd_sh"); + + if (n_errs != 0) { + abort (); + } +} + diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubXXXsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubXXXsh-1a.c new file mode 100644 index 00000000000..335b9e21fcf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubXXXsh-1a.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -O2" } */ +/* { dg-final { scan-assembler-times "vfmsub...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfmsub...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfmsub231sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfmsub...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfmsub...sh\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfmsub...sh\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfmsub231sh\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfmsub...sh\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m128h a, b, c; +volatile __mmask8 m; + +void extern +avx512f_test (void) +{ + a = _mm_fmsub_sh (a, b, c); + a = _mm_mask_fmsub_sh (a, m, b, c); + c = _mm_mask3_fmsub_sh (a, b, c, m); + a = _mm_maskz_fmsub_sh (m, a, b, c); + a = _mm_fmsub_round_sh (a, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + a = _mm_mask_fmsub_round_sh (a, m, b, c, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); + c = _mm_mask3_fmsub_round_sh (a, b, c, m, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); + a = _mm_maskz_fmsub_round_sh (m, a, b, c, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubXXXsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubXXXsh-1b.c new file mode 100644 index 00000000000..a2563fa816e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubXXXsh-1b.c @@ -0,0 +1,89 @@ +/* { dg-do run { target avx512fp16 } } */ +/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */ + + +#define AVX512FP16 +#include "avx512fp16-helper.h" + +#define N_ELEMS 8 + +void NOINLINE +emulate_fmsub_sh(V512 * dest, V512 op1, V512 op2, + __mmask8 k, int zero_mask, int mask3) +{ + V512 v1, v2, v3, v4, v5, v6, v7, v8; + int i; + + unpack_ph_2twops(op1, &v1, &v2); + unpack_ph_2twops(op2, &v3, &v4); + unpack_ph_2twops(*dest, &v7, &v8); + + if ((k&1) || !k) + v5.f32[0] = v1.f32[0] * v3.f32[0] - v7.f32[0]; + else if (zero_mask) + v5.f32[0] = 0; + else + v5.f32[0] = v7.f32[0]; + for (i = 1; i < 8; i++){ + if (mask3) + v5.f32[i] = v7.f32[i]; + else + v5.f32[i] = v1.f32[i]; + } + *dest = pack_twops_2ph(v5, v6); +} + +void +test_512 (void) +{ + V512 res; + V512 exp; + + init_src(); + init_dest(&res, &exp); + emulate_fmsub_sh(&exp, src1, src2, 0x1, 0, 0); + res.xmmh[0] = _mm_fmsub_sh(src1.xmmh[0], + src2.xmmh[0], res.xmmh[0]); + check_results(&res, &exp, N_ELEMS, "_mm_fmsub_sh"); + init_dest(&res, &exp); + emulate_fmsub_sh(&exp, src1, src2, 0x1, 0, 1); + res.xmmh[0] = _mm_mask3_fmsub_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0], + 0x1); + check_results(&res, &exp, N_ELEMS, "_mm_mask3_fmsub_sh"); + init_dest(&res, &exp); + emulate_fmsub_sh(&exp, src1, src2, 0x1, 0, 0); + res.xmmh[0] = _mm_mask_fmsub_sh(src1.xmmh[0], 0x1, src2.xmmh[0], res.xmmh[0]); + check_results(&res, &exp, N_ELEMS, "_mm_mask_fmsub_sh"); + init_dest(&res, &exp); + emulate_fmsub_sh(&exp, src1, src2, 0x3, 1, 0); + res.xmmh[0] = _mm_maskz_fmsub_sh(0x3, src1.xmmh[0], src2.xmmh[0], + res.xmmh[0]); + check_results(&res, &exp, N_ELEMS, "_mm_maskz_fmsub_sh"); + + init_dest(&res, &exp); + emulate_fmsub_sh(&exp, src1, src2, 0x1, 0, 0); + res.xmmh[0] = _mm_fmsub_round_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0], + _ROUND_NINT); + check_results(&res, &exp, N_ELEMS, "_mm_fmsub_sh"); + init_dest(&res, &exp); + emulate_fmsub_sh(&exp, src1, src2, 0x1, 0, 1); + res.xmmh[0] = _mm_mask3_fmsub_round_sh(src1.xmmh[0], src2.xmmh[0], + res.xmmh[0], 0x1, _ROUND_NINT); + check_results(&res, &exp, N_ELEMS, "_mm_mask3_fmsub_sh"); + init_dest(&res, &exp); + emulate_fmsub_sh(&exp, src1, src2, 0x1, 0, 0); + res.xmmh[0] = _mm_mask_fmsub_round_sh(src1.xmmh[0], 0x1, src2.xmmh[0], + res.xmmh[0], _ROUND_NINT); + check_results(&res, &exp, N_ELEMS, "_mm_mask_fmsub_sh"); + init_dest(&res, &exp); + emulate_fmsub_sh(&exp, src1, src2, 0x3, 1, 0); + res.xmmh[0] = _mm_maskz_fmsub_round_sh(0x3, src1.xmmh[0], src2.xmmh[0], + res.xmmh[0], _ROUND_NINT); + check_results(&res, &exp, N_ELEMS, "_mm_maskz_fmsub_sh"); + + + if (n_errs != 0) { + abort (); + } +} + diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmaddXXXsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmaddXXXsh-1a.c new file mode 100644 index 00000000000..77106aaeecb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmaddXXXsh-1a.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -O2" } */ +/* { dg-final { scan-assembler-times "vfnmadd...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmadd...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfnmadd231sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmadd...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmadd...sh\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmadd...sh\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmadd231sh\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmadd...sh\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m128h a, b, c; +volatile __mmask8 m; + +void extern +avx512f_test (void) +{ + a = _mm_fnmadd_sh (a, b, c); + a = _mm_mask_fnmadd_sh (a, m, b, c); + c = _mm_mask3_fnmadd_sh (a, b, c, m); + a = _mm_maskz_fnmadd_sh (m, a, b, c); + a = _mm_fnmadd_round_sh (a, b, c, _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); + a = _mm_mask_fnmadd_round_sh (a, m, b, c, _MM_FROUND_TO_NEG_INF + | _MM_FROUND_NO_EXC); + c = _mm_mask3_fnmadd_round_sh (a, b, c, m, _MM_FROUND_TO_POS_INF + | _MM_FROUND_NO_EXC); + a = _mm_maskz_fnmadd_round_sh (m, a, b, c, _MM_FROUND_TO_ZERO + | _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmaddXXXsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmaddXXXsh-1b.c new file mode 100644 index 00000000000..92001508424 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmaddXXXsh-1b.c @@ -0,0 +1,90 @@ +/* { dg-do run { target avx512fp16 } } */ +/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */ + + +#define AVX512FP16 +#include "avx512fp16-helper.h" + +#define N_ELEMS 8 + +void NOINLINE +emulate_fnmadd_sh(V512 * dest, V512 op1, V512 op2, + __mmask8 k, int zero_mask, int mask3) +{ + V512 v1, v2, v3, v4, v5, v6, v7, v8; + int i; + + unpack_ph_2twops(op1, &v1, &v2); + unpack_ph_2twops(op2, &v3, &v4); + unpack_ph_2twops(*dest, &v7, &v8); + + if ((k&1) || !k) + v5.f32[0] = -(v1.f32[0] * v3.f32[0]) + v7.f32[0]; + else if (zero_mask) + v5.f32[0] = 0; + else + v5.f32[0] = v7.f32[0]; + + for (i = 1; i < 8; i++){ + if (mask3) + v5.f32[i] = v7.f32[i]; + else + v5.f32[i] = v1.f32[i]; + } + *dest = pack_twops_2ph(v5, v6); +} + +void +test_512 (void) +{ + V512 res; + V512 exp; + + init_src(); + + init_dest(&res, &exp); + emulate_fnmadd_sh(&exp, src1, src2, 0x1, 0, 0); + res.xmmh[0] = _mm_fnmadd_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0]); + check_results(&res, &exp, N_ELEMS, "_mm_fnmadd_sh"); + init_dest(&res, &exp); + emulate_fnmadd_sh(&exp, src1, src2, 0x1, 0, 1); + res.xmmh[0] = _mm_mask3_fnmadd_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0], + 0x1); + check_results(&res, &exp, N_ELEMS, "_mm_mask3_fnmadd_sh"); + init_dest(&res, &exp); + emulate_fnmadd_sh(&exp, src1, src2, 0x1, 0, 0); + res.xmmh[0] = _mm_mask_fnmadd_sh(src1.xmmh[0], 0x1, src2.xmmh[0], + res.xmmh[0]); + check_results(&res, &exp, N_ELEMS, "_mm_mask_fnmadd_sh"); + init_dest(&res, &exp); + emulate_fnmadd_sh(&exp, src1, src2, 0x3, 1, 0); + res.xmmh[0] = _mm_maskz_fnmadd_sh(0x3, src1.xmmh[0], src2.xmmh[0], + res.xmmh[0]); + check_results(&res, &exp, N_ELEMS, "_mm_maskz_fnmadd_sh"); + + init_dest(&res, &exp); + emulate_fnmadd_sh(&exp, src1, src2, 0x1, 0, 0); + res.xmmh[0] = _mm_fnmadd_round_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0], + _ROUND_NINT); + check_results(&res, &exp, N_ELEMS, "_mm_fnmadd_sh"); + init_dest(&res, &exp); + emulate_fnmadd_sh(&exp, src1, src2, 0x1, 0, 1); + res.xmmh[0] = _mm_mask3_fnmadd_round_sh(src1.xmmh[0], src2.xmmh[0], + res.xmmh[0], 0x1, _ROUND_NINT); + check_results(&res, &exp, N_ELEMS, "_mm_mask3_fnmadd_sh"); + init_dest(&res, &exp); + emulate_fnmadd_sh(&exp, src1, src2, 0x1, 0, 0); + res.xmmh[0] = _mm_mask_fnmadd_round_sh(src1.xmmh[0], 0x1, src2.xmmh[0], + res.xmmh[0], _ROUND_NINT); + check_results(&res, &exp, N_ELEMS, "_mm_mask_fnmadd_sh"); + init_dest(&res, &exp); + emulate_fnmadd_sh(&exp, src1, src2, 0x3, 1, 0); + res.xmmh[0] = _mm_maskz_fnmadd_round_sh(0x3, src1.xmmh[0], src2.xmmh[0], + res.xmmh[0], _ROUND_NINT); + check_results(&res, &exp, N_ELEMS, "_mm_maskz_fnmadd_sh"); + + if (n_errs != 0) { + abort (); + } +} + diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmsubXXXsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmsubXXXsh-1a.c new file mode 100644 index 00000000000..5d1460838e7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmsubXXXsh-1a.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -O2" } */ +/* { dg-final { scan-assembler-times "vfnmsub...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmsub...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfnmsub231sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmsub...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmsub...sh\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmsub...sh\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmsub231sh\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfnmsub...sh\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m128h a, b, c; +volatile __mmask8 m; + +void extern +avx512f_test (void) +{ + a = _mm_fnmsub_sh (a, b, c); + a = _mm_mask_fnmsub_sh (a, m, b, c); + c = _mm_mask3_fnmsub_sh (a, b, c, m); + a = _mm_maskz_fnmsub_sh (m, a, b, c); + a = _mm_fnmsub_round_sh (a, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + a = _mm_mask_fnmsub_round_sh (a, m, b, c, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); + c = _mm_mask3_fnmsub_round_sh (a, b, c, m, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); + a = _mm_maskz_fnmsub_round_sh (m, a, b, c, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmsubXXXsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmsubXXXsh-1b.c new file mode 100644 index 00000000000..7bdb861425f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmsubXXXsh-1b.c @@ -0,0 +1,90 @@ +/* { dg-do run { target avx512fp16 } } */ +/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */ + + +#define AVX512FP16 +#include "avx512fp16-helper.h" + +#define N_ELEMS 8 + +void NOINLINE +emulate_fnmsub_sh(V512 * dest, V512 op1, V512 op2, + __mmask8 k, int zero_mask, int mask3) +{ + V512 v1, v2, v3, v4, v5, v6, v7, v8; + int i; + + unpack_ph_2twops(op1, &v1, &v2); + unpack_ph_2twops(op2, &v3, &v4); + unpack_ph_2twops(*dest, &v7, &v8); + + if ((k&1) || !k) + v5.f32[0] = -(v1.f32[0] * v3.f32[0]) - v7.f32[0]; + else if (zero_mask) + v5.f32[0] = 0; + else + v5.f32[0] = v7.f32[0]; + + for (i = 1; i < 8; i++){ + if (mask3) + v5.f32[i] = v7.f32[i]; + else + v5.f32[i] = v1.f32[i]; + } + *dest = pack_twops_2ph(v5, v6); +} + +void +test_512 (void) +{ + V512 res; + V512 exp; + + init_src(); + + init_dest(&res, &exp); + emulate_fnmsub_sh(&exp, src1, src2, 0x1, 0, 0); + res.xmmh[0] = _mm_fnmsub_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0]); + check_results(&res, &exp, N_ELEMS, "_mm_fnmsub_sh"); + init_dest(&res, &exp); + emulate_fnmsub_sh(&exp, src1, src2, 0x1, 0, 1); + res.xmmh[0] = _mm_mask3_fnmsub_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0], + 0x1); + check_results(&res, &exp, N_ELEMS, "_mm_mask3_fnmsub_sh"); + init_dest(&res, &exp); + emulate_fnmsub_sh(&exp, src1, src2, 0x1, 0, 0); + res.xmmh[0] = _mm_mask_fnmsub_sh(src1.xmmh[0], 0x1, src2.xmmh[0], + res.xmmh[0]); + check_results(&res, &exp, N_ELEMS, "_mm_mask_fnmsub_sh"); + init_dest(&res, &exp); + emulate_fnmsub_sh(&exp, src1, src2, 0x3, 1, 0); + res.xmmh[0] = _mm_maskz_fnmsub_sh(0x3, src1.xmmh[0], src2.xmmh[0], + res.xmmh[0]); + check_results(&res, &exp, N_ELEMS, "_mm_maskz_fnmsub_sh"); + + init_dest(&res, &exp); + emulate_fnmsub_sh(&exp, src1, src2, 0x1, 0, 0); + res.xmmh[0] = _mm_fnmsub_round_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0], + _ROUND_NINT); + check_results(&res, &exp, N_ELEMS, "_mm_fnmsub_sh"); + init_dest(&res, &exp); + emulate_fnmsub_sh(&exp, src1, src2, 0x1, 0, 1); + res.xmmh[0] = _mm_mask3_fnmsub_round_sh(src1.xmmh[0], src2.xmmh[0], + res.xmmh[0], 0x1, _ROUND_NINT); + check_results(&res, &exp, N_ELEMS, "_mm_mask3_fnmsub_sh"); + init_dest(&res, &exp); + emulate_fnmsub_sh(&exp, src1, src2, 0x1, 0, 0); + res.xmmh[0] = _mm_mask_fnmsub_round_sh(src1.xmmh[0], 0x1, src2.xmmh[0], + res.xmmh[0], _ROUND_NINT); + check_results(&res, &exp, N_ELEMS, "_mm_mask_fnmsub_sh"); + init_dest(&res, &exp); + emulate_fnmsub_sh(&exp, src1, src2, 0x3, 1, 0); + res.xmmh[0] = _mm_maskz_fnmsub_round_sh(0x3, src1.xmmh[0], src2.xmmh[0], + res.xmmh[0], _ROUND_NINT); + check_results(&res, &exp, N_ELEMS, "_mm_maskz_fnmsub_sh"); + + if (n_errs != 0) { + abort (); + } +} + -- 2.18.1