Re: [PATCH] docs: Add 'S' to Machine Constraints for RISC-V

[Fangrui Song <i@maskray.me>]

On 2021-07-02, Kito Cheng wrote:
>It was undocument before, but already used in linux kernel, so LLVM
>community suggest we should document that, so that make it become
>supported/documented/non-internal machine constraints.
>
>gcc/ChangeLog:
>
>	PR target/101275
>	* doc/md.text (Machine Constraints): Document the 'S' constraints
>	for RISC-V.
>---
> gcc/doc/md.texi | 3 +++
> 1 file changed, 3 insertions(+)
>
>diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
>index 00caf3844cc..b776623e8a5 100644
>--- a/gcc/doc/md.texi
>+++ b/gcc/doc/md.texi
>@@ -3536,6 +3536,9 @@ A 5-bit unsigned immediate for CSR access instructions.
> @item A
> An address that is held in a general-purpose register.
>
>+@item S
>+A constant call address.
>+
> @end table
>
> @item RX---@file{config/rx/constraints.md}
>-- 
>2.31.1
>

Thanks for the patch!

To clarify, 'S' is used by the aarch64 port of the Linux kernel.
(https://github.com/ClangBuiltLinux/linux/issues/13)

It was proposed as one way to make  __vdso_rt_sigreturn in
arch/riscv/kernel/signal.c less hacky but we have agreed that riscv
should just use the existing mechanism (e.g.
arch/arm64/kernel/vdso/gen_vdso_offsets.sh) as used by a few other
ports.

That said, 'S' is still useful as it enables flexible modifiers (e.g.
`%got_pcrel_hi, %pcrel_hi`) in inline asm.