* [PATCH] docs: Add 'S' to Machine Constraints for RISC-V
@ 2021-07-02 2:30 Kito Cheng
2021-07-02 3:15 ` Fangrui Song
2021-07-07 23:26 ` Fangrui Song
0 siblings, 2 replies; 4+ messages in thread
From: Kito Cheng @ 2021-07-02 2:30 UTC (permalink / raw)
To: gcc-patches, kito.cheng, jimw, i; +Cc: Kito Cheng
It was undocument before, but already used in linux kernel, so LLVM
community suggest we should document that, so that make it become
supported/documented/non-internal machine constraints.
gcc/ChangeLog:
PR target/101275
* doc/md.text (Machine Constraints): Document the 'S' constraints
for RISC-V.
---
gcc/doc/md.texi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 00caf3844cc..b776623e8a5 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -3536,6 +3536,9 @@ A 5-bit unsigned immediate for CSR access instructions.
@item A
An address that is held in a general-purpose register.
+@item S
+A constant call address.
+
@end table
@item RX---@file{config/rx/constraints.md}
--
2.31.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] docs: Add 'S' to Machine Constraints for RISC-V
2021-07-02 2:30 [PATCH] docs: Add 'S' to Machine Constraints for RISC-V Kito Cheng
@ 2021-07-02 3:15 ` Fangrui Song
2021-07-07 23:26 ` Fangrui Song
1 sibling, 0 replies; 4+ messages in thread
From: Fangrui Song @ 2021-07-02 3:15 UTC (permalink / raw)
To: Kito Cheng; +Cc: gcc-patches, kito.cheng, jimw
On 2021-07-02, Kito Cheng wrote:
>It was undocument before, but already used in linux kernel, so LLVM
>community suggest we should document that, so that make it become
>supported/documented/non-internal machine constraints.
>
>gcc/ChangeLog:
>
> PR target/101275
> * doc/md.text (Machine Constraints): Document the 'S' constraints
> for RISC-V.
>---
> gcc/doc/md.texi | 3 +++
> 1 file changed, 3 insertions(+)
>
>diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
>index 00caf3844cc..b776623e8a5 100644
>--- a/gcc/doc/md.texi
>+++ b/gcc/doc/md.texi
>@@ -3536,6 +3536,9 @@ A 5-bit unsigned immediate for CSR access instructions.
> @item A
> An address that is held in a general-purpose register.
>
>+@item S
>+A constant call address.
>+
> @end table
>
> @item RX---@file{config/rx/constraints.md}
>--
>2.31.1
>
Thanks for the patch!
To clarify, 'S' is used by the aarch64 port of the Linux kernel.
(https://github.com/ClangBuiltLinux/linux/issues/13)
It was proposed as one way to make __vdso_rt_sigreturn in
arch/riscv/kernel/signal.c less hacky but we have agreed that riscv
should just use the existing mechanism (e.g.
arch/arm64/kernel/vdso/gen_vdso_offsets.sh) as used by a few other
ports.
That said, 'S' is still useful as it enables flexible modifiers (e.g.
`%got_pcrel_hi, %pcrel_hi`) in inline asm.
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] docs: Add 'S' to Machine Constraints for RISC-V
2021-07-02 2:30 [PATCH] docs: Add 'S' to Machine Constraints for RISC-V Kito Cheng
2021-07-02 3:15 ` Fangrui Song
@ 2021-07-07 23:26 ` Fangrui Song
2021-07-08 1:02 ` Palmer Dabbelt
1 sibling, 1 reply; 4+ messages in thread
From: Fangrui Song @ 2021-07-07 23:26 UTC (permalink / raw)
To: Kito Cheng; +Cc: gcc-patches, kito.cheng, jimw
On 2021-07-02, Kito Cheng wrote:
>It was undocument before, but already used in linux kernel, so LLVM
>community suggest we should document that, so that make it become
>supported/documented/non-internal machine constraints.
>
>gcc/ChangeLog:
>
> PR target/101275
> * doc/md.text (Machine Constraints): Document the 'S' constraints
> for RISC-V.
>---
> gcc/doc/md.texi | 3 +++
> 1 file changed, 3 insertions(+)
>
>diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
>index 00caf3844cc..b776623e8a5 100644
>--- a/gcc/doc/md.texi
>+++ b/gcc/doc/md.texi
>@@ -3536,6 +3536,9 @@ A 5-bit unsigned immediate for CSR access instructions.
> @item A
> An address that is held in a general-purpose register.
>
>+@item S
>+A constant call address.
>+
> @end table
>
> @item RX---@file{config/rx/constraints.md}
>--
>2.31.1
>
Ping on this:)
'S' can be used on either a variable or a function. Does "A constant call address." need change?
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] docs: Add 'S' to Machine Constraints for RISC-V
2021-07-07 23:26 ` Fangrui Song
@ 2021-07-08 1:02 ` Palmer Dabbelt
0 siblings, 0 replies; 4+ messages in thread
From: Palmer Dabbelt @ 2021-07-08 1:02 UTC (permalink / raw)
To: i; +Cc: kito.cheng, gcc-patches, Kito Cheng
On Wed, 07 Jul 2021 16:26:25 PDT (-0700), i@maskray.me wrote:
> On 2021-07-02, Kito Cheng wrote:
>>It was undocument before, but already used in linux kernel, so LLVM
>>community suggest we should document that, so that make it become
>>supported/documented/non-internal machine constraints.
>>
>>gcc/ChangeLog:
>>
>> PR target/101275
>> * doc/md.text (Machine Constraints): Document the 'S' constraints
>> for RISC-V.
>>---
>> gcc/doc/md.texi | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>>diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
>>index 00caf3844cc..b776623e8a5 100644
>>--- a/gcc/doc/md.texi
>>+++ b/gcc/doc/md.texi
>>@@ -3536,6 +3536,9 @@ A 5-bit unsigned immediate for CSR access instructions.
>> @item A
>> An address that is held in a general-purpose register.
>>
>>+@item S
>>+A constant call address.
>>+
>> @end table
>>
>> @item RX---@file{config/rx/constraints.md}
>>--
>>2.31.1
>>
>
> Ping on this:)
Thanks, I hadn't had time to look a this but it was on the list.
> 'S' can be used on either a variable or a function. Does "A constant call address." need change?
I think so: this can certainly be used to generate arbitrary constant
addresses into assembly, but I don't remember if there was some reason
it was listed as only applying to call addresses. It certainly could
just be a historical artifact, as those strings tend to bit rot when
they're internal, but I wanted to at least take a look.
Also: IIUC we're supposed to remove the @internal when something is
documented (though I remember having said that before, so I might be
mistaken).
^ permalink raw reply [flat|nested] 4+ messages in thread
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2021-07-02 2:30 [PATCH] docs: Add 'S' to Machine Constraints for RISC-V Kito Cheng
2021-07-02 3:15 ` Fangrui Song
2021-07-07 23:26 ` Fangrui Song
2021-07-08 1:02 ` Palmer Dabbelt
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