* Repost: [PATCH] PR 100167: Fix vector long long multiply/divide tests on power10
@ 2021-07-07 20:04 Michael Meissner
2021-07-11 19:55 ` Bill Schmidt
0 siblings, 1 reply; 7+ messages in thread
From: Michael Meissner @ 2021-07-07 20:04 UTC (permalink / raw)
To: gcc-patches, Michael Meissner, Segher Boessenkool,
David Edelsohn, Bill Schmidt, Peter Bergner, Will Schmidt
[PATCH] PR 100167: Fix vector long long multiply/divide tests on power10.
This patch updates the vector long long multiply and divide tests to
supply the correct code information if power10 code generation is used.
2021-07-07 Michael Meissner <meissner@linux.ibm.com>
gcc/testsuite/
PR testsuite/100167
* gcc.target/powerpc/fold-vec-div-longlong.c:
* gcc.target/powerpc/fold-vec-mult-longlong.c: Fix expected code
generation on power10.
---
gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c | 7 +++++--
gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c | 3 ++-
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
index 312e984d3cc..f6a9b290ae5 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
@@ -19,5 +19,8 @@ test6 (vector unsigned long long x, vector unsigned long long y)
{
return vec_div (x, y);
}
-/* { dg-final { scan-assembler-times {\mdivd\M} 2 } } */
-/* { dg-final { scan-assembler-times {\mdivdu\M} 2 } } */
+
+/* { dg-final { scan-assembler-times {\mdivd\M} 2 { target { ! has_arch_pwr10 } } } } */
+/* { dg-final { scan-assembler-times {\mdivdu\M} 2 { target { ! has_arch_pwr10 } } } } */
+/* { dg-final { scan-assembler-times {\mvdivsd\M} 1 { target { has_arch_pwr10 } } } } */
+/* { dg-final { scan-assembler-times {\mvdivud\M} 1 { target { has_arch_pwr10 } } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
index 38dba9f5023..bd210e34801 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
@@ -20,5 +20,6 @@ test6 (vector unsigned long long x, vector unsigned long long y)
return vec_mul (x, y);
}
-/* { dg-final { scan-assembler-times "\[ \t\]mulld " 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mmulld\M} 4 { target { lp64 && { ! has_arch_pwr10 } } } } } */
+/* { dg-final { scan-assembler-times {\mvmulld\M} 2 { target { has_arch_pwr10 } } } } */
--
2.31.1
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.ibm.com, phone: +1 (978) 899-4797
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: Repost: [PATCH] PR 100167: Fix vector long long multiply/divide tests on power10
2021-07-07 20:04 Repost: [PATCH] PR 100167: Fix vector long long multiply/divide tests on power10 Michael Meissner
@ 2021-07-11 19:55 ` Bill Schmidt
2021-07-12 17:16 ` Michael Meissner
0 siblings, 1 reply; 7+ messages in thread
From: Bill Schmidt @ 2021-07-11 19:55 UTC (permalink / raw)
To: Michael Meissner, gcc-patches, Segher Boessenkool,
David Edelsohn, Peter Bergner, Will Schmidt
Hi Mike,
On 7/7/21 3:04 PM, Michael Meissner wrote:
> [PATCH] PR 100167: Fix vector long long multiply/divide tests on power10.
>
> This patch updates the vector long long multiply and divide tests to
> supply the correct code information if power10 code generation is used.
>
> 2021-07-07 Michael Meissner <meissner@linux.ibm.com>
>
> gcc/testsuite/
> PR testsuite/100167
> * gcc.target/powerpc/fold-vec-div-longlong.c:
Missing information after colon.
> * gcc.target/powerpc/fold-vec-mult-longlong.c: Fix expected code
> generation on power10.
> ---
> gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c | 7 +++++--
> gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c | 3 ++-
> 2 files changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
> index 312e984d3cc..f6a9b290ae5 100644
> --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
> +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
> @@ -19,5 +19,8 @@ test6 (vector unsigned long long x, vector unsigned long long y)
> {
> return vec_div (x, y);
> }
> -/* { dg-final { scan-assembler-times {\mdivd\M} 2 } } */
> -/* { dg-final { scan-assembler-times {\mdivdu\M} 2 } } */
> +
> +/* { dg-final { scan-assembler-times {\mdivd\M} 2 { target { ! has_arch_pwr10 } } } } */
> +/* { dg-final { scan-assembler-times {\mdivdu\M} 2 { target { ! has_arch_pwr10 } } } } */
> +/* { dg-final { scan-assembler-times {\mvdivsd\M} 1 { target { has_arch_pwr10 } } } } */
> +/* { dg-final { scan-assembler-times {\mvdivud\M} 1 { target { has_arch_pwr10 } } } } */
> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
> index 38dba9f5023..bd210e34801 100644
> --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
> +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
> @@ -20,5 +20,6 @@ test6 (vector unsigned long long x, vector unsigned long long y)
> return vec_mul (x, y);
> }
>
> -/* { dg-final { scan-assembler-times "\[ \t\]mulld " 4 { target lp64 } } } */
> +/* { dg-final { scan-assembler-times {\mmulld\M} 4 { target { lp64 && { ! has_arch_pwr10 } } } } } */
> +/* { dg-final { scan-assembler-times {\mvmulld\M} 2 { target { has_arch_pwr10 } } } } */
>
Shouldn't this last be { lp64 && has_arch_pwr10 } ?
Otherwise LGTM. I can't approve, but recommend approval with those changes.
Thanks,
Bill
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: Repost: [PATCH] PR 100167: Fix vector long long multiply/divide tests on power10
2021-07-11 19:55 ` Bill Schmidt
@ 2021-07-12 17:16 ` Michael Meissner
2021-07-12 17:47 ` Bill Schmidt
0 siblings, 1 reply; 7+ messages in thread
From: Michael Meissner @ 2021-07-12 17:16 UTC (permalink / raw)
To: Bill Schmidt
Cc: Michael Meissner, gcc-patches, Segher Boessenkool,
David Edelsohn, Peter Bergner, Will Schmidt
On Sun, Jul 11, 2021 at 02:55:04PM -0500, Bill Schmidt wrote:
> Hi Mike,
>
> On 7/7/21 3:04 PM, Michael Meissner wrote:
> >[PATCH] PR 100167: Fix vector long long multiply/divide tests on power10.
> >
> >This patch updates the vector long long multiply and divide tests to
> >supply the correct code information if power10 code generation is used.
> >
> >2021-07-07 Michael Meissner <meissner@linux.ibm.com>
> >
> >gcc/testsuite/
> > PR testsuite/100167
> > * gcc.target/powerpc/fold-vec-div-longlong.c:
> Missing information after colon.
Because all of the changes were the same thing, and the line is long enough. I
just grouped all of the files together, and put the change line as the last
entry.
> > * gcc.target/powerpc/fold-vec-mult-longlong.c: Fix expected code
> > generation on power10.
> >---
> > gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c | 7 +++++--
> > gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c | 3 ++-
> > 2 files changed, 7 insertions(+), 3 deletions(-)
> >
> >diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
> >index 312e984d3cc..f6a9b290ae5 100644
> >--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
> >+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
> >@@ -19,5 +19,8 @@ test6 (vector unsigned long long x, vector unsigned long long y)
> > {
> > return vec_div (x, y);
> > }
> >-/* { dg-final { scan-assembler-times {\mdivd\M} 2 } } */
> >-/* { dg-final { scan-assembler-times {\mdivdu\M} 2 } } */
> >+
> >+/* { dg-final { scan-assembler-times {\mdivd\M} 2 { target { ! has_arch_pwr10 } } } } */
> >+/* { dg-final { scan-assembler-times {\mdivdu\M} 2 { target { ! has_arch_pwr10 } } } } */
> >+/* { dg-final { scan-assembler-times {\mvdivsd\M} 1 { target { has_arch_pwr10 } } } } */
> >+/* { dg-final { scan-assembler-times {\mvdivud\M} 1 { target { has_arch_pwr10 } } } } */
> >diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
> >index 38dba9f5023..bd210e34801 100644
> >--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
> >+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
> >@@ -20,5 +20,6 @@ test6 (vector unsigned long long x, vector unsigned long long y)
> > return vec_mul (x, y);
> > }
> >-/* { dg-final { scan-assembler-times "\[ \t\]mulld " 4 { target lp64 } } } */
> >+/* { dg-final { scan-assembler-times {\mmulld\M} 4 { target { lp64 && { ! has_arch_pwr10 } } } } } */
> >+/* { dg-final { scan-assembler-times {\mvmulld\M} 2 { target { has_arch_pwr10 } } } } */
>
> Shouldn't this last be { lp64 && has_arch_pwr10 } ?
Nope. Because the power10 vector multiply is done in the vector unit, it can
generate the vmulld instruction.
> Otherwise LGTM. I can't approve, but recommend approval with those changes.
>
> Thanks,
> Bill
>
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.ibm.com, phone: +1 (978) 899-4797
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: Repost: [PATCH] PR 100167: Fix vector long long multiply/divide tests on power10
2021-07-12 17:16 ` Michael Meissner
@ 2021-07-12 17:47 ` Bill Schmidt
2021-07-12 18:13 ` Bill Schmidt
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Bill Schmidt @ 2021-07-12 17:47 UTC (permalink / raw)
To: Michael Meissner, gcc-patches, Segher Boessenkool,
David Edelsohn, Peter Bergner, Will Schmidt
On 7/12/21 12:16 PM, Michael Meissner wrote:
> On Sun, Jul 11, 2021 at 02:55:04PM -0500, Bill Schmidt wrote:
>> Hi Mike,
>>
>> On 7/7/21 3:04 PM, Michael Meissner wrote:
>>> [PATCH] PR 100167: Fix vector long long multiply/divide tests on power10.
>>>
>>> This patch updates the vector long long multiply and divide tests to
>>> supply the correct code information if power10 code generation is used.
>>>
>>> 2021-07-07 Michael Meissner <meissner@linux.ibm.com>
>>>
>>> gcc/testsuite/
>>> PR testsuite/100167
>>> * gcc.target/powerpc/fold-vec-div-longlong.c:
>> Missing information after colon.
> Because all of the changes were the same thing, and the line is long enough. I
> just grouped all of the files together, and put the change line as the last
> entry.
But that's not accepted style. Put it after the first one and use
"Likewise" is the usual thing. This looks like an omission.
>
>>> * gcc.target/powerpc/fold-vec-mult-longlong.c: Fix expected code
>>> generation on power10.
>>> ---
>>> gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c | 7 +++++--
>>> gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c | 3 ++-
>>> 2 files changed, 7 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
>>> index 312e984d3cc..f6a9b290ae5 100644
>>> --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
>>> +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
>>> @@ -19,5 +19,8 @@ test6 (vector unsigned long long x, vector unsigned long long y)
>>> {
>>> return vec_div (x, y);
>>> }
>>> -/* { dg-final { scan-assembler-times {\mdivd\M} 2 } } */
>>> -/* { dg-final { scan-assembler-times {\mdivdu\M} 2 } } */
>>> +
>>> +/* { dg-final { scan-assembler-times {\mdivd\M} 2 { target { ! has_arch_pwr10 } } } } */
>>> +/* { dg-final { scan-assembler-times {\mdivdu\M} 2 { target { ! has_arch_pwr10 } } } } */
>>> +/* { dg-final { scan-assembler-times {\mvdivsd\M} 1 { target { has_arch_pwr10 } } } } */
>>> +/* { dg-final { scan-assembler-times {\mvdivud\M} 1 { target { has_arch_pwr10 } } } } */
>>> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
>>> index 38dba9f5023..bd210e34801 100644
>>> --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
>>> +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
>>> @@ -20,5 +20,6 @@ test6 (vector unsigned long long x, vector unsigned long long y)
>>> return vec_mul (x, y);
>>> }
>>> -/* { dg-final { scan-assembler-times "\[ \t\]mulld " 4 { target lp64 } } } */
>>> +/* { dg-final { scan-assembler-times {\mmulld\M} 4 { target { lp64 && { ! has_arch_pwr10 } } } } } */
>>> +/* { dg-final { scan-assembler-times {\mvmulld\M} 2 { target { has_arch_pwr10 } } } } */
>> Shouldn't this last be { lp64 && has_arch_pwr10 } ?
> Nope. Because the power10 vector multiply is done in the vector unit, it can
> generate the vmulld instruction.
Please document this, then.
Thanks,
Bill
>
>> Otherwise LGTM. I can't approve, but recommend approval with those changes.
>>
>> Thanks,
>> Bill
>>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: Repost: [PATCH] PR 100167: Fix vector long long multiply/divide tests on power10
2021-07-12 17:47 ` Bill Schmidt
@ 2021-07-12 18:13 ` Bill Schmidt
2021-07-12 19:45 ` David Edelsohn
2021-07-12 22:00 ` Segher Boessenkool
2 siblings, 0 replies; 7+ messages in thread
From: Bill Schmidt @ 2021-07-12 18:13 UTC (permalink / raw)
To: gcc-patches
On 7/12/21 12:47 PM, Bill Schmidt via Gcc-patches wrote:
>
> On 7/12/21 12:16 PM, Michael Meissner wrote:
>> On Sun, Jul 11, 2021 at 02:55:04PM -0500, Bill Schmidt wrote:
>>> Hi Mike,
>>>
>>> On 7/7/21 3:04 PM, Michael Meissner wrote:
>>>> [PATCH] PR 100167: Fix vector long long multiply/divide tests on
>>>> power10.
>>>>
>>>> This patch updates the vector long long multiply and divide tests to
>>>> supply the correct code information if power10 code generation is
>>>> used.
>>>>
>>>> 2021-07-07 Michael Meissner <meissner@linux.ibm.com>
>>>>
>>>> gcc/testsuite/
>>>> PR testsuite/100167
>>>> * gcc.target/powerpc/fold-vec-div-longlong.c:
>>> Missing information after colon.
>> Because all of the changes were the same thing, and the line is long
>> enough. I
>> just grouped all of the files together, and put the change line as
>> the last
>> entry.
> But that's not accepted style. Put it after the first one and use
> "Likewise" is the usual thing. This looks like an omission.
>>
>>>> * gcc.target/powerpc/fold-vec-mult-longlong.c: Fix expected code
>>>> generation on power10.
>>>> ---
>>>> gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c | 7 +++++--
>>>> gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c | 3 ++-
>>>> 2 files changed, 7 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git
>>>> a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
>>>> b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
>>>> index 312e984d3cc..f6a9b290ae5 100644
>>>> --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
>>>> +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
>>>> @@ -19,5 +19,8 @@ test6 (vector unsigned long long x, vector
>>>> unsigned long long y)
>>>> {
>>>> return vec_div (x, y);
>>>> }
>>>> -/* { dg-final { scan-assembler-times {\mdivd\M} 2 } } */
>>>> -/* { dg-final { scan-assembler-times {\mdivdu\M} 2 } } */
>>>> +
>>>> +/* { dg-final { scan-assembler-times {\mdivd\M} 2 { target { !
>>>> has_arch_pwr10 } } } } */
>>>> +/* { dg-final { scan-assembler-times {\mdivdu\M} 2 { target { !
>>>> has_arch_pwr10 } } } } */
>>>> +/* { dg-final { scan-assembler-times {\mvdivsd\M} 1 { target {
>>>> has_arch_pwr10 } } } } */
>>>> +/* { dg-final { scan-assembler-times {\mvdivud\M} 1 { target {
>>>> has_arch_pwr10 } } } } */
>>>> diff --git
>>>> a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
>>>> b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
>>>> index 38dba9f5023..bd210e34801 100644
>>>> --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
>>>> +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
>>>> @@ -20,5 +20,6 @@ test6 (vector unsigned long long x, vector
>>>> unsigned long long y)
>>>> return vec_mul (x, y);
>>>> }
>>>> -/* { dg-final { scan-assembler-times "\[ \t\]mulld " 4 { target
>>>> lp64 } } } */
>>>> +/* { dg-final { scan-assembler-times {\mmulld\M} 4 { target {
>>>> lp64 && { ! has_arch_pwr10 } } } } } */
>>>> +/* { dg-final { scan-assembler-times {\mvmulld\M} 2 { target {
>>>> has_arch_pwr10 } } } } */
>>> Shouldn't this last be { lp64 && has_arch_pwr10 } ?
>> Nope. Because the power10 vector multiply is done in the vector
>> unit, it can
>> generate the vmulld instruction.
>
> Please document this, then.
Well, never mind, that's relatively obvious, sorry. :-)
Bill
>
> Thanks,
> Bill
>
>>
>>> Otherwise LGTM. I can't approve, but recommend approval with those
>>> changes.
>>>
>>> Thanks,
>>> Bill
>>>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: Repost: [PATCH] PR 100167: Fix vector long long multiply/divide tests on power10
2021-07-12 17:47 ` Bill Schmidt
2021-07-12 18:13 ` Bill Schmidt
@ 2021-07-12 19:45 ` David Edelsohn
2021-07-12 22:00 ` Segher Boessenkool
2 siblings, 0 replies; 7+ messages in thread
From: David Edelsohn @ 2021-07-12 19:45 UTC (permalink / raw)
To: Bill Schmidt, Michael Meissner
Cc: GCC Patches, Segher Boessenkool, Peter Bergner, Will Schmidt
On Mon, Jul 12, 2021 at 1:47 PM Bill Schmidt <wschmidt@linux.ibm.com> wrote:
>
> On 7/12/21 12:16 PM, Michael Meissner wrote:
> > On Sun, Jul 11, 2021 at 02:55:04PM -0500, Bill Schmidt wrote:
> >> Hi Mike,
> >>
> >> On 7/7/21 3:04 PM, Michael Meissner wrote:
> >>> [PATCH] PR 100167: Fix vector long long multiply/divide tests on power10.
> >>>
> >>> This patch updates the vector long long multiply and divide tests to
> >>> supply the correct code information if power10 code generation is used.
> >>>
> >>> 2021-07-07 Michael Meissner <meissner@linux.ibm.com>
> >>>
> >>> gcc/testsuite/
> >>> PR testsuite/100167
> >>> * gcc.target/powerpc/fold-vec-div-longlong.c:
> >> Missing information after colon.
> > Because all of the changes were the same thing, and the line is long enough. I
> > just grouped all of the files together, and put the change line as the last
> > entry.
> But that's not accepted style. Put it after the first one and use
> "Likewise" is the usual thing. This looks like an omission.
Mike, that's a very creative idea, but let's stick to the precedent of
using Likewise or Same for repeated changes.
> >
> >>> * gcc.target/powerpc/fold-vec-mult-longlong.c: Fix expected code
> >>> generation on power10.
> >>> ---
> >>> gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c | 7 +++++--
> >>> gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c | 3 ++-
> >>> 2 files changed, 7 insertions(+), 3 deletions(-)
> >>>
> >>> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
> >>> index 312e984d3cc..f6a9b290ae5 100644
> >>> --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
> >>> +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
> >>> @@ -19,5 +19,8 @@ test6 (vector unsigned long long x, vector unsigned long long y)
> >>> {
> >>> return vec_div (x, y);
> >>> }
> >>> -/* { dg-final { scan-assembler-times {\mdivd\M} 2 } } */
> >>> -/* { dg-final { scan-assembler-times {\mdivdu\M} 2 } } */
> >>> +
> >>> +/* { dg-final { scan-assembler-times {\mdivd\M} 2 { target { ! has_arch_pwr10 } } } } */
> >>> +/* { dg-final { scan-assembler-times {\mdivdu\M} 2 { target { ! has_arch_pwr10 } } } } */
> >>> +/* { dg-final { scan-assembler-times {\mvdivsd\M} 1 { target { has_arch_pwr10 } } } } */
> >>> +/* { dg-final { scan-assembler-times {\mvdivud\M} 1 { target { has_arch_pwr10 } } } } */
> >>> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
> >>> index 38dba9f5023..bd210e34801 100644
> >>> --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
> >>> +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
> >>> @@ -20,5 +20,6 @@ test6 (vector unsigned long long x, vector unsigned long long y)
> >>> return vec_mul (x, y);
> >>> }
> >>> -/* { dg-final { scan-assembler-times "\[ \t\]mulld " 4 { target lp64 } } } */
> >>> +/* { dg-final { scan-assembler-times {\mmulld\M} 4 { target { lp64 && { ! has_arch_pwr10 } } } } } */
> >>> +/* { dg-final { scan-assembler-times {\mvmulld\M} 2 { target { has_arch_pwr10 } } } } */
> >> Shouldn't this last be { lp64 && has_arch_pwr10 } ?
> > Nope. Because the power10 vector multiply is done in the vector unit, it can
> > generate the vmulld instruction.
>
> Please document this, then.
>
> Thanks,
> Bill
>
> >
> >> Otherwise LGTM. I can't approve, but recommend approval with those changes.
Okay with a correct ChangeLog and a comment on the vmulld line.
Thanks, David
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: Repost: [PATCH] PR 100167: Fix vector long long multiply/divide tests on power10
2021-07-12 17:47 ` Bill Schmidt
2021-07-12 18:13 ` Bill Schmidt
2021-07-12 19:45 ` David Edelsohn
@ 2021-07-12 22:00 ` Segher Boessenkool
2 siblings, 0 replies; 7+ messages in thread
From: Segher Boessenkool @ 2021-07-12 22:00 UTC (permalink / raw)
To: Bill Schmidt
Cc: Michael Meissner, gcc-patches, David Edelsohn, Peter Bergner,
Will Schmidt
On Mon, Jul 12, 2021 at 12:47:43PM -0500, Bill Schmidt wrote:
> On 7/12/21 12:16 PM, Michael Meissner wrote:
> >>Shouldn't this last be { lp64 && has_arch_pwr10 } ?
> >Nope. Because the power10 vector multiply is done in the vector unit, it
> >can
> >generate the vmulld instruction.
>
> Please document this, then.
And this really should not use lp64 but powerpc64, *but* that test is
broken still (it does not test if the *compiler* allows generating
these insns, *only* if the machine can execute the insns, and it is
otherwise broken on AIX, etc.) We really should impprove that :-(
If it had used powerpc64 here, there would not have been this confusion.
The problem in fixing this of course is the historical uses of this
test. Bah.
Segher
^ permalink raw reply [flat|nested] 7+ messages in thread
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2021-07-07 20:04 Repost: [PATCH] PR 100167: Fix vector long long multiply/divide tests on power10 Michael Meissner
2021-07-11 19:55 ` Bill Schmidt
2021-07-12 17:16 ` Michael Meissner
2021-07-12 17:47 ` Bill Schmidt
2021-07-12 18:13 ` Bill Schmidt
2021-07-12 19:45 ` David Edelsohn
2021-07-12 22:00 ` Segher Boessenkool
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