* [PATCH v2] x86: Don't enable UINTR in 32-bit mode
@ 2021-07-13 1:51 H.J. Lu
2021-07-13 6:55 ` Jakub Jelinek
0 siblings, 1 reply; 5+ messages in thread
From: H.J. Lu @ 2021-07-13 1:51 UTC (permalink / raw)
To: gcc-patches; +Cc: Uros Bizjak, Jakub Jelinek
UINTR is available only in 64-bit mode. Since the codegen target is
unknown when the the gcc driver is processing -march=native, to properly
handle UINTR for -march=native:
1. Pass arch[32|64] and tune[32|64] to host_detect_local_cpu to indicate
32-bit and 64-bit codegen.
2. Change ix86_option_override_internal to enable UINTR only in 64-bit
mode for -march=CPU when PTA_CPU includes PTA_UINTR.
gcc/
PR target/101395
* config/i386/driver-i386.c (host_detect_local_cpu): Check
arch32/tune32 and arch64/tune64 for 32-bit and 64-bit codegen.
Enable UINTR only for 64-bit codegen.
* config/i386/i386-options.c
(ix86_option_override_internal::DEF_PTA): Skip PTA_UINTR if not
in 64-bit mode.
* config/i386/i386.h (CC1_CPU_SPEC): Pass arch32/tune32 for
32-bit codegen and arch64/tune64 for 64-bit codegen.
gcc/testsuite/
PR target/101395
* gcc.target/i386/pr101395-1.c: New test.
* gcc.target/i386/pr101395-2.c: Likewise.
* gcc.target/i386/pr101395-3.c: Likewise.
---
gcc/config/i386/driver-i386.c | 30 ++++++++++++++++------
gcc/config/i386/i386-options.c | 1 +
gcc/config/i386/i386.h | 9 ++++---
gcc/testsuite/gcc.target/i386/pr101395-1.c | 12 +++++++++
gcc/testsuite/gcc.target/i386/pr101395-2.c | 22 ++++++++++++++++
gcc/testsuite/gcc.target/i386/pr101395-3.c | 6 +++++
6 files changed, 69 insertions(+), 11 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr101395-1.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr101395-2.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr101395-3.c
diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
index dd9236616b4..b84f86d8f43 100644
--- a/gcc/config/i386/driver-i386.c
+++ b/gcc/config/i386/driver-i386.c
@@ -370,9 +370,9 @@ detect_caches_intel (bool xeon_mp, unsigned max_level,
}
/* This will be called by the spec parser in gcc.c when it sees
- a %:local_cpu_detect(args) construct. Currently it will be called
- with either "arch" or "tune" as argument depending on if -march=native
- or -mtune=native is to be substituted.
+ a %:local_cpu_detect(args) construct. Currently it will be
+ called with either "arch[32|64]" or "tune[32|64]" as argument
+ depending on if -march=native or -mtune=native is to be substituted.
It returns a string containing new command line parameters to be
put at the place of the above two options, depending on what CPU
@@ -404,9 +404,18 @@ const char *host_detect_local_cpu (int argc, const char **argv)
if (argc < 1)
return NULL;
- arch = !strcmp (argv[0], "arch");
+ arch = !strncmp (argv[0], "arch", 4);
- if (!arch && strcmp (argv[0], "tune"))
+ if (!arch && strncmp (argv[0], "tune", 4))
+ return NULL;
+
+ bool codegen_x86_64;
+
+ if (!strcmp (argv[0] + 4, "32"))
+ codegen_x86_64 = false;
+ else if (!strcmp (argv[0] + 4, "64"))
+ codegen_x86_64 = true;
+ else
return NULL;
struct __processor_model cpu_model = { };
@@ -804,8 +813,12 @@ const char *host_detect_local_cpu (int argc, const char **argv)
if (isa_names_table[i].option)
{
if (has_feature (isa_names_table[i].feature))
- options = concat (options, " ",
- isa_names_table[i].option, NULL);
+ {
+ if (codegen_x86_64
+ || isa_names_table[i].feature != FEATURE_UINTR)
+ options = concat (options, " ",
+ isa_names_table[i].option, NULL);
+ }
else
options = concat (options, neg_option,
isa_names_table[i].option + 2, NULL);
@@ -813,7 +826,8 @@ const char *host_detect_local_cpu (int argc, const char **argv)
}
done:
- return concat (cache, "-m", argv[0], "=", cpu, options, NULL);
+ const char *moption = arch ? "-march=" : "-mtune=";
+ return concat (cache, moption, cpu, options, NULL);
}
#else
diff --git a/gcc/config/i386/i386-options.c b/gcc/config/i386/i386-options.c
index 7a35c468da3..7cba655595e 100644
--- a/gcc/config/i386/i386-options.c
+++ b/gcc/config/i386/i386-options.c
@@ -2109,6 +2109,7 @@ ix86_option_override_internal (bool main_args_p,
#define DEF_PTA(NAME) \
if (((processor_alias_table[i].flags & PTA_ ## NAME) != 0) \
&& PTA_ ## NAME != PTA_64BIT \
+ && (TARGET_64BIT || PTA_ ## NAME != PTA_UINTR) \
&& !TARGET_EXPLICIT_ ## NAME ## _P (opts)) \
SET_TARGET_ ## NAME (opts);
#include "i386-isa.def"
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 8c3eace56da..ae9f455c48d 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -577,9 +577,12 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
#define CC1_CPU_SPEC CC1_CPU_SPEC_1
#else
#define CC1_CPU_SPEC CC1_CPU_SPEC_1 \
-"%{march=native:%>march=native %:local_cpu_detect(arch) \
- %{!mtune=*:%>mtune=native %:local_cpu_detect(tune)}} \
-%{mtune=native:%>mtune=native %:local_cpu_detect(tune)}"
+"%{" OPT_ARCH32 ":%{march=native:%>march=native %:local_cpu_detect(arch32) \
+ %{!mtune=*:%>mtune=native %:local_cpu_detect(tune32)}}}" \
+"%{" OPT_ARCH32 ":%{mtune=native:%>mtune=native %:local_cpu_detect(tune32)}}" \
+"%{" OPT_ARCH64 ":%{march=native:%>march=native %:local_cpu_detect(arch64) \
+ %{!mtune=*:%>mtune=native %:local_cpu_detect(tune64)}}}" \
+"%{" OPT_ARCH64 ":%{mtune=native:%>mtune=native %:local_cpu_detect(tune64)}}"
#endif
#endif
\f
diff --git a/gcc/testsuite/gcc.target/i386/pr101395-1.c b/gcc/testsuite/gcc.target/i386/pr101395-1.c
new file mode 100644
index 00000000000..74c8bfe891a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr101395-1.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=sapphirerapids" } */
+
+#ifdef __x86_64__
+# ifndef __UINTR__
+# error UINTR is not enabled for Sapphirerapids
+# endif
+#else
+# ifdef __UINTR__
+# error UINTR is not usable in 32-bit mode
+# endif
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/pr101395-2.c b/gcc/testsuite/gcc.target/i386/pr101395-2.c
new file mode 100644
index 00000000000..f2b677f8c80
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr101395-2.c
@@ -0,0 +1,22 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -march=native" } */
+
+int
+main ()
+{
+ if (__builtin_cpu_supports ("uintr"))
+ {
+#ifdef __x86_64__
+# ifndef __UINTR__
+ __builtin_abort ();
+# endif
+#else
+# ifdef __UINTR__
+ __builtin_abort ();
+# endif
+#endif
+ return 0;
+ }
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr101395-3.c b/gcc/testsuite/gcc.target/i386/pr101395-3.c
new file mode 100644
index 00000000000..bc6ab423c93
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr101395-3.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=native -mno-uintr" } */
+
+#ifdef __UINTR__
+# error UINTR should be disabled
+#endif
--
2.31.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] x86: Don't enable UINTR in 32-bit mode
2021-07-13 1:51 [PATCH v2] x86: Don't enable UINTR in 32-bit mode H.J. Lu
@ 2021-07-13 6:55 ` Jakub Jelinek
2021-07-13 16:35 ` [PATCH v3] " H.J. Lu
0 siblings, 1 reply; 5+ messages in thread
From: Jakub Jelinek @ 2021-07-13 6:55 UTC (permalink / raw)
To: H.J. Lu; +Cc: gcc-patches, Uros Bizjak
On Mon, Jul 12, 2021 at 06:51:30PM -0700, H.J. Lu wrote:
> @@ -404,9 +404,18 @@ const char *host_detect_local_cpu (int argc, const char **argv)
> if (argc < 1)
> return NULL;
I think it would be simpler to use 2 arguments instead of one.
So change the above to if (argc < 2)
>
> - arch = !strcmp (argv[0], "arch");
> + arch = !strncmp (argv[0], "arch", 4);
>
> - if (!arch && strcmp (argv[0], "tune"))
> + if (!arch && strncmp (argv[0], "tune", 4))
> + return NULL;
Keep strcmp as is here.
> +
> + bool codegen_x86_64;
> +
> + if (!strcmp (argv[0] + 4, "32"))
> + codegen_x86_64 = false;
> + else if (!strcmp (argv[0] + 4, "64"))
> + codegen_x86_64 = true;
> + else
> return NULL;
Check argv[1] here instead.
> @@ -813,7 +826,8 @@ const char *host_detect_local_cpu (int argc, const char **argv)
> }
>
> done:
> - return concat (cache, "-m", argv[0], "=", cpu, options, NULL);
> + const char *moption = arch ? "-march=" : "-mtune=";
> + return concat (cache, moption, cpu, options, NULL);
> }
> #else
You don't need this change.
> diff --git a/gcc/config/i386/i386-options.c b/gcc/config/i386/i386-options.c
> index 7a35c468da3..7cba655595e 100644
> --- a/gcc/config/i386/i386-options.c
> +++ b/gcc/config/i386/i386-options.c
> @@ -2109,6 +2109,7 @@ ix86_option_override_internal (bool main_args_p,
> #define DEF_PTA(NAME) \
> if (((processor_alias_table[i].flags & PTA_ ## NAME) != 0) \
> && PTA_ ## NAME != PTA_64BIT \
> + && (TARGET_64BIT || PTA_ ## NAME != PTA_UINTR) \
> && !TARGET_EXPLICIT_ ## NAME ## _P (opts)) \
> SET_TARGET_ ## NAME (opts);
> #include "i386-isa.def"
> diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
> index 8c3eace56da..ae9f455c48d 100644
> --- a/gcc/config/i386/i386.h
> +++ b/gcc/config/i386/i386.h
> @@ -577,9 +577,12 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
> #define CC1_CPU_SPEC CC1_CPU_SPEC_1
> #else
> #define CC1_CPU_SPEC CC1_CPU_SPEC_1 \
> -"%{march=native:%>march=native %:local_cpu_detect(arch) \
> - %{!mtune=*:%>mtune=native %:local_cpu_detect(tune)}} \
> -%{mtune=native:%>mtune=native %:local_cpu_detect(tune)}"
> +"%{" OPT_ARCH32 ":%{march=native:%>march=native %:local_cpu_detect(arch32) \
> + %{!mtune=*:%>mtune=native %:local_cpu_detect(tune32)}}}" \
> +"%{" OPT_ARCH32 ":%{mtune=native:%>mtune=native %:local_cpu_detect(tune32)}}" \
> +"%{" OPT_ARCH64 ":%{march=native:%>march=native %:local_cpu_detect(arch64) \
> + %{!mtune=*:%>mtune=native %:local_cpu_detect(tune64)}}}" \
> +"%{" OPT_ARCH64 ":%{mtune=native:%>mtune=native %:local_cpu_detect(tune64)}}"
And you can use
#define ARCH_ARG "%{" OPT_ARCH64 ":64;32}"
%:local_cpu_detect(arch, " ARCH_ARG ")
etc.
Jakub
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v3] x86: Don't enable UINTR in 32-bit mode
2021-07-13 6:55 ` Jakub Jelinek
@ 2021-07-13 16:35 ` H.J. Lu
2021-07-13 18:59 ` Jakub Jelinek
0 siblings, 1 reply; 5+ messages in thread
From: H.J. Lu @ 2021-07-13 16:35 UTC (permalink / raw)
To: Jakub Jelinek, Hongyu Wang; +Cc: GCC Patches, Uros Bizjak
[-- Attachment #1: Type: text/plain, Size: 3161 bytes --]
On Mon, Jul 12, 2021 at 11:56 PM Jakub Jelinek <jakub@redhat.com> wrote:
>
> On Mon, Jul 12, 2021 at 06:51:30PM -0700, H.J. Lu wrote:
> > @@ -404,9 +404,18 @@ const char *host_detect_local_cpu (int argc, const char **argv)
> > if (argc < 1)
> > return NULL;
>
> I think it would be simpler to use 2 arguments instead of one.
> So change the above to if (argc < 2)
Fixed.
> >
> > - arch = !strcmp (argv[0], "arch");
> > + arch = !strncmp (argv[0], "arch", 4);
> >
> > - if (!arch && strcmp (argv[0], "tune"))
> > + if (!arch && strncmp (argv[0], "tune", 4))
> > + return NULL;
>
> Keep strcmp as is here.
Fixed.
> > +
> > + bool codegen_x86_64;
> > +
> > + if (!strcmp (argv[0] + 4, "32"))
> > + codegen_x86_64 = false;
> > + else if (!strcmp (argv[0] + 4, "64"))
> > + codegen_x86_64 = true;
> > + else
> > return NULL;
>
> Check argv[1] here instead.
Fixed.
> > @@ -813,7 +826,8 @@ const char *host_detect_local_cpu (int argc, const char **argv)
> > }
> >
> > done:
> > - return concat (cache, "-m", argv[0], "=", cpu, options, NULL);
> > + const char *moption = arch ? "-march=" : "-mtune=";
> > + return concat (cache, moption, cpu, options, NULL);
> > }
> > #else
>
> You don't need this change.
Fixed.
> > diff --git a/gcc/config/i386/i386-options.c b/gcc/config/i386/i386-options.c
> > index 7a35c468da3..7cba655595e 100644
> > --- a/gcc/config/i386/i386-options.c
> > +++ b/gcc/config/i386/i386-options.c
> > @@ -2109,6 +2109,7 @@ ix86_option_override_internal (bool main_args_p,
> > #define DEF_PTA(NAME) \
> > if (((processor_alias_table[i].flags & PTA_ ## NAME) != 0) \
> > && PTA_ ## NAME != PTA_64BIT \
> > + && (TARGET_64BIT || PTA_ ## NAME != PTA_UINTR) \
> > && !TARGET_EXPLICIT_ ## NAME ## _P (opts)) \
> > SET_TARGET_ ## NAME (opts);
> > #include "i386-isa.def"
> > diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
> > index 8c3eace56da..ae9f455c48d 100644
> > --- a/gcc/config/i386/i386.h
> > +++ b/gcc/config/i386/i386.h
> > @@ -577,9 +577,12 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
> > #define CC1_CPU_SPEC CC1_CPU_SPEC_1
> > #else
> > #define CC1_CPU_SPEC CC1_CPU_SPEC_1 \
> > -"%{march=native:%>march=native %:local_cpu_detect(arch) \
> > - %{!mtune=*:%>mtune=native %:local_cpu_detect(tune)}} \
> > -%{mtune=native:%>mtune=native %:local_cpu_detect(tune)}"
> > +"%{" OPT_ARCH32 ":%{march=native:%>march=native %:local_cpu_detect(arch32) \
> > + %{!mtune=*:%>mtune=native %:local_cpu_detect(tune32)}}}" \
> > +"%{" OPT_ARCH32 ":%{mtune=native:%>mtune=native %:local_cpu_detect(tune32)}}" \
> > +"%{" OPT_ARCH64 ":%{march=native:%>march=native %:local_cpu_detect(arch64) \
> > + %{!mtune=*:%>mtune=native %:local_cpu_detect(tune64)}}}" \
> > +"%{" OPT_ARCH64 ":%{mtune=native:%>mtune=native %:local_cpu_detect(tune64)}}"
>
> And you can use
> #define ARCH_ARG "%{" OPT_ARCH64 ":64;32}"
I added
#define ARCH_ARG "%{" OPT_ARCH64 ":64;:32}"
> %:local_cpu_detect(arch, " ARCH_ARG ")
> etc.
>
> Jakub
>
Here is the v3 patch. OK for master?
Thanks.
--
H.J.
[-- Attachment #2: v3-0001-x86-Don-t-enable-UINTR-in-32-bit-mode.patch --]
[-- Type: text/x-patch, Size: 6706 bytes --]
From ceab81ef97ab102c410830c41ba7fea911170d1a Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.tools@gmail.com>
Date: Fri, 9 Jul 2021 09:16:01 -0700
Subject: [PATCH v3] x86: Don't enable UINTR in 32-bit mode
UINTR is available only in 64-bit mode. Since the codegen target is
unknown when the the gcc driver is processing -march=native, to properly
handle UINTR for -march=native:
1. Pass "arch [32|64]" and "tune [32|64]" to host_detect_local_cpu to
indicate 32-bit and 64-bit codegen.
2. Change ix86_option_override_internal to enable UINTR only in 64-bit
mode for -march=CPU when PTA_CPU includes PTA_UINTR.
gcc/
PR target/101395
* config/i386/driver-i386.c (host_detect_local_cpu): Check
"arch [32|64]" and "tune [32|64]" for 32-bit and 64-bit codegen.
Enable UINTR only for 64-bit codegen.
* config/i386/i386-options.c
(ix86_option_override_internal::DEF_PTA): Skip PTA_UINTR if not
in 64-bit mode.
* config/i386/i386.h (ARCH_ARG): New.
(CC1_CPU_SPEC): Pass "[arch|tune] 32" for 32-bit codegen and
"[arch|tune] 64" for 64-bit codegen.
gcc/testsuite/
PR target/101395
* gcc.target/i386/pr101395-1.c: New test.
* gcc.target/i386/pr101395-2.c: Likewise.
* gcc.target/i386/pr101395-3.c: Likewise.
---
gcc/config/i386/driver-i386.c | 25 ++++++++++++++++------
gcc/config/i386/i386-options.c | 1 +
gcc/config/i386/i386.h | 7 +++---
gcc/testsuite/gcc.target/i386/pr101395-1.c | 12 +++++++++++
gcc/testsuite/gcc.target/i386/pr101395-2.c | 22 +++++++++++++++++++
gcc/testsuite/gcc.target/i386/pr101395-3.c | 6 ++++++
6 files changed, 64 insertions(+), 9 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr101395-1.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr101395-2.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr101395-3.c
diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
index dd9236616b4..f844a168ddb 100644
--- a/gcc/config/i386/driver-i386.c
+++ b/gcc/config/i386/driver-i386.c
@@ -370,9 +370,9 @@ detect_caches_intel (bool xeon_mp, unsigned max_level,
}
/* This will be called by the spec parser in gcc.c when it sees
- a %:local_cpu_detect(args) construct. Currently it will be called
- with either "arch" or "tune" as argument depending on if -march=native
- or -mtune=native is to be substituted.
+ a %:local_cpu_detect(args) construct. Currently it will be
+ called with either "arch [32|64]" or "tune [32|64]" as argument
+ depending on if -march=native or -mtune=native is to be substituted.
It returns a string containing new command line parameters to be
put at the place of the above two options, depending on what CPU
@@ -401,7 +401,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
unsigned int l2sizekb = 0;
- if (argc < 1)
+ if (argc < 2)
return NULL;
arch = !strcmp (argv[0], "arch");
@@ -409,6 +409,15 @@ const char *host_detect_local_cpu (int argc, const char **argv)
if (!arch && strcmp (argv[0], "tune"))
return NULL;
+ bool codegen_x86_64;
+
+ if (!strcmp (argv[1], "32"))
+ codegen_x86_64 = false;
+ else if (!strcmp (argv[1], "64"))
+ codegen_x86_64 = true;
+ else
+ return NULL;
+
struct __processor_model cpu_model = { };
struct __processor_model2 cpu_model2 = { };
unsigned int cpu_features2[SIZE_OF_CPU_FEATURES] = { };
@@ -804,8 +813,12 @@ const char *host_detect_local_cpu (int argc, const char **argv)
if (isa_names_table[i].option)
{
if (has_feature (isa_names_table[i].feature))
- options = concat (options, " ",
- isa_names_table[i].option, NULL);
+ {
+ if (codegen_x86_64
+ || isa_names_table[i].feature != FEATURE_UINTR)
+ options = concat (options, " ",
+ isa_names_table[i].option, NULL);
+ }
else
options = concat (options, neg_option,
isa_names_table[i].option + 2, NULL);
diff --git a/gcc/config/i386/i386-options.c b/gcc/config/i386/i386-options.c
index 7a35c468da3..7cba655595e 100644
--- a/gcc/config/i386/i386-options.c
+++ b/gcc/config/i386/i386-options.c
@@ -2109,6 +2109,7 @@ ix86_option_override_internal (bool main_args_p,
#define DEF_PTA(NAME) \
if (((processor_alias_table[i].flags & PTA_ ## NAME) != 0) \
&& PTA_ ## NAME != PTA_64BIT \
+ && (TARGET_64BIT || PTA_ ## NAME != PTA_UINTR) \
&& !TARGET_EXPLICIT_ ## NAME ## _P (opts)) \
SET_TARGET_ ## NAME (opts);
#include "i386-isa.def"
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 8c3eace56da..324e8a952d9 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -576,10 +576,11 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
#ifndef HAVE_LOCAL_CPU_DETECT
#define CC1_CPU_SPEC CC1_CPU_SPEC_1
#else
+#define ARCH_ARG "%{" OPT_ARCH64 ":64;:32}"
#define CC1_CPU_SPEC CC1_CPU_SPEC_1 \
-"%{march=native:%>march=native %:local_cpu_detect(arch) \
- %{!mtune=*:%>mtune=native %:local_cpu_detect(tune)}} \
-%{mtune=native:%>mtune=native %:local_cpu_detect(tune)}"
+"%{march=native:%>march=native %:local_cpu_detect(arch " ARCH_ARG ") \
+ %{!mtune=*:%>mtune=native %:local_cpu_detect(tune " ARCH_ARG ")}} \
+%{mtune=native:%>mtune=native %:local_cpu_detect(tune " ARCH_ARG ")}"
#endif
#endif
\f
diff --git a/gcc/testsuite/gcc.target/i386/pr101395-1.c b/gcc/testsuite/gcc.target/i386/pr101395-1.c
new file mode 100644
index 00000000000..74c8bfe891a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr101395-1.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=sapphirerapids" } */
+
+#ifdef __x86_64__
+# ifndef __UINTR__
+# error UINTR is not enabled for Sapphirerapids
+# endif
+#else
+# ifdef __UINTR__
+# error UINTR is not usable in 32-bit mode
+# endif
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/pr101395-2.c b/gcc/testsuite/gcc.target/i386/pr101395-2.c
new file mode 100644
index 00000000000..f2b677f8c80
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr101395-2.c
@@ -0,0 +1,22 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -march=native" } */
+
+int
+main ()
+{
+ if (__builtin_cpu_supports ("uintr"))
+ {
+#ifdef __x86_64__
+# ifndef __UINTR__
+ __builtin_abort ();
+# endif
+#else
+# ifdef __UINTR__
+ __builtin_abort ();
+# endif
+#endif
+ return 0;
+ }
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr101395-3.c b/gcc/testsuite/gcc.target/i386/pr101395-3.c
new file mode 100644
index 00000000000..bc6ab423c93
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr101395-3.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=native -mno-uintr" } */
+
+#ifdef __UINTR__
+# error UINTR should be disabled
+#endif
--
2.31.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v3] x86: Don't enable UINTR in 32-bit mode
2021-07-13 16:35 ` [PATCH v3] " H.J. Lu
@ 2021-07-13 18:59 ` Jakub Jelinek
2021-07-14 5:52 ` Uros Bizjak
0 siblings, 1 reply; 5+ messages in thread
From: Jakub Jelinek @ 2021-07-13 18:59 UTC (permalink / raw)
To: H.J. Lu; +Cc: Hongyu Wang, GCC Patches, Uros Bizjak
On Tue, Jul 13, 2021 at 09:35:18AM -0700, H.J. Lu wrote:
> Here is the v3 patch. OK for master?
From my POV LGTM, but please give Uros a chance to chime in.
> From ceab81ef97ab102c410830c41ba7fea911170d1a Mon Sep 17 00:00:00 2001
> From: "H.J. Lu" <hjl.tools@gmail.com>
> Date: Fri, 9 Jul 2021 09:16:01 -0700
> Subject: [PATCH v3] x86: Don't enable UINTR in 32-bit mode
>
> UINTR is available only in 64-bit mode. Since the codegen target is
> unknown when the the gcc driver is processing -march=native, to properly
> handle UINTR for -march=native:
>
> 1. Pass "arch [32|64]" and "tune [32|64]" to host_detect_local_cpu to
> indicate 32-bit and 64-bit codegen.
> 2. Change ix86_option_override_internal to enable UINTR only in 64-bit
> mode for -march=CPU when PTA_CPU includes PTA_UINTR.
>
> gcc/
>
> PR target/101395
> * config/i386/driver-i386.c (host_detect_local_cpu): Check
> "arch [32|64]" and "tune [32|64]" for 32-bit and 64-bit codegen.
> Enable UINTR only for 64-bit codegen.
> * config/i386/i386-options.c
> (ix86_option_override_internal::DEF_PTA): Skip PTA_UINTR if not
> in 64-bit mode.
> * config/i386/i386.h (ARCH_ARG): New.
> (CC1_CPU_SPEC): Pass "[arch|tune] 32" for 32-bit codegen and
> "[arch|tune] 64" for 64-bit codegen.
>
> gcc/testsuite/
>
> PR target/101395
> * gcc.target/i386/pr101395-1.c: New test.
> * gcc.target/i386/pr101395-2.c: Likewise.
> * gcc.target/i386/pr101395-3.c: Likewise.
Jakub
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v3] x86: Don't enable UINTR in 32-bit mode
2021-07-13 18:59 ` Jakub Jelinek
@ 2021-07-14 5:52 ` Uros Bizjak
0 siblings, 0 replies; 5+ messages in thread
From: Uros Bizjak @ 2021-07-14 5:52 UTC (permalink / raw)
To: Jakub Jelinek; +Cc: H.J. Lu, Hongyu Wang, GCC Patches
On Tue, Jul 13, 2021 at 8:59 PM Jakub Jelinek <jakub@redhat.com> wrote:
>
> On Tue, Jul 13, 2021 at 09:35:18AM -0700, H.J. Lu wrote:
> > Here is the v3 patch. OK for master?
>
> From my POV LGTM, but please give Uros a chance to chime in.
>
> > From ceab81ef97ab102c410830c41ba7fea911170d1a Mon Sep 17 00:00:00 2001
> > From: "H.J. Lu" <hjl.tools@gmail.com>
> > Date: Fri, 9 Jul 2021 09:16:01 -0700
> > Subject: [PATCH v3] x86: Don't enable UINTR in 32-bit mode
> >
> > UINTR is available only in 64-bit mode. Since the codegen target is
> > unknown when the the gcc driver is processing -march=native, to properly
> > handle UINTR for -march=native:
> >
> > 1. Pass "arch [32|64]" and "tune [32|64]" to host_detect_local_cpu to
> > indicate 32-bit and 64-bit codegen.
> > 2. Change ix86_option_override_internal to enable UINTR only in 64-bit
> > mode for -march=CPU when PTA_CPU includes PTA_UINTR.
> >
> > gcc/
> >
> > PR target/101395
> > * config/i386/driver-i386.c (host_detect_local_cpu): Check
> > "arch [32|64]" and "tune [32|64]" for 32-bit and 64-bit codegen.
> > Enable UINTR only for 64-bit codegen.
> > * config/i386/i386-options.c
> > (ix86_option_override_internal::DEF_PTA): Skip PTA_UINTR if not
> > in 64-bit mode.
> > * config/i386/i386.h (ARCH_ARG): New.
> > (CC1_CPU_SPEC): Pass "[arch|tune] 32" for 32-bit codegen and
> > "[arch|tune] 64" for 64-bit codegen.
> >
> > gcc/testsuite/
> >
> > PR target/101395
> > * gcc.target/i386/pr101395-1.c: New test.
> > * gcc.target/i386/pr101395-2.c: Likewise.
> > * gcc.target/i386/pr101395-3.c: Likewise.
OK.
Thanks,
Uros.
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2021-07-14 5:52 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-07-13 1:51 [PATCH v2] x86: Don't enable UINTR in 32-bit mode H.J. Lu
2021-07-13 6:55 ` Jakub Jelinek
2021-07-13 16:35 ` [PATCH v3] " H.J. Lu
2021-07-13 18:59 ` Jakub Jelinek
2021-07-14 5:52 ` Uros Bizjak
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).