From: Tamar Christina <tamar.christina@arm.com>
To: gcc-patches@gcc.gnu.org
Cc: nd@arm.com, Richard.Earnshaw@arm.com, Marcus.Shawcroft@arm.com,
Kyrylo.Tkachov@arm.com, richard.sandiford@arm.com
Subject: [PATCH 3/4]AArch64: correct dot-product RTL patterns for aarch64.
Date: Thu, 15 Jul 2021 17:40:23 +0100 [thread overview]
Message-ID: <20210715164019.GA5409@arm.com> (raw)
In-Reply-To: <patch-14658-tamar@arm.com>
[-- Attachment #1: Type: text/plain, Size: 1976 bytes --]
Hi All,
The previous fix for this problem was wrong due to a subtle difference between
where NEON expects the RMW values and where intrinsics expects them.
The insn pattern is modeled after the intrinsics and so needs an expand for
the vectorizer optab to switch the RTL.
However operand[3] is not expected to be written to so the current pattern is
bogus.
Instead we use the expand to shuffle around the RTL.
The vectorizer expects operands[3] and operands[0] to be
the same but the aarch64 intrinsics expanders expect operands[0] and
operands[1] to be the same.
Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
Ok for master? and active branches after some stew?
Thanks,
Tamar
gcc/ChangeLog:
* config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Correct
RTL.
--- inline copy of patch --
diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index 7397f1ec5ca0cb9e3cdd5c46772f604e640666e4..51789f954affd9fa88e2bc1bcc3dacf64ccb5bde 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -635,18 +635,12 @@ (define_insn "aarch64_usdot<vsi2qi>"
;; and so the vectorizer provides r, in which the result has to be accumulated.
(define_expand "<sur>dot_prod<vsi2qi>"
[(set (match_operand:VS 0 "register_operand")
- (plus:VS (unspec:VS [(match_operand:<VSI2QI> 1 "register_operand")
+ (plus:VS (match_operand:VS 3 "register_operand")
+ (unspec:VS [(match_operand:<VSI2QI> 1 "register_operand")
(match_operand:<VSI2QI> 2 "register_operand")]
- DOTPROD)
- (match_operand:VS 3 "register_operand")))]
+ DOTPROD)))]
"TARGET_DOTPROD"
-{
- emit_insn (
- gen_aarch64_<sur>dot<vsi2qi> (operands[3], operands[3], operands[1],
- operands[2]));
- emit_insn (gen_rtx_SET (operands[0], operands[3]));
- DONE;
-})
+)
;; Auto-vectorizer pattern for usdot. The operand[3] and operand[0] are the
;; RMW parameters that when it comes to the vectorizer.
--
[-- Attachment #2: rb14660.patch --]
[-- Type: text/x-diff, Size: 1149 bytes --]
diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index 7397f1ec5ca0cb9e3cdd5c46772f604e640666e4..51789f954affd9fa88e2bc1bcc3dacf64ccb5bde 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -635,18 +635,12 @@ (define_insn "aarch64_usdot<vsi2qi>"
;; and so the vectorizer provides r, in which the result has to be accumulated.
(define_expand "<sur>dot_prod<vsi2qi>"
[(set (match_operand:VS 0 "register_operand")
- (plus:VS (unspec:VS [(match_operand:<VSI2QI> 1 "register_operand")
+ (plus:VS (match_operand:VS 3 "register_operand")
+ (unspec:VS [(match_operand:<VSI2QI> 1 "register_operand")
(match_operand:<VSI2QI> 2 "register_operand")]
- DOTPROD)
- (match_operand:VS 3 "register_operand")))]
+ DOTPROD)))]
"TARGET_DOTPROD"
-{
- emit_insn (
- gen_aarch64_<sur>dot<vsi2qi> (operands[3], operands[3], operands[1],
- operands[2]));
- emit_insn (gen_rtx_SET (operands[0], operands[3]));
- DONE;
-})
+)
;; Auto-vectorizer pattern for usdot. The operand[3] and operand[0] are the
;; RMW parameters that when it comes to the vectorizer.
next prev parent reply other threads:[~2021-07-15 16:40 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-15 16:39 [PATCH 1/4][committed] testsuite: Fix testisms in scalar tests PR101457 Tamar Christina
2021-07-15 16:39 ` [PATCH 2/4]AArch64: correct usdot vectorizer and intrinsics optabs Tamar Christina
2021-07-15 19:34 ` Richard Sandiford
2021-07-20 12:34 ` Tamar Christina
2021-07-20 16:15 ` Richard Sandiford
2021-07-22 11:50 ` Tamar Christina
2021-07-22 18:09 ` Richard Sandiford
2021-07-15 16:40 ` Tamar Christina [this message]
2021-07-15 19:44 ` [PATCH 3/4]AArch64: correct dot-product RTL patterns for aarch64 Richard Sandiford
2021-07-22 11:51 ` Tamar Christina
2021-07-22 18:11 ` Richard Sandiford
2021-07-23 8:14 ` Tamar Christina
2021-07-26 13:56 ` Richard Sandiford
2021-07-15 16:40 ` [PATCH 4/4][AArch32]: correct dot-product RTL patterns Tamar Christina
2021-07-16 2:20 ` [PATCH 1/4][committed] testsuite: Fix testisms in scalar tests PR101457 H.J. Lu
2021-07-16 8:42 ` Tamar Christina
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