From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by sourceware.org (Postfix) with ESMTPS id A1F20393F82B for ; Wed, 4 Aug 2021 12:39:34 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org A1F20393F82B X-IronPort-AV: E=McAfee;i="6200,9189,10065"; a="194190985" X-IronPort-AV: E=Sophos;i="5.84,294,1620716400"; d="scan'208";a="194190985" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2021 05:39:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,294,1620716400"; d="scan'208";a="467096628" Received: from scymds01.sc.intel.com ([10.148.94.138]) by orsmga008.jf.intel.com with ESMTP; 04 Aug 2021 05:39:32 -0700 Received: from shliclel320.sh.intel.com (shliclel320.sh.intel.com [10.239.236.50]) by scymds01.sc.intel.com with ESMTP id 174CdS85027267; Wed, 4 Aug 2021 05:39:31 -0700 From: liuhongt To: gcc-patches@gcc.gnu.org Subject: [PATCH 2/3] [i386] Support cond_{smax, smin} for vector float/double modes under AVX512. Date: Wed, 4 Aug 2021 20:39:27 +0800 Message-Id: <20210804123928.90586-3-hongtao.liu@intel.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20210804123928.90586-1-hongtao.liu@intel.com> References: <20210804123928.90586-1-hongtao.liu@intel.com> X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 04 Aug 2021 12:39:36 -0000 gcc/ChangeLog: * config/i386/sse.md (cond_): New expander. gcc/testsuite/ChangeLog: * gcc.target/i386/cond_op_maxmin_double-1.c: New test. * gcc.target/i386/cond_op_maxmin_double-2.c: New test. * gcc.target/i386/cond_op_maxmin_float-1.c: New test. * gcc.target/i386/cond_op_maxmin_float-2.c: New test. --- gcc/config/i386/sse.md | 18 +++++ .../gcc.target/i386/cond_op_maxmin_double-1.c | 39 +++++++++++ .../gcc.target/i386/cond_op_maxmin_double-2.c | 67 +++++++++++++++++++ .../gcc.target/i386/cond_op_maxmin_float-1.c | 8 +++ .../gcc.target/i386/cond_op_maxmin_float-2.c | 5 ++ 5 files changed, 137 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_double-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_double-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_float-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_float-2.c diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 6035411ea75..51733a3849d 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -2376,6 +2376,24 @@ (define_insn "*sse_vmrsqrtv4sf2" (set_attr "prefix" "orig,vex") (set_attr "mode" "SF")]) +(define_expand "cond_" + [(set (match_operand:VF 0 "register_operand") + (vec_merge:VF + (smaxmin:VF + (match_operand:VF 2 "vector_operand") + (match_operand:VF 3 "vector_operand")) + (match_operand:VF 4 "nonimm_or_0_operand") + (match_operand: 1 "register_operand")))] + " == 64 || TARGET_AVX512VL" +{ + emit_insn (gen_3_mask (operands[0], + operands[2], + operands[3], + operands[4], + operands[1])); + DONE; +}) + (define_expand "3" [(set (match_operand:VF 0 "register_operand") (smaxmin:VF diff --git a/gcc/testsuite/gcc.target/i386/cond_op_maxmin_double-1.c b/gcc/testsuite/gcc.target/i386/cond_op_maxmin_double-1.c new file mode 100644 index 00000000000..eda8e1974b9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/cond_op_maxmin_double-1.c @@ -0,0 +1,39 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=skylake-avx512 -fdump-tree-optimized" } */ +/* { dg-final { scan-tree-dump ".COND_MAX" "optimized" } } */ +/* { dg-final { scan-tree-dump ".COND_MIN" "optimized" } } */ +/* { dg-final { scan-assembler-times "vmaxpd" 1 } } */ +/* { dg-final { scan-assembler-times "vminpd" 1 } } */ + +#include +#ifndef NUM +#define NUM 800 +#endif +#ifndef TYPE +#define TYPE double +#endif +#ifndef FN_MAX +#define FN_MAX fmax +#endif +#ifndef FN_MIN +#define FN_MIN fmin +#endif + +TYPE a[NUM], b[NUM], c[NUM], d[NUM], e[NUM], j[NUM]; +#define MAX FN_MAX +#define MIN FN_MIN + +#define BIN(OPNAME, OP) \ + void \ + __attribute__ ((noipa,optimize ("Ofast"))) \ + foo_##OPNAME () \ + { \ + for (int i = 0; i != NUM; i++) \ + if (b[i] < c[i]) \ + a[i] = (OP (d[i], e[i])); \ + else \ + a[i] = d[i] - e[i]; \ + } + +BIN (max, MAX); +BIN (min, MIN); diff --git a/gcc/testsuite/gcc.target/i386/cond_op_maxmin_double-2.c b/gcc/testsuite/gcc.target/i386/cond_op_maxmin_double-2.c new file mode 100644 index 00000000000..c50a831000a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/cond_op_maxmin_double-2.c @@ -0,0 +1,67 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -mprefer-vector-width=256 -ffast-math" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512VL +#ifndef CHECK +#define CHECK "avx512f-helper.h" +#endif + +#include CHECK + +#include "cond_op_maxmin_double-1.c" +#define BINO2(OPNAME, OP) \ + void \ + __attribute__ ((noipa)) \ + foo_o2_##OPNAME () \ + { \ + for (int i = 0; i != NUM; i++) \ + if (b[i] < c[i]) \ + j[i] = OP(d[i], e[i]); \ + else \ + j[i] = d[i] - e[i]; \ + } + +BINO2 (max, MAX); +BINO2 (min, MIN); + +static void +test_256 (void) +{ + int sign = -1; + for (int i = 0; i != NUM; i++) + { + a[i] = 0; + d[i] = i * 2; + e[i] = i * i * 3 - i * 9 + 153; + b[i] = i * 83; + c[i] = b[i] + sign; + sign *= -1; + j[i] = 1; + } + foo_max (); + foo_o2_max (); + for (int i = 0; i != NUM; i++) + { + if (a[i] != j[i]) + abort (); + a[i] = 0; + b[i] = 1; + } + + foo_min (); + foo_o2_min (); + for (int i = 0; i != NUM; i++) + { + if (a[i] != j[i]) + abort (); + a[i] = 0; + j[i] = 1; + } +} + +static void +test_128 () +{ + +} diff --git a/gcc/testsuite/gcc.target/i386/cond_op_maxmin_float-1.c b/gcc/testsuite/gcc.target/i386/cond_op_maxmin_float-1.c new file mode 100644 index 00000000000..2d2157d87a5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/cond_op_maxmin_float-1.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=skylake-avx512 -DTYPE=float -fdump-tree-optimized -DFN_MAX=fmaxf -DFN_MIN=fminf" } */ +/* { dg-final { scan-tree-dump ".COND_MAX" "optimized" } } */ +/* { dg-final { scan-tree-dump ".COND_MIN" "optimized" } } */ +/* { dg-final { scan-assembler-times "vmaxps" 1 } } */ +/* { dg-final { scan-assembler-times "vminps" 1 } } */ + +#include "cond_op_maxmin_double-1.c" diff --git a/gcc/testsuite/gcc.target/i386/cond_op_maxmin_float-2.c b/gcc/testsuite/gcc.target/i386/cond_op_maxmin_float-2.c new file mode 100644 index 00000000000..fec784e5ded --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/cond_op_maxmin_float-2.c @@ -0,0 +1,5 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -mprefer-vector-width=256 -DTYPE=float -DFN_MAX=fmaxf -DFN_MIN=fminf" } */ +/* { dg-require-effective-target avx512vl } */ + +#include "cond_op_maxmin_double-2.c" -- 2.18.1