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The mail system : host zimbra2.kalray.eu[195.135.97.26] said: 550 5.1.1 : Recipient address rejected: User unknown in virtual mailbox table (in reply to RCPT TO command) --150AB233363.1628585157/fx308.security-mail.net Content-Description: Delivery report Content-Type: message/delivery-status Reporting-MTA: dns; fx308.security-mail.net X-Postfix-Queue-ID: 150AB233363 X-Postfix-Sender: rfc822; gcc-patches@gcc.gnu.org Arrival-Date: Tue, 10 Aug 2021 10:45:57 +0200 (CEST) Final-Recipient: rfc822; marc.poulhies@kalray.eu Original-Recipient: rfc822;marc.poulhies@kalray.eu Action: failed Status: 5.1.1 Remote-MTA: dns; zimbra2.kalray.eu Diagnostic-Code: smtp; 550 5.1.1 : Recipient address rejected: User unknown in virtual mailbox table --150AB233363.1628585157/fx308.security-mail.net Content-Description: Undelivered Message Content-Type: message/rfc822 Return-Path: Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) by fx308.security-mail.net (Postfix) with ESMTPS id D723723334A for ; Tue, 10 Aug 2021 10:45:55 +0200 (CEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id BF8993951C39 for ; Tue, 10 Aug 2021 08:45:54 +0000 (GMT) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by sourceware.org (Postfix) with ESMTP id A5F143857C65 for ; Tue, 10 Aug 2021 08:44:54 +0000 (GMT) Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-509--Jz_moQ5P7GG4905RpoyuQ-1; Tue, 10 Aug 2021 04:44:50 -0400 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 772CA93920; Tue, 10 Aug 2021 08:44:49 +0000 (UTC) Received: from tucnak.zalov.cz (unknown [10.39.193.120]) by smtp.corp.redhat.com (Postfix) with ESMTPS id F068310016F8; Tue, 10 Aug 2021 08:44:48 +0000 (UTC) Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.16.1/8.16.1) with ESMTPS id 17A8ikGN1032769 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Tue, 10 Aug 2021 10:44:47 +0200 Received: (from jakub@localhost) by tucnak.zalov.cz (8.16.1/8.16.1/Submit) id 17A8ikja1032768; Tue, 10 Aug 2021 10:44:46 +0200 X-Quarantine-ID: <4dWmImcjwwLb> X-Virus-Scanned: E-securemail, by Secumail X-Spam-Status: No, score=-1.786 tagged_above=-1000 required=7.5 tests=[AB_ENVFROM_LONG_40=0.5, AB_LONG_SUBJ_30=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-1, DKIM_VALID_AU=-0.1, FSL_RCVD_EX_GT_5=1, FSL_RCVD_UT_GT_5=0.01, HEAD_NEWS=-0.5, MISSING_MID=0.14, MM_ENVFROM_BOUNCE=1, RCVD_IN_DNSWL_MED=-1.3, RDNS_DYNAMIC=0.363, S_FROM_GREY_MINUS_2=-2] autolearn=disabled Authentication-Results: fx308.security-mail.net (amavisd-new); dkim=pass (1024-bit key) header.d=gcc.gnu.org Secumail-id: <4396.61123cc3.d5d9a.0> DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org BF8993951C39 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1628585154; bh=ZAI9R+gKID8BekW6uHpmUrl9piIQb2ielEmmems8YpY=; h=Date:To:Subject:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=n8fB+jrG8wBDcSo9o/EFkH1HXB8GD8izmiO7tXOvFs2Qw56PqXVIRe89oMGaSilS3 9r2jIph65qYqlXrscbTH8htdXCPLvtAafIN7ZEZrbLYqUw59D3a8nEF9RpxplVs2gU pAKnSCin+xFWXT6R8Et3ysrBrC7x0Jz2lKbFACqw= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org A5F143857C65 X-MC-Unique: -Jz_moQ5P7GG4905RpoyuQ-1 Date: Tue, 10 Aug 2021 10:44:46 +0200 To: Hongtao Liu Subject: [PATCH] i386: Improve single operand AVX512F permutations [PR80355] Message-ID: <20210810084446.GI2380545@tucnak> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Jakub Jelinek via Gcc-patches Reply-To: Jakub Jelinek Cc: gcc-patches@gcc.gnu.org Errors-To: gcc-patches-bounces+marc.poulhies=kalray.eu@gcc.gnu.org Sender: Gcc-patches X-ALTERMIMEV2_in: done Content-Type: text/plain; charset=utf-8 Hi! On the following testcase we emit vmovdqa32 .LC0(%rip), %zmm1 vpermd %zmm0, %zmm1, %zmm0 and vmovdqa64 .LC1(%rip), %zmm1 vpermq %zmm0, %zmm1, %zmm0 instead of vshufi32x4 $78, %zmm0, %zmm0, %zmm0 and vshufi64x2 $78, %zmm0, %zmm0, %zmm0 we can emit with the patch. We have patterns that match two argument permutations for vshuf[if]*, but for one argument it doesn't trigger. Either we can add two patterns for that, or we would need to add another routine to i386-expand.c that would transform under certain condition these cases to the two argument vshuf*, doing it in sse.md looked simpler. We don't need this for 32-byte vectors, we already emit single insn permutation that doesn't need memory op there. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2021-08-10 Jakub Jelinek PR target/80355 * config/i386/sse.md (*avx512f_shuf_64x2_1_1, *avx512f_shuf_32x4_1_1): New define_insn patterns. * gcc.target/i386/avx512f-pr80355-1.c: New test. --- gcc/config/i386/sse.md.jj 2021-08-05 10:26:15.592554985 +0200 +++ gcc/config/i386/sse.md 2021-08-09 13:31:49.025479889 +0200 @@ -15320,6 +15320,42 @@ (define_insn "avx512f_shuf_ (set_attr "prefix" "evex") (set_attr "mode" "")]) +(define_insn "*avx512f_shuf_64x2_1_1" + [(set (match_operand:V8FI 0 "register_operand" "=v") + (vec_select:V8FI + (match_operand:V8FI 1 "register_operand" "v") + (parallel [(match_operand 2 "const_0_to_7_operand") + (match_operand 3 "const_0_to_7_operand") + (match_operand 4 "const_0_to_7_operand") + (match_operand 5 "const_0_to_7_operand") + (match_operand 6 "const_0_to_7_operand") + (match_operand 7 "const_0_to_7_operand") + (match_operand 8 "const_0_to_7_operand") + (match_operand 9 "const_0_to_7_operand")])))] + "TARGET_AVX512F + && (INTVAL (operands[2]) & 1) == 0 + && INTVAL (operands[2]) == INTVAL (operands[3]) - 1 + && (INTVAL (operands[4]) & 1) == 0 + && INTVAL (operands[4]) == INTVAL (operands[5]) - 1 + && (INTVAL (operands[6]) & 1) == 0 + && INTVAL (operands[6]) == INTVAL (operands[7]) - 1 + && (INTVAL (operands[8]) & 1) == 0 + && INTVAL (operands[8]) == INTVAL (operands[9]) - 1" +{ + int mask; + mask = INTVAL (operands[2]) / 2; + mask |= INTVAL (operands[4]) / 2 << 2; + mask |= INTVAL (operands[6]) / 2 << 4; + mask |= INTVAL (operands[8]) / 2 << 6; + operands[2] = GEN_INT (mask); + + return "vshuf64x2\t{%2, %1, %1, %0|%0, %1, %1, %2}"; +} + [(set_attr "type" "sselog") + (set_attr "length_immediate" "1") + (set_attr "prefix" "evex") + (set_attr "mode" "")]) + (define_expand "avx512vl_shuf_32x4_mask" [(match_operand:VI4F_256 0 "register_operand") (match_operand:VI4F_256 1 "register_operand") @@ -15463,6 +15499,58 @@ (define_insn "avx512f_shuf_ } [(set_attr "type" "sselog") (set_attr "length_immediate" "1") + (set_attr "prefix" "evex") + (set_attr "mode" "")]) + +(define_insn "*avx512f_shuf_32x4_1_1" + [(set (match_operand:V16FI 0 "register_operand" "=v") + (vec_select:V16FI + (match_operand:V16FI 1 "register_operand" "v") + (parallel [(match_operand 2 "const_0_to_15_operand") + (match_operand 3 "const_0_to_15_operand") + (match_operand 4 "const_0_to_15_operand") + (match_operand 5 "const_0_to_15_operand") + (match_operand 6 "const_0_to_15_operand") + (match_operand 7 "const_0_to_15_operand") + (match_operand 8 "const_0_to_15_operand") + (match_operand 9 "const_0_to_15_operand") + (match_operand 10 "const_0_to_15_operand") + (match_operand 11 "const_0_to_15_operand") + (match_operand 12 "const_0_to_15_operand") + (match_operand 13 "const_0_to_15_operand") + (match_operand 14 "const_0_to_15_operand") + (match_operand 15 "const_0_to_15_operand") + (match_operand 16 "const_0_to_15_operand") + (match_operand 17 "const_0_to_15_operand")])))] + "TARGET_AVX512F + && (INTVAL (operands[2]) & 3) == 0 + && INTVAL (operands[2]) == INTVAL (operands[3]) - 1 + && INTVAL (operands[2]) == INTVAL (operands[4]) - 2 + && INTVAL (operands[2]) == INTVAL (operands[5]) - 3 + && (INTVAL (operands[6]) & 3) == 0 + && INTVAL (operands[6]) == INTVAL (operands[7]) - 1 + && INTVAL (operands[6]) == INTVAL (operands[8]) - 2 + && INTVAL (operands[6]) == INTVAL (operands[9]) - 3 + && (INTVAL (operands[10]) & 3) == 0 + && INTVAL (operands[10]) == INTVAL (operands[11]) - 1 + && INTVAL (operands[10]) == INTVAL (operands[12]) - 2 + && INTVAL (operands[10]) == INTVAL (operands[13]) - 3 + && (INTVAL (operands[14]) & 3) == 0 + && INTVAL (operands[14]) == INTVAL (operands[15]) - 1 + && INTVAL (operands[14]) == INTVAL (operands[16]) - 2 + && INTVAL (operands[14]) == INTVAL (operands[17]) - 3" +{ + int mask; + mask = INTVAL (operands[2]) / 4; + mask |= INTVAL (operands[6]) / 4 << 2; + mask |= INTVAL (operands[10]) / 4 << 4; + mask |= INTVAL (operands[14]) / 4 << 6; + operands[2] = GEN_INT (mask); + + return "vshuf32x4\t{%2, %1, %1, %0|%0, %1, %1, %2}"; +} + [(set_attr "type" "sselog") + (set_attr "length_immediate" "1") (set_attr "prefix" "evex") (set_attr "mode" "")]) --- gcc/testsuite/gcc.target/i386/avx512f-pr80355-1.c.jj 2021-08-09 13:42:14.621904142 +0200 +++ gcc/testsuite/gcc.target/i386/avx512f-pr80355-1.c 2021-08-09 13:04:10.070249292 +0200 @@ -0,0 +1,19 @@ +/* PR target/80355 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512f -mno-avx512vl -mno-avx512dq" } */ +/* { dg-final { scan-assembler "\tvshufi32x4\t" } } */ +/* { dg-final { scan-assembler "\tvshufi64x2\t" } } */ + +typedef long long V __attribute__((vector_size (64))); +typedef int W __attribute__((vector_size (64))); + +W +f0 (W x) +{ + return __builtin_shuffle (x, (W) { 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7 }); +} +V +f1 (V x) +{ + return __builtin_shuffle (x, (V) { 4, 5, 6, 7, 0, 1, 2, 3 }); +} Jakub To declare a filtering error, please use the following link : https://www.security-mail.net/reporter.php?mid=4396.61123cc3.d5d9a.0&r=marc.poulhies%40kalray.eu&s=gcc-patches-bounces%2Bmarc.poulhies%3Dkalray.eu%40gcc.gnu.org&o=%5BPATCH%5D+i386%3A+Improve+single+operand+AVX512F+permutations+%5BPR80355%5D&verdict=C&c=fad81c81d65afd1829743f2dee200b4d084cffbb --150AB233363.1628585157/fx308.security-mail.net--