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From: Richard Earnshaw <rearnsha@arm.com>
To: gcc-patches@gcc.gnu.org
Cc: Richard Earnshaw <rearnsha@arm.com>,
	richard.guenther@gmail.com, bernd.edlinger@hotmail.de
Subject: [PATCH 0/3] lower more cases of memcpy [PR102125]
Date: Mon,  6 Sep 2021 11:40:15 +0100	[thread overview]
Message-ID: <20210906104018.2697413-1-rearnsha@arm.com> (raw)

This short patch series is designed to address some more cases where we
can usefully lower memcpy operations during gimple fold.  The current
code restricts this lowering to a maximum size of MOVE_MAX, ie the size
of a single integer register on the machine, but with modern architectures
this is likely too restrictive.  The motivating example is

uint64_t bar64(const uint8_t *rData1)
{
    uint64_t buffer;
    __builtin_memcpy(&buffer, rData1, sizeof(buffer));
    return buffer;
}

which on a 32-bit machine ends up with an inlined memcpy followed by a load
from the copied buffer.

The patch series is in three parts, although the middle patch is an
arm-specific tweak to handle unaligned 64-bit moves on more versions
of the Arm architecture.

Patch 1 relaxes slightly the restriction added by Bernd for PR 100106.
That patch was intended to prevent a situation such as (subreg:DI
(mem:SI (A32)) was forming a misaligned DI mem when the underlying mem
was naturally aligned.  However, if the underlying mem is already unaligned
for the inner mode, forming a new unaligned mem shouldn't be a problem, so
permit this case.

Patch 2 addresses an issue in the arm backend.  Currently movmisaligndi
only supports vector targets.  This patch reworks the code so that
the pattern can work on any architecture version that supports misaligned
accesses.

Patch 3 then relaxes the gimple fold simplification of memcpy to allow
larger memcpy operations to be folded away, provided that the total size
is less than MOVE_MAX * MOVE_RATIO and provided that the machine has a
suitable SET insn for the appropriate integer mode.

With these three changes, the testcase above now optimizes to

        mov     r3, r0
        ldr     r0, [r0]        @ unaligned
        ldr     r1, [r3, #4]    @ unaligned
        bx      lr
R.


Richard Earnshaw (3):
  rtl: allow forming subregs of already unaligned mems [PR102125]
  arm: expand handling of movmisalign for DImode [PR102125]
  gimple: allow more folding of memcpy [PR102125]

 gcc/config/arm/arm.md        | 34 ++++++++++++++++++++++++++++++++++
 gcc/config/arm/vec-common.md |  4 ++--
 gcc/gimple-fold.c            | 16 +++++++++++-----
 gcc/simplify-rtx.c           |  6 +++++-
 4 files changed, 52 insertions(+), 8 deletions(-)

-- 
2.25.1


             reply	other threads:[~2021-09-06 10:40 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-06 10:40 Richard Earnshaw [this message]
2021-09-06 10:40 ` [PATCH 1/3] rtl: allow forming subregs of already unaligned mems [PR102125] Richard Earnshaw
2021-09-06 10:58   ` Richard Biener
2021-09-06 11:08     ` Richard Earnshaw
2021-09-06 11:13       ` Richard Biener
2021-09-06 11:23         ` Richard Earnshaw
2021-09-06 12:01           ` Richard Biener
2021-09-06 10:40 ` [PATCH 2/3] arm: expand handling of movmisalign for DImode [PR102125] Richard Earnshaw
2021-09-06 10:40 ` [PATCH 3/3] gimple: allow more folding of memcpy [PR102125] Richard Earnshaw
2021-09-06 10:51   ` Richard Biener

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