From: liuhongt <hongtao.liu@intel.com>
To: gcc-patches@gcc.gnu.org
Cc: meissner@linux.ibm.com, segher@kernel.crashing.org,
richard.guenther@gmail.com, jimw@sifive.com,
schwab@linux-m68k.org, andrew@sifive.com, asolokha@gmx.com
Subject: [PATCH 1/2] Revert "Get rid of all float-int special cases in validate_subreg."
Date: Fri, 10 Sep 2021 20:58:17 +0800 [thread overview]
Message-ID: <20210910125818.334531-2-hongtao.liu@intel.com> (raw)
In-Reply-To: <20210910125818.334531-1-hongtao.liu@intel.com>
This reverts commit d2874d905647a1d146dafa60199d440e837adc4d.
PR target/102254
PR target/102154
PR target/102211
---
gcc/emit-rtl.c | 40 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 77ea8948ee8..ff3b4449b37 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -922,6 +922,46 @@ validate_subreg (machine_mode omode, machine_mode imode,
poly_uint64 regsize = REGMODE_NATURAL_SIZE (imode);
+ /* ??? This should not be here. Temporarily continue to allow word_mode
+ subregs of anything. The most common offender is (subreg:SI (reg:DF)).
+ Generally, backends are doing something sketchy but it'll take time to
+ fix them all. */
+ if (omode == word_mode)
+ ;
+ /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
+ is the culprit here, and not the backends. */
+ else if (known_ge (osize, regsize) && known_ge (isize, osize))
+ ;
+ /* Allow component subregs of complex and vector. Though given the below
+ extraction rules, it's not always clear what that means. */
+ else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
+ && GET_MODE_INNER (imode) == omode)
+ ;
+ /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
+ i.e. (subreg:V4SF (reg:SF) 0) or (subreg:V4SF (reg:V2SF) 0). This
+ surely isn't the cleanest way to represent this. It's questionable
+ if this ought to be represented at all -- why can't this all be hidden
+ in post-reload splitters that make arbitrarily mode changes to the
+ registers themselves. */
+ else if (VECTOR_MODE_P (omode)
+ && GET_MODE_INNER (omode) == GET_MODE_INNER (imode))
+ ;
+ /* Subregs involving floating point modes are not allowed to
+ change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
+ (subreg:SI (reg:DF) 0) isn't. */
+ else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
+ {
+ if (! (known_eq (isize, osize)
+ /* LRA can use subreg to store a floating point value in
+ an integer mode. Although the floating point and the
+ integer modes need the same number of hard registers,
+ the size of floating point mode can be less than the
+ integer mode. LRA also uses subregs for a register
+ should be used in different mode in on insn. */
+ || lra_in_progress))
+ return false;
+ }
+
/* Paradoxical subregs must have offset zero. */
if (maybe_gt (osize, isize))
return known_eq (offset, 0U);
--
2.27.0
next prev parent reply other threads:[~2021-09-10 12:58 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-10 12:58 [PATCH 0/2] Revert r12-3277 since it caused regressions on many other targets liuhongt
2021-09-10 12:58 ` liuhongt [this message]
2021-09-10 13:05 ` [PATCH 1/2] Revert "Get rid of all float-int special cases in validate_subreg." Richard Biener
2021-09-10 12:58 ` [PATCH 2/2] validate_subreg before call gen_lowpart to avoid ICE liuhongt
2021-09-10 13:15 ` Richard Biener
2021-09-10 13:27 ` Hongtao Liu
2021-09-10 13:32 ` Richard Biener
2021-09-10 13:44 ` Hongtao Liu
2021-09-10 14:25 ` Hongtao Liu
2021-09-10 21:19 ` Segher Boessenkool
2021-09-11 0:29 ` Hongtao Liu
2021-09-11 1:04 ` Hongtao Liu
2021-09-10 13:52 ` Hongtao Liu
2021-09-10 13:39 ` Hongtao Liu
2021-09-10 13:30 ` Segher Boessenkool
2021-09-10 13:58 ` Richard Biener
2021-09-10 16:24 ` Segher Boessenkool
2021-09-10 18:36 ` Richard Biener
2021-09-10 21:27 ` Segher Boessenkool
2021-09-11 8:25 ` Richard Biener
2021-09-11 9:51 ` Hongtao Liu
2021-09-11 11:09 ` Hongtao Liu
2021-09-13 6:10 ` Richard Biener
2021-09-13 6:32 ` Hongtao Liu
2021-09-13 9:15 ` Richard Biener
2021-09-13 11:14 ` Hongtao Liu
2021-09-13 11:44 ` Tobias Burnus
2021-09-13 11:45 ` Richard Biener
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210910125818.334531-2-hongtao.liu@intel.com \
--to=hongtao.liu@intel.com \
--cc=andrew@sifive.com \
--cc=asolokha@gmx.com \
--cc=gcc-patches@gcc.gnu.org \
--cc=jimw@sifive.com \
--cc=meissner@linux.ibm.com \
--cc=richard.guenther@gmail.com \
--cc=schwab@linux-m68k.org \
--cc=segher@kernel.crashing.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).