From: Geng Qi <gengqi@linux.alibaba.com>
To: gcc-patches@gcc.gnu.org, cooper.qu@linux.alibaba.com
Cc: Geng Qi <gengqi@linux.alibaba.com>
Subject: [PATCH] RISC-V: Pattern name fix mulm3_highpart -> smulm3_highpart.
Date: Mon, 27 Sep 2021 19:37:45 +0800 [thread overview]
Message-ID: <20210927113745.171-1-gengqi@linux.alibaba.com> (raw)
gcc/ChangeLog:
* config/riscv/riscv.md
(<u>muldi3_highpart): Rename to <su>muldi3_highpart.
(<u>mulditi3): Emit <su>muldi3_highpart.
(<u>mulsi3_highpart): Rename to <su>mulsi3_highpart.
(<u>mulsidi3): Emit <su>mulsi3_highpart.
---
gcc/config/riscv/riscv.md | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index f88877fd596..3115a508bdf 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -899,14 +899,14 @@
emit_insn (gen_muldi3 (low, operands[1], operands[2]));
rtx high = gen_reg_rtx (DImode);
- emit_insn (gen_<u>muldi3_highpart (high, operands[1], operands[2]));
+ emit_insn (gen_<su>muldi3_highpart (high, operands[1], operands[2]));
emit_move_insn (gen_lowpart (DImode, operands[0]), low);
emit_move_insn (gen_highpart (DImode, operands[0]), high);
DONE;
})
-(define_insn "<u>muldi3_highpart"
+(define_insn "<su>muldi3_highpart"
[(set (match_operand:DI 0 "register_operand" "=r")
(truncate:DI
(lshiftrt:TI
@@ -961,13 +961,13 @@
{
rtx temp = gen_reg_rtx (SImode);
emit_insn (gen_mulsi3 (temp, operands[1], operands[2]));
- emit_insn (gen_<u>mulsi3_highpart (riscv_subword (operands[0], true),
+ emit_insn (gen_<su>mulsi3_highpart (riscv_subword (operands[0], true),
operands[1], operands[2]));
emit_insn (gen_movsi (riscv_subword (operands[0], false), temp));
DONE;
})
-(define_insn "<u>mulsi3_highpart"
+(define_insn "<su>mulsi3_highpart"
[(set (match_operand:SI 0 "register_operand" "=r")
(truncate:SI
(lshiftrt:DI
--
2.22.0.windows.1
next reply other threads:[~2021-09-27 11:37 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-27 11:37 Geng Qi [this message]
2021-09-28 23:44 ` Jim Wilson
2021-09-28 23:48 ` [PATCH] RISC-V: Pattern name fix mul*3_highpart -> smul*3_highpart Jim Wilson
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