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From: Segher Boessenkool <segher@kernel.crashing.org>
To: "Paul A. Clarke" <pc@us.ibm.com>
Cc: gcc-patches@gcc.gnu.org, wschmidt@linux.ibm.com
Subject: Re: [PATCH v3 1/6] rs6000: Support SSE4.1 "round" intrinsics
Date: Mon, 11 Oct 2021 17:04:12 -0500	[thread overview]
Message-ID: <20211011220412.GD10333@gate.crashing.org> (raw)
In-Reply-To: <20211011173107.GH243632@li-24c3614c-2adc-11b2-a85c-85f334518bdb.ibm.com>

Hi!

On Mon, Oct 11, 2021 at 12:31:07PM -0500, Paul A. Clarke wrote:
> On Mon, Oct 11, 2021 at 11:28:39AM -0500, Segher Boessenkool wrote:
> > > Very similar methods are used in glibc today. Are those broken?
> > 
> > Maybe.
> 
> Ouch.

So show the code?

> > If you get a real (i.e. not inline) function call there, that
> > can save you often.
> 
> Calling a real function in order to execute a single instruction is
> sub-optimal. ;-)

Calling a real function (that does not even need a stack frame, just a
blr) is not terribly expensive, either.

> > > Would creating a __builtin_mffsce be another solution?
> > 
> > Yes.  And not a bad idea in the first place.
> 
> The previous "Nope" and this "Yes" seem in contradiction. If there is no
> difference between "asm" and builtin, how does using a builtin solve the
> problem?

You will have to make the builtin solve it.  What a builtin can do is
virtually unlimited.  What an asm can do is not: it just outputs some
assembler language, and does in/out/clobber constraints.  You can do a
*lot* with that, but it is much more limited than everything you can do
in the compiler!  :-)

The fact remains that there is no way in RTL (or Gimple for that matter)
to express things like rounding mode changes.  You will need to
artificially make some barriers.


Segher

  reply	other threads:[~2021-10-11 22:06 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-23 19:03 [PATCH v3 0/6] rs6000: Support more SSE4 intrinsics Paul A. Clarke
2021-08-23 19:03 ` [PATCH v3 1/6] rs6000: Support SSE4.1 "round" intrinsics Paul A. Clarke
2021-08-27 13:44   ` Bill Schmidt
2021-08-27 13:47     ` Bill Schmidt
2021-08-30 21:16     ` Paul A. Clarke
2021-08-30 21:24       ` Bill Schmidt
2021-10-07 23:08       ` Segher Boessenkool
2021-10-07 23:39   ` Segher Boessenkool
2021-10-08  1:04     ` Paul A. Clarke
2021-10-08 17:39       ` Segher Boessenkool
2021-10-08 19:27         ` Paul A. Clarke
2021-10-08 22:31           ` Segher Boessenkool
2021-10-11 13:46             ` Paul A. Clarke
2021-10-11 16:28               ` Segher Boessenkool
2021-10-11 17:31                 ` Paul A. Clarke
2021-10-11 22:04                   ` Segher Boessenkool [this message]
2021-10-12 19:35                     ` Paul A. Clarke
2021-10-12 22:25                       ` Segher Boessenkool
2021-10-19  0:36                         ` Paul A. Clarke
2021-08-23 19:03 ` [PATCH v3 2/6] rs6000: Support SSE4.1 "min" and "max" intrinsics Paul A. Clarke
2021-08-27 13:47   ` Bill Schmidt
2021-10-11 19:28   ` Segher Boessenkool
2021-10-12  1:42     ` [COMMITTED v4 " Paul A. Clarke
2021-08-23 19:03 ` [PATCH v3 3/6] rs6000: Simplify some SSE4.1 "test" intrinsics Paul A. Clarke
2021-08-27 13:48   ` Bill Schmidt
2021-10-11 20:50   ` Segher Boessenkool
2021-10-12  1:47     ` [COMMITTED v4 " Paul A. Clarke
2021-08-23 19:03 ` [PATCH v3 4/6] rs6000: Support SSE4.1 "cvt" intrinsics Paul A. Clarke
2021-08-27 13:49   ` Bill Schmidt
2021-10-11 21:52   ` Segher Boessenkool
2021-10-12  1:51     ` [COMMITTED v4 " Paul A. Clarke
2021-08-23 19:03 ` [PATCH v3 5/6] rs6000: Support more SSE4 "cmp", "mul", "pack" intrinsics Paul A. Clarke
2021-08-27 15:21   ` Bill Schmidt
2021-08-27 18:52     ` Paul A. Clarke
2021-10-11 23:07   ` Segher Boessenkool
2021-10-12  1:55     ` [COMMITTED v4 " Paul A. Clarke
2021-08-23 19:03 ` [PATCH v3 6/6] rs6000: Guard some x86 intrinsics implementations Paul A. Clarke
2021-08-27 15:25   ` Bill Schmidt
2021-10-12  0:11   ` Segher Boessenkool
2021-10-13 17:04     ` Paul A. Clarke
2021-10-13 23:47       ` Segher Boessenkool
2021-10-19  0:26         ` Paul A. Clarke
2021-09-16 14:59 ` [PATCH v3 0/6] rs6000: Support more SSE4 intrinsics Paul A. Clarke
2021-10-04 18:26   ` Paul A. Clarke
2021-10-07 22:25 ` Segher Boessenkool
2021-10-08  0:29   ` Paul A. Clarke
2021-10-12  0:15     ` Segher Boessenkool

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