* [PATCH 1/2] [Middle-end] Simplify (trunc)copysign((extend)a, (extend)b) to .COPYSIGN (a, b).
@ 2021-11-04 6:45 liuhongt
2021-11-04 6:45 ` [PATCH 2/2] [i386] Extend vternlog define_insn_and_split to memory_operand to enable more optimziation liuhongt
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: liuhongt @ 2021-11-04 6:45 UTC (permalink / raw)
To: gcc-patches
a and b are same type as the truncation type and has less precision
than extend type.
Bootstrapped and regtested on x86-64-pc-linux-gnu{-m32,}.
Ok for trunk?
gcc/ChangeLog:
PR target/102464
* match.pd: simplify (trunc)copysign((extend)a, (extend)b) to
.COPYSIGN (a,b) when a and b are same type as the truncation
type and has less precision than extend type.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr102464-copysign-1.c: New test.
---
gcc/match.pd | 13 +++
.../gcc.target/i386/pr102464-copysign-1.c | 80 +++++++++++++++++++
2 files changed, 93 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/i386/pr102464-copysign-1.c
diff --git a/gcc/match.pd b/gcc/match.pd
index 0734c45700c..f63079023d0 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -6169,6 +6169,19 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
&& direct_internal_fn_supported_p (as_internal_fn (tos),
type, OPTIMIZE_FOR_BOTH))
(tos @0))))
+
+/* Simplify (trunc) copysign ((extend)x, (extend)y) to copysignf (x, y),
+ x,y is float value, similar for _Float16/double. */
+(for copysigns (COPYSIGN_ALL)
+ (simplify
+ (convert (copysigns (convert@2 @0) (convert @1)))
+ (if (optimize
+ && types_match (type, TREE_TYPE (@0))
+ && types_match (type, TREE_TYPE (@1))
+ && TYPE_PRECISION (type) < TYPE_PRECISION (TREE_TYPE (@2))
+ && direct_internal_fn_supported_p (IFN_COPYSIGN,
+ type, OPTIMIZE_FOR_BOTH))
+ (IFN_COPYSIGN @0 @1))))
#endif
(for froms (XFLOORL XCEILL XROUNDL XRINTL)
diff --git a/gcc/testsuite/gcc.target/i386/pr102464-copysign-1.c b/gcc/testsuite/gcc.target/i386/pr102464-copysign-1.c
new file mode 100644
index 00000000000..95a39509738
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr102464-copysign-1.c
@@ -0,0 +1,80 @@
+/* PR target/102464. */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512vl -ftree-vectorize -mfpmath=sse -fdump-tree-optimized" } */
+
+#include<math.h>
+void foo1 (_Float16* __restrict a, _Float16* b, _Float16* c)
+{
+ for (int i = 0; i != 8; i++)
+ a[i] = copysignf (b[i], c[i]);
+}
+
+void foo2 (_Float16* __restrict a, _Float16* b, _Float16* c)
+{
+ for (int i = 0; i != 8; i++)
+ a[i] = copysign (b[i], c[i]);
+}
+
+void foo3 (_Float16* __restrict a, _Float16* b, _Float16* c)
+{
+ for (int i = 0; i != 8; i++)
+ a[i] = copysignl (b[i], c[i]);
+}
+
+void foo4 (float* __restrict a, float* b, float* c)
+{
+ for (int i = 0; i != 4; i++)
+ a[i] = copysign (b[i], c[i]);
+}
+
+void foo5 (float* __restrict a, float* b, float* c)
+{
+ for (int i = 0; i != 4; i++)
+ a[i] = copysignl (b[i], c[i]);
+}
+
+void foo6 (double* __restrict a, double* b, double* c)
+{
+ for (int i = 0; i != 4; i++)
+ a[i] = copysignl (b[i], c[i]);
+}
+
+void foo7 (_Float16* __restrict a, _Float16* b, _Float16* c)
+{
+ a[0] = copysignf (b[0], c[0]);
+}
+
+void foo8 (_Float16* __restrict a, _Float16* b, _Float16* c)
+{
+ a[0] = copysign (b[0], c[0]);
+}
+
+void foo9 (_Float16* __restrict a, _Float16* b, _Float16* c)
+{
+ a[0] = copysignl (b[0], c[0]);
+}
+
+void foo10 (float* __restrict a, float* b, float* c)
+{
+ a[0] = copysign (b[0], c[0]);
+}
+
+void foo11 (float* __restrict a, float* b, float* c)
+{
+ a[0] = copysignl (b[0], c[0]);
+}
+
+void foo12 (double* __restrict a, double* b, double* c)
+{
+ a[0] = copysignl (b[0], c[0]);
+}
+
+/* { dg-final { scan-assembler-not "vcvtsh2s\[sd\]" } } */
+/* { dg-final { scan-assembler-not "vcvtss2sd" } } */
+/* { dg-final { scan-assembler-not "fld" } } */
+/* { dg-final { scan-assembler-not "vcvtph2p\[sd\]" } } */
+/* { dg-final { scan-assembler-not "vcvtps2pd" } } */
+/* { dg-final { scan-assembler-not "extendhfxf" } } */
+/* { dg-final { scan-assembler-not "\\\{1to8\\\}" } } */
+/* { dg-final { scan-tree-dump-times "\.COPYSIGN" 12 "optimized" } } */
+/* { dg-final { scan-assembler-times "vpternlog" 12 } } */
--
2.18.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 2/2] [i386] Extend vternlog define_insn_and_split to memory_operand to enable more optimziation.
2021-11-04 6:45 [PATCH 1/2] [Middle-end] Simplify (trunc)copysign((extend)a, (extend)b) to .COPYSIGN (a, b) liuhongt
@ 2021-11-04 6:45 ` liuhongt
2021-11-04 7:47 ` [PATCH 1/2] [Middle-end] Simplify (trunc)copysign((extend)a, (extend)b) to .COPYSIGN (a,b) Richard Biener
2021-11-04 18:32 ` [PATCH 1/2] [Middle-end] Simplify (trunc)copysign((extend)a, (extend)b) to .COPYSIGN (a, b) Joseph Myers
2 siblings, 0 replies; 6+ messages in thread
From: liuhongt @ 2021-11-04 6:45 UTC (permalink / raw)
To: gcc-patches
Bootstrapped and regtested on x86-64-pc-linux-gnu{-m32,}.
Ready to push to trunk after first patch is approved.
gcc/ChangeLog:
PR target/101989
* config/i386/predicates.md (reg_or_notreg_operand): Rename to ..
(regmem_or_bitnot_regmem_operand): .. and extend to handle
memory_operand.
* config/i386/sse.md (*<avx512>_vpternlog<mode>_1): Force_reg
the operands which are required to be register_operand.
(*<avx512>_vpternlog<mode>_2): Ditto.
(*<avx512>_vpternlog<mode>_3): Ditto.
(*<avx512>_vternlog<mode>_all): Disallow embeded broadcast for
vector HFmodes since it's not a real AVX512FP16 instruction.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr101989-3.c: New test.
---
gcc/config/i386/predicates.md | 6 ++--
gcc/config/i386/sse.md | 41 +++++++++++++++-------
gcc/testsuite/gcc.target/i386/pr101989-3.c | 40 +++++++++++++++++++++
3 files changed, 72 insertions(+), 15 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr101989-3.c
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index df5acb425d4..114d8d448f1 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -1046,10 +1046,10 @@ (define_predicate "reg_or_pm1_operand"
;; True for registers, or (not: registers). Used to optimize 3-operand
;; bitwise operation.
-(define_predicate "reg_or_notreg_operand"
- (ior (match_operand 0 "register_operand")
+(define_predicate "regmem_or_bitnot_regmem_operand"
+ (ior (match_operand 0 "nonimmediate_operand")
(and (match_code "not")
- (match_test "register_operand (XEXP (op, 0), mode)"))))
+ (match_test "nonimmediate_operand (XEXP (op, 0), mode)"))))
;; True if OP is acceptable as operand of DImode shift expander.
(define_predicate "shiftdi_operand"
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 2764a250229..5aeb6065f13 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -11655,7 +11655,11 @@ (define_insn "*<avx512>_vternlog<mode>_all"
(match_operand:V 3 "bcst_vector_operand" "vmBr")
(match_operand:SI 4 "const_0_to_255_operand")]
UNSPEC_VTERNLOG))]
- "TARGET_AVX512F"
+ "TARGET_AVX512F
+/* Disallow embeded broadcast for vector HFmode since
+ it's not real AVX512FP16 instruction. */
+ && (GET_MODE_SIZE (GET_MODE_INNER (<MODE>mode)) >= 4
+ || GET_CODE (operands[3]) != VEC_DUPLICATE)"
"vpternlog<ternlogsuffix>\t{%4, %3, %2, %0|%0, %2, %3, %4}"
[(set_attr "type" "sselog")
(set_attr "prefix" "evex")
@@ -11683,11 +11687,11 @@ (define_insn_and_split "*<avx512>_vpternlog<mode>_1"
[(set (match_operand:V 0 "register_operand")
(any_logic:V
(any_logic1:V
- (match_operand:V 1 "reg_or_notreg_operand")
- (match_operand:V 2 "reg_or_notreg_operand"))
+ (match_operand:V 1 "regmem_or_bitnot_regmem_operand")
+ (match_operand:V 2 "regmem_or_bitnot_regmem_operand"))
(any_logic2:V
- (match_operand:V 3 "reg_or_notreg_operand")
- (match_operand:V 4 "reg_or_notreg_operand"))))]
+ (match_operand:V 3 "regmem_or_bitnot_regmem_operand")
+ (match_operand:V 4 "regmem_or_bitnot_regmem_operand"))))]
"(<MODE_SIZE> == 64 || TARGET_AVX512VL)
&& ix86_pre_reload_split ()
&& (rtx_equal_p (STRIP_UNARY (operands[1]),
@@ -11756,6 +11760,10 @@ (define_insn_and_split "*<avx512>_vpternlog<mode>_1"
operands[1] = STRIP_UNARY (operands[1]);
operands[2] = STRIP_UNARY (operands[2]);
operands[6] = STRIP_UNARY (operands[6]);
+ if (!register_operand (operands[2], <MODE>mode))
+ operands[2] = force_reg (<MODE>mode, operands[2]);
+ if (!register_operand (operands[6], <MODE>mode))
+ operands[6] = force_reg (<MODE>mode, operands[6]);
operands[5] = GEN_INT (reg_mask);
})
@@ -11764,10 +11772,10 @@ (define_insn_and_split "*<avx512>_vpternlog<mode>_2"
(any_logic:V
(any_logic1:V
(any_logic2:V
- (match_operand:V 1 "reg_or_notreg_operand")
- (match_operand:V 2 "reg_or_notreg_operand"))
- (match_operand:V 3 "reg_or_notreg_operand"))
- (match_operand:V 4 "reg_or_notreg_operand")))]
+ (match_operand:V 1 "regmem_or_bitnot_regmem_operand")
+ (match_operand:V 2 "regmem_or_bitnot_regmem_operand"))
+ (match_operand:V 3 "regmem_or_bitnot_regmem_operand"))
+ (match_operand:V 4 "regmem_or_bitnot_regmem_operand")))]
"(<MODE_SIZE> == 64 || TARGET_AVX512VL)
&& ix86_pre_reload_split ()
&& (rtx_equal_p (STRIP_UNARY (operands[1]),
@@ -11837,15 +11845,20 @@ (define_insn_and_split "*<avx512>_vpternlog<mode>_2"
operands[2] = STRIP_UNARY (operands[2]);
operands[6] = STRIP_UNARY (operands[6]);
operands[5] = GEN_INT (reg_mask);
+ if (!register_operand (operands[2], <MODE>mode))
+ operands[2] = force_reg (<MODE>mode, operands[2]);
+ if (!register_operand (operands[6], <MODE>mode))
+ operands[6] = force_reg (<MODE>mode, operands[6]);
+
})
(define_insn_and_split "*<avx512>_vpternlog<mode>_3"
[(set (match_operand:V 0 "register_operand")
(any_logic:V
(any_logic1:V
- (match_operand:V 1 "reg_or_notreg_operand")
- (match_operand:V 2 "reg_or_notreg_operand"))
- (match_operand:V 3 "reg_or_notreg_operand")))]
+ (match_operand:V 1 "regmem_or_bitnot_regmem_operand")
+ (match_operand:V 2 "regmem_or_bitnot_regmem_operand"))
+ (match_operand:V 3 "regmem_or_bitnot_regmem_operand")))]
"(<MODE_SIZE> == 64 || TARGET_AVX512VL)
&& ix86_pre_reload_split ()"
"#"
@@ -11876,6 +11889,10 @@ (define_insn_and_split "*<avx512>_vpternlog<mode>_3"
operands[2] = STRIP_UNARY (operands[2]);
operands[3] = STRIP_UNARY (operands[3]);
operands[4] = GEN_INT (reg_mask);
+ if (!register_operand (operands[2], <MODE>mode))
+ operands[2] = force_reg (<MODE>mode, operands[2]);
+ if (!register_operand (operands[3], <MODE>mode))
+ operands[3] = force_reg (<MODE>mode, operands[3]);
})
diff --git a/gcc/testsuite/gcc.target/i386/pr101989-3.c b/gcc/testsuite/gcc.target/i386/pr101989-3.c
new file mode 100644
index 00000000000..dfd89918c17
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr101989-3.c
@@ -0,0 +1,40 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512vl" } */
+/* { dg-final { scan-assembler-times "vpternlog" 5 } } */
+/* { dg-final { scan-assembler-not "vpxor" } } */
+/* { dg-final { scan-assembler-not "vpor" } } */
+/* { dg-final { scan-assembler-not "vpand" } } */
+
+#include<immintrin.h>
+
+extern __m256i src1, src2, src3;
+
+__m256i
+foo (void)
+{
+ return (src2 & ~src1) | (src3 & src1);
+}
+
+__m256i
+foo1 (void)
+{
+ return (src2 & src1) | (src3 & ~src1);
+}
+
+__m256i
+foo2 (void)
+{
+ return (src2 & src1) | (~src3 & src1);
+}
+
+__m256i
+foo3 (void)
+{
+ return (~src2 & src1) | (src3 & src1);
+}
+
+__m256i
+foo4 (void)
+{
+ return src3 & src2 ^ src1;
+}
--
2.18.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] [Middle-end] Simplify (trunc)copysign((extend)a, (extend)b) to .COPYSIGN (a,b).
2021-11-04 6:45 [PATCH 1/2] [Middle-end] Simplify (trunc)copysign((extend)a, (extend)b) to .COPYSIGN (a, b) liuhongt
2021-11-04 6:45 ` [PATCH 2/2] [i386] Extend vternlog define_insn_and_split to memory_operand to enable more optimziation liuhongt
@ 2021-11-04 7:47 ` Richard Biener
2021-11-04 18:32 ` [PATCH 1/2] [Middle-end] Simplify (trunc)copysign((extend)a, (extend)b) to .COPYSIGN (a, b) Joseph Myers
2 siblings, 0 replies; 6+ messages in thread
From: Richard Biener @ 2021-11-04 7:47 UTC (permalink / raw)
To: liuhongt; +Cc: GCC Patches, Hongtao Liu, H. J. Lu
On Thu, Nov 4, 2021 at 7:45 AM liuhongt <hongtao.liu@intel.com> wrote:
>
> a and b are same type as the truncation type and has less precision
> than extend type.
>
> Bootstrapped and regtested on x86-64-pc-linux-gnu{-m32,}.
> Ok for trunk?
OK.
Richard.
> gcc/ChangeLog:
>
> PR target/102464
> * match.pd: simplify (trunc)copysign((extend)a, (extend)b) to
> .COPYSIGN (a,b) when a and b are same type as the truncation
> type and has less precision than extend type.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/i386/pr102464-copysign-1.c: New test.
> ---
> gcc/match.pd | 13 +++
> .../gcc.target/i386/pr102464-copysign-1.c | 80 +++++++++++++++++++
> 2 files changed, 93 insertions(+)
> create mode 100644 gcc/testsuite/gcc.target/i386/pr102464-copysign-1.c
>
> diff --git a/gcc/match.pd b/gcc/match.pd
> index 0734c45700c..f63079023d0 100644
> --- a/gcc/match.pd
> +++ b/gcc/match.pd
> @@ -6169,6 +6169,19 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
> && direct_internal_fn_supported_p (as_internal_fn (tos),
> type, OPTIMIZE_FOR_BOTH))
> (tos @0))))
> +
> +/* Simplify (trunc) copysign ((extend)x, (extend)y) to copysignf (x, y),
> + x,y is float value, similar for _Float16/double. */
> +(for copysigns (COPYSIGN_ALL)
> + (simplify
> + (convert (copysigns (convert@2 @0) (convert @1)))
> + (if (optimize
> + && types_match (type, TREE_TYPE (@0))
> + && types_match (type, TREE_TYPE (@1))
> + && TYPE_PRECISION (type) < TYPE_PRECISION (TREE_TYPE (@2))
> + && direct_internal_fn_supported_p (IFN_COPYSIGN,
> + type, OPTIMIZE_FOR_BOTH))
> + (IFN_COPYSIGN @0 @1))))
> #endif
>
> (for froms (XFLOORL XCEILL XROUNDL XRINTL)
> diff --git a/gcc/testsuite/gcc.target/i386/pr102464-copysign-1.c b/gcc/testsuite/gcc.target/i386/pr102464-copysign-1.c
> new file mode 100644
> index 00000000000..95a39509738
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/pr102464-copysign-1.c
> @@ -0,0 +1,80 @@
> +/* PR target/102464. */
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -mavx512fp16 -mavx512vl -ftree-vectorize -mfpmath=sse -fdump-tree-optimized" } */
> +
> +#include<math.h>
> +void foo1 (_Float16* __restrict a, _Float16* b, _Float16* c)
> +{
> + for (int i = 0; i != 8; i++)
> + a[i] = copysignf (b[i], c[i]);
> +}
> +
> +void foo2 (_Float16* __restrict a, _Float16* b, _Float16* c)
> +{
> + for (int i = 0; i != 8; i++)
> + a[i] = copysign (b[i], c[i]);
> +}
> +
> +void foo3 (_Float16* __restrict a, _Float16* b, _Float16* c)
> +{
> + for (int i = 0; i != 8; i++)
> + a[i] = copysignl (b[i], c[i]);
> +}
> +
> +void foo4 (float* __restrict a, float* b, float* c)
> +{
> + for (int i = 0; i != 4; i++)
> + a[i] = copysign (b[i], c[i]);
> +}
> +
> +void foo5 (float* __restrict a, float* b, float* c)
> +{
> + for (int i = 0; i != 4; i++)
> + a[i] = copysignl (b[i], c[i]);
> +}
> +
> +void foo6 (double* __restrict a, double* b, double* c)
> +{
> + for (int i = 0; i != 4; i++)
> + a[i] = copysignl (b[i], c[i]);
> +}
> +
> +void foo7 (_Float16* __restrict a, _Float16* b, _Float16* c)
> +{
> + a[0] = copysignf (b[0], c[0]);
> +}
> +
> +void foo8 (_Float16* __restrict a, _Float16* b, _Float16* c)
> +{
> + a[0] = copysign (b[0], c[0]);
> +}
> +
> +void foo9 (_Float16* __restrict a, _Float16* b, _Float16* c)
> +{
> + a[0] = copysignl (b[0], c[0]);
> +}
> +
> +void foo10 (float* __restrict a, float* b, float* c)
> +{
> + a[0] = copysign (b[0], c[0]);
> +}
> +
> +void foo11 (float* __restrict a, float* b, float* c)
> +{
> + a[0] = copysignl (b[0], c[0]);
> +}
> +
> +void foo12 (double* __restrict a, double* b, double* c)
> +{
> + a[0] = copysignl (b[0], c[0]);
> +}
> +
> +/* { dg-final { scan-assembler-not "vcvtsh2s\[sd\]" } } */
> +/* { dg-final { scan-assembler-not "vcvtss2sd" } } */
> +/* { dg-final { scan-assembler-not "fld" } } */
> +/* { dg-final { scan-assembler-not "vcvtph2p\[sd\]" } } */
> +/* { dg-final { scan-assembler-not "vcvtps2pd" } } */
> +/* { dg-final { scan-assembler-not "extendhfxf" } } */
> +/* { dg-final { scan-assembler-not "\\\{1to8\\\}" } } */
> +/* { dg-final { scan-tree-dump-times "\.COPYSIGN" 12 "optimized" } } */
> +/* { dg-final { scan-assembler-times "vpternlog" 12 } } */
> --
> 2.18.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] [Middle-end] Simplify (trunc)copysign((extend)a, (extend)b) to .COPYSIGN (a, b).
2021-11-04 6:45 [PATCH 1/2] [Middle-end] Simplify (trunc)copysign((extend)a, (extend)b) to .COPYSIGN (a, b) liuhongt
2021-11-04 6:45 ` [PATCH 2/2] [i386] Extend vternlog define_insn_and_split to memory_operand to enable more optimziation liuhongt
2021-11-04 7:47 ` [PATCH 1/2] [Middle-end] Simplify (trunc)copysign((extend)a, (extend)b) to .COPYSIGN (a,b) Richard Biener
@ 2021-11-04 18:32 ` Joseph Myers
2021-11-05 2:20 ` [PATCH] Add !flag_signaling_nans to simplifcation: (trunc)copysign((extend)a, (extend)b) to copysign " liuhongt
2 siblings, 1 reply; 6+ messages in thread
From: Joseph Myers @ 2021-11-04 18:32 UTC (permalink / raw)
To: liuhongt; +Cc: gcc-patches
On Thu, 4 Nov 2021, liuhongt via Gcc-patches wrote:
> a and b are same type as the truncation type and has less precision
> than extend type.
Note that this is not safe with -fsignaling-nans, so needs to be disabled
for that option (if there isn't already logic somewhere with that effect),
because the extend will convert a signaling NaN to quiet (raising
"invalid"), but copysign won't, so this transformation could result in a
signaling NaN being wrongly returned when the original code would never
have returned a signaling NaN.
--
Joseph S. Myers
joseph@codesourcery.com
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] Add !flag_signaling_nans to simplifcation: (trunc)copysign((extend)a, (extend)b) to copysign (a, b).
2021-11-04 18:32 ` [PATCH 1/2] [Middle-end] Simplify (trunc)copysign((extend)a, (extend)b) to .COPYSIGN (a, b) Joseph Myers
@ 2021-11-05 2:20 ` liuhongt
2021-11-05 9:48 ` Richard Biener
0 siblings, 1 reply; 6+ messages in thread
From: liuhongt @ 2021-11-05 2:20 UTC (permalink / raw)
To: gcc-patches; +Cc: joseph, richard.guenther
> Note that this is not safe with -fsignaling-nans, so needs to be disabled
> for that option (if there isn't already logic somewhere with that effect),
> because the extend will convert a signaling NaN to quiet (raising
> "invalid"), but copysign won't, so this transformation could result in a
> signaling NaN being wrongly returned when the original code would never
> have returned a signaling NaN.
>
> --
> Joseph S. Myers
> joseph@codesourcery.com
Bootstrapped and regtested on x86_64-linux-gnu{-m32,}.
Ok for trunk?
gcc/ChangeLog
* match.pd
(Simplifcation (trunc)copysign((extend)a, (extend)b) to
.COPYSIGN (a, b)): Add !flag_signaling_nans.
---
gcc/match.pd | 1 +
1 file changed, 1 insertion(+)
diff --git a/gcc/match.pd b/gcc/match.pd
index fb1065dc0e6..d6a8dd0dd20 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -6176,6 +6176,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
(simplify
(convert (copysigns (convert@2 @0) (convert @1)))
(if (optimize
+ && !flag_signaling_nans
&& types_match (type, TREE_TYPE (@0))
&& types_match (type, TREE_TYPE (@1))
&& TYPE_PRECISION (type) < TYPE_PRECISION (TREE_TYPE (@2))
--
2.18.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] Add !flag_signaling_nans to simplifcation: (trunc)copysign((extend)a, (extend)b) to copysign (a, b).
2021-11-05 2:20 ` [PATCH] Add !flag_signaling_nans to simplifcation: (trunc)copysign((extend)a, (extend)b) to copysign " liuhongt
@ 2021-11-05 9:48 ` Richard Biener
0 siblings, 0 replies; 6+ messages in thread
From: Richard Biener @ 2021-11-05 9:48 UTC (permalink / raw)
To: liuhongt; +Cc: GCC Patches, Joseph S. Myers
On Fri, Nov 5, 2021 at 3:20 AM liuhongt <hongtao.liu@intel.com> wrote:
>
> > Note that this is not safe with -fsignaling-nans, so needs to be disabled
> > for that option (if there isn't already logic somewhere with that effect),
> > because the extend will convert a signaling NaN to quiet (raising
> > "invalid"), but copysign won't, so this transformation could result in a
> > signaling NaN being wrongly returned when the original code would never
> > have returned a signaling NaN.
> >
> > --
> > Joseph S. Myers
> > joseph@codesourcery.com
>
> Bootstrapped and regtested on x86_64-linux-gnu{-m32,}.
> Ok for trunk?
>
> gcc/ChangeLog
>
> * match.pd
> (Simplifcation (trunc)copysign((extend)a, (extend)b) to
> .COPYSIGN (a, b)): Add !flag_signaling_nans.
> ---
> gcc/match.pd | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/gcc/match.pd b/gcc/match.pd
> index fb1065dc0e6..d6a8dd0dd20 100644
> --- a/gcc/match.pd
> +++ b/gcc/match.pd
> @@ -6176,6 +6176,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
> (simplify
> (convert (copysigns (convert@2 @0) (convert @1)))
> (if (optimize
> + && !flag_signaling_nans
Please use !HONOR_SNANS (@2)
OK with that change.
> && types_match (type, TREE_TYPE (@0))
> && types_match (type, TREE_TYPE (@1))
> && TYPE_PRECISION (type) < TYPE_PRECISION (TREE_TYPE (@2))
> --
> 2.18.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-11-05 9:48 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2021-11-04 6:45 [PATCH 1/2] [Middle-end] Simplify (trunc)copysign((extend)a, (extend)b) to .COPYSIGN (a, b) liuhongt
2021-11-04 6:45 ` [PATCH 2/2] [i386] Extend vternlog define_insn_and_split to memory_operand to enable more optimziation liuhongt
2021-11-04 7:47 ` [PATCH 1/2] [Middle-end] Simplify (trunc)copysign((extend)a, (extend)b) to .COPYSIGN (a,b) Richard Biener
2021-11-04 18:32 ` [PATCH 1/2] [Middle-end] Simplify (trunc)copysign((extend)a, (extend)b) to .COPYSIGN (a, b) Joseph Myers
2021-11-05 2:20 ` [PATCH] Add !flag_signaling_nans to simplifcation: (trunc)copysign((extend)a, (extend)b) to copysign " liuhongt
2021-11-05 9:48 ` Richard Biener
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