From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) by sourceware.org (Postfix) with ESMTP id 8D23E3858030 for ; Fri, 5 Nov 2021 22:38:55 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 8D23E3858030 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=kernel.crashing.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=kernel.crashing.org Received: from gate.crashing.org (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.14.1) with ESMTP id 1A5MbtXl005207; Fri, 5 Nov 2021 17:37:55 -0500 Received: (from segher@localhost) by gate.crashing.org (8.14.1/8.14.1/Submit) id 1A5MbsA6005206; Fri, 5 Nov 2021 17:37:54 -0500 X-Authentication-Warning: gate.crashing.org: segher set sender to segher@kernel.crashing.org using -f Date: Fri, 5 Nov 2021 17:37:54 -0500 From: Segher Boessenkool To: Bill Schmidt Cc: gcc-patches@gcc.gnu.org, dje.gcc@gmail.com Subject: Re: [PATCH 16/18] rs6000: Test case adjustments Message-ID: <20211105223754.GU614@gate.crashing.org> References: <99b257ea5cb6464d967e11e6ee2d8ee5f59f5321.1630511335.git.wschmidt@linux.ibm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <99b257ea5cb6464d967e11e6ee2d8ee5f59f5321.1630511335.git.wschmidt@linux.ibm.com> User-Agent: Mutt/1.4.2.3i X-Spam-Status: No, score=-3.4 required=5.0 tests=BAYES_00, JMQ_SPF_NEUTRAL, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=no autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Nov 2021 22:38:58 -0000 On Wed, Sep 01, 2021 at 11:13:52AM -0500, Bill Schmidt wrote: > * gcc.target/powerpc/bfp/scalar-extract-exp-2.c: Adjust. My favourite changelog entry! But, adjust to what? This is the first line :-) "Adjust expected error message"? But you should fold this patch with some previous patch anyway, when committing (or you break bisecting). > --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-floatdouble.c > +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-floatdouble.c > @@ -18,7 +18,7 @@ vector float test_fc () > vector double testd_00 (vector double x) { return vec_splat (x, 0b00000); } > vector double testd_01 (vector double x) { return vec_splat (x, 0b00001); } > vector double test_dc () > -{ const vector double y = { 3.0, 5.0 }; return vec_splat (y, 0b00010); } > +{ const vector double y = { 3.0, 5.0 }; return vec_splat (y, 0b00001); } > > /* If the source vector is a known constant, we will generate a load or possibly > XXSPLTIW. */ > @@ -28,5 +28,5 @@ vector double test_dc () > /* { dg-final { scan-assembler-times {\mvspltw\M|\mxxspltw\M} 3 } } */ > > /* For double types, we will generate xxpermdi instructions. */ > -/* { dg-final { scan-assembler-times "xxpermdi" 3 } } */ > +/* { dg-final { scan-assembler-times "xxpermdi" 2 } } */ Why these changes? > --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-longlong.c > +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-longlong.c > @@ -9,23 +9,19 @@ > > vector bool long long testb_00 (vector bool long long x) { return vec_splat (x, 0b00000); } > vector bool long long testb_01 (vector bool long long x) { return vec_splat (x, 0b00001); } > -vector bool long long testb_02 (vector bool long long x) { return vec_splat (x, 0b00010); } > > vector signed long long tests_00 (vector signed long long x) { return vec_splat (x, 0b00000); } > vector signed long long tests_01 (vector signed long long x) { return vec_splat (x, 0b00001); } > -vector signed long long tests_02 (vector signed long long x) { return vec_splat (x, 0b00010); } > > vector unsigned long long testu_00 (vector unsigned long long x) { return vec_splat (x, 0b00000); } > vector unsigned long long testu_01 (vector unsigned long long x) { return vec_splat (x, 0b00001); } > -vector unsigned long long testu_02 (vector unsigned long long x) { return vec_splat (x, 0b00010); } > > /* Similar test as above, but the source vector is a known constant. */ > -vector bool long long test_bll () { const vector bool long long y = {12, 23}; return vec_splat (y, 0b00010); } > -vector signed long long test_sll () { const vector signed long long y = {34, 45}; return vec_splat (y, 0b00010); } > -vector unsigned long long test_ull () { const vector unsigned long long y = {56, 67}; return vec_splat (y, 0b00010); } > +vector bool long long test_bll () { const vector bool long long y = {12, 23}; return vec_splat (y, 0b00001); } > +vector signed long long test_sll () { const vector signed long long y = {34, 45}; return vec_splat (y, 0b00001); } > > /* Assorted load instructions for the initialization with known constants. */ > -/* { dg-final { scan-assembler-times {\mlvx\M|\mlxvd2x\M|\mlxv\M|\mplxv\M} 3 } } */ > +/* { dg-final { scan-assembler-times {\mlvx\M|\mlxvd2x\M|\mlxv\M|\mplxv\M|\mxxspltib\M} 2 } } */ > > /* xxpermdi for vec_splat of long long vectors. > At the time of this writing, the number of xxpermdi instructions Ditto. > --- a/gcc/testsuite/gcc.target/powerpc/int_128bit-runnable.c > +++ b/gcc/testsuite/gcc.target/powerpc/int_128bit-runnable.c > @@ -11,9 +11,9 @@ > /* { dg-final { scan-assembler-times {\mvrlq\M} 2 } } */ > /* { dg-final { scan-assembler-times {\mvrlqnm\M} 2 } } */ > /* { dg-final { scan-assembler-times {\mvrlqmi\M} 2 } } */ > -/* { dg-final { scan-assembler-times {\mvcmpequq\M} 16 } } */ > -/* { dg-final { scan-assembler-times {\mvcmpgtsq\M} 16 } } */ > -/* { dg-final { scan-assembler-times {\mvcmpgtuq\M} 16 } } */ > +/* { dg-final { scan-assembler-times {\mvcmpequq\M} 24 } } */ > +/* { dg-final { scan-assembler-times {\mvcmpgtsq\M} 26 } } */ > +/* { dg-final { scan-assembler-times {\mvcmpgtuq\M} 26 } } */ > /* { dg-final { scan-assembler-times {\mvmuloud\M} 1 } } */ > /* { dg-final { scan-assembler-times {\mvmulesd\M} 1 } } */ > /* { dg-final { scan-assembler-times {\mvmulosd\M} 1 } } */ And this? > --- a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-8.c > +++ b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-8.c > @@ -126,6 +126,7 @@ void foo (vector signed char *vscr, > /* { dg-final { scan-assembler-times "vsubcuw" 4 } } */ > /* { dg-final { scan-assembler-times "vsubuwm" 4 } } */ > /* { dg-final { scan-assembler-times "vbpermq" 2 } } */ > +/* { dg-final { scan-assembler-times "vbpermd" 0 } } */ > /* { dg-final { scan-assembler-times "xxleqv" 4 } } */ > /* { dg-final { scan-assembler-times "vgbbd" 1 } } */ > /* { dg-final { scan-assembler-times "xxlnand" 4 } } */ This curious one could have been a separate (obvious) patch. It is a bit out-of-place here. > --- a/gcc/testsuite/gcc.target/powerpc/pragma_power8.c > +++ b/gcc/testsuite/gcc.target/powerpc/pragma_power8.c > @@ -19,6 +19,7 @@ test1 (vector int a, vector int b) > #pragma GCC target ("cpu=power7") > /* Force a re-read of altivec.h with new cpu target. */ > #undef _ALTIVEC_H > +#undef _RS6000_VECDEFINES_H > #include Wow ugly :-) But nothing new here, heh. Best not to look at testcase internals too closely, in any case. > --- a/gcc/testsuite/gcc.target/powerpc/test_mffsl.c > +++ b/gcc/testsuite/gcc.target/powerpc/test_mffsl.c > @@ -1,5 +1,6 @@ > /* { dg-do run { target { powerpc*-*-* } } } */ > -/* { dg-options "-O2 -std=c99" } */ > +/* { dg-options "-O2 -std=c99 -mcpu=power9" } */ > +/* { dg-require-effective-target powerpc_p9vector_ok } */ > > #ifdef DEBUG > #include This one is a bug fix as well (and obvious). > --- a/gcc/testsuite/gcc.target/powerpc/vsu/vec-all-nez-7.c > +++ b/gcc/testsuite/gcc.target/powerpc/vsu/vec-all-nez-7.c > @@ -12,5 +12,5 @@ test_all_not_equal_and_not_zero (vector unsigned short *arg1_p, > vector unsigned short arg_2 = *arg2_p; > > return __builtin_vec_vcmpnez_p (__CR6_LT, arg_1, arg_2); > - /* { dg-error "'__builtin_altivec_vcmpnezh_p' requires the '-mcpu=power9' option" "" { target *-*-* } .-1 } */ > + /* { dg-error "'__builtin_altivec_vcmpnezh_p' requires the '-mpower9-vector' option" "" { target *-*-* } .-1 } */ > } Hrm. People should not use the -mpower9-vector option (except implied by -mcpu=power9, without vectors disabled). How hard is it to give a better error message here? The obvious bugfixes independent of this series are of course okay for trunk, as separate patches, now. But some more work is needed elsewhere. Segher