From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id 981AA3857C6F for ; Fri, 19 Nov 2021 02:26:13 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 981AA3857C6F Received: from pps.filterd (m0127361.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 1AJ1iVQh038279; Fri, 19 Nov 2021 02:26:13 GMT Received: from ppma01dal.us.ibm.com (83.d6.3fa9.ip4.static.sl-reverse.com [169.63.214.131]) by mx0a-001b2d01.pphosted.com with ESMTP id 3ce2gxrm8n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 19 Nov 2021 02:26:13 +0000 Received: from pps.filterd (ppma01dal.us.ibm.com [127.0.0.1]) by ppma01dal.us.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 1AJ2H4KO025914; Fri, 19 Nov 2021 02:26:12 GMT Received: from b01cxnp22033.gho.pok.ibm.com (b01cxnp22033.gho.pok.ibm.com [9.57.198.23]) by ppma01dal.us.ibm.com with ESMTP id 3ca50dx1w3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 19 Nov 2021 02:26:12 +0000 Received: from b01ledav003.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com [9.57.199.108]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 1AJ2QAaB38666564 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 19 Nov 2021 02:26:10 GMT Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4061CB206A; Fri, 19 Nov 2021 02:26:10 +0000 (GMT) Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 79A66B2064; Fri, 19 Nov 2021 02:26:09 +0000 (GMT) Received: from li-24c3614c-2adc-11b2-a85c-85f334518bdb.ibm.com (unknown [9.160.124.185]) by b01ledav003.gho.pok.ibm.com (Postfix) with ESMTPS; Fri, 19 Nov 2021 02:26:09 +0000 (GMT) Date: Thu, 18 Nov 2021 20:26:06 -0600 From: "Paul A. Clarke" To: segher@kernel.crashing.org, gcc-patches@gcc.gnu.org, wschmidt@linux.ibm.com Subject: Re: [PING^2 PATCH] rs6000: Add Power10 optimization for most _mm_movemask* Message-ID: <20211119022606.GE22452@li-24c3614c-2adc-11b2-a85c-85f334518bdb.ibm.com> References: <20211021172212.396029-1-pc@us.ibm.com> <20211108174256.GE12060@li-24c3614c-2adc-11b2-a85c-85f334518bdb.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20211108174256.GE12060@li-24c3614c-2adc-11b2-a85c-85f334518bdb.ibm.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-TM-AS-GCONF: 00 X-Proofpoint-GUID: Y5XpXHyTxcTra32wrWUfK8TPWCdK6ZPV X-Proofpoint-ORIG-GUID: Y5XpXHyTxcTra32wrWUfK8TPWCdK6ZPV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-11-19_01,2021-11-17_01,2020-04-07_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 impostorscore=0 clxscore=1015 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 lowpriorityscore=0 mlxlogscore=999 adultscore=0 priorityscore=1501 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2111190007 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 19 Nov 2021 02:26:15 -0000 On Mon, Nov 08, 2021 at 11:42:56AM -0600, Paul A. Clarke via Gcc-patches wrote: > Gentle ping... Gentle re-ping. > On Thu, Oct 21, 2021 at 12:22:12PM -0500, Paul A. Clarke via Gcc-patches wrote: > > Power10 ISA added `vextract*` instructions which are realized in the > > `vec_extractm` instrinsic. > > > > Use `vec_extractm` for `_mm_movemask_ps`, `_mm_movemask_pd`, and > > `_mm_movemask_epi8` compatibility intrinsics, when `_ARCH_PWR10`. > > > > 2021-10-21 Paul A. Clarke > > > > gcc > > * config/rs6000/xmmintrin.h (_mm_movemask_ps): Use vec_extractm > > when _ARCH_PWR10. > > * config/rs6000/emmintrin.h (_mm_movemask_pd): Likewise. > > (_mm_movemask_epi8): Likewise. > > --- > > Tested on Power10 powerpc64le-linux (compiled with and without > > `-mcpu=power10`). > > > > OK for trunk? > > > > gcc/config/rs6000/emmintrin.h | 8 ++++++++ > > gcc/config/rs6000/xmmintrin.h | 4 ++++ > > 2 files changed, 12 insertions(+) > > > > diff --git a/gcc/config/rs6000/emmintrin.h b/gcc/config/rs6000/emmintrin.h > > index 32ad72b4cc35..ab16c13c379e 100644 > > --- a/gcc/config/rs6000/emmintrin.h > > +++ b/gcc/config/rs6000/emmintrin.h > > @@ -1233,6 +1233,9 @@ _mm_loadl_pd (__m128d __A, double const *__B) > > extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) > > _mm_movemask_pd (__m128d __A) > > { > > +#ifdef _ARCH_PWR10 > > + return vec_extractm ((__v2du) __A); > > +#else > > __vector unsigned long long result; > > static const __vector unsigned int perm_mask = > > { > > @@ -1252,6 +1255,7 @@ _mm_movemask_pd (__m128d __A) > > #else > > return result[0]; > > #endif > > +#endif /* !_ARCH_PWR10 */ > > } > > #endif /* _ARCH_PWR8 */ > > > > @@ -2030,6 +2034,9 @@ _mm_min_epu8 (__m128i __A, __m128i __B) > > extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) > > _mm_movemask_epi8 (__m128i __A) > > { > > +#ifdef _ARCH_PWR10 > > + return vec_extractm ((__v16qu) __A); > > +#else > > __vector unsigned long long result; > > static const __vector unsigned char perm_mask = > > { > > @@ -2046,6 +2053,7 @@ _mm_movemask_epi8 (__m128i __A) > > #else > > return result[0]; > > #endif > > +#endif /* !_ARCH_PWR10 */ > > } > > #endif /* _ARCH_PWR8 */ > > > > diff --git a/gcc/config/rs6000/xmmintrin.h b/gcc/config/rs6000/xmmintrin.h > > index ae1a33e8d95b..4c093fd1d5ae 100644 > > --- a/gcc/config/rs6000/xmmintrin.h > > +++ b/gcc/config/rs6000/xmmintrin.h > > @@ -1352,6 +1352,9 @@ _mm_storel_pi (__m64 *__P, __m128 __A) > > extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) > > _mm_movemask_ps (__m128 __A) > > { > > +#ifdef _ARCH_PWR10 > > + return vec_extractm ((vector unsigned int) __A); > > +#else > > __vector unsigned long long result; > > static const __vector unsigned int perm_mask = > > { > > @@ -1371,6 +1374,7 @@ _mm_movemask_ps (__m128 __A) > > #else > > return result[0]; > > #endif > > +#endif /* !_ARCH_PWR10 */ > > } > > #endif /* _ARCH_PWR8 */ > > > > -- > > 2.27.0 > >