From: siyu@isrc.iscas.ac.cn
To: gcc-patches@gcc.gnu.org
Cc: kito.cheng@sifive.com, jimw@sifive.com,
cmuellner@ventanamicro.com, palmer@dabbelt.com,
andrew@sifive.com, lazyparser@gmail.com, jiawei@iscas.ac.cn,
ben.marshall@pqshield.com, mjos@pqshield.com,
Richard.Newell@microchip.com, SiYu Wu <siyu@isrc.iscas.ac.cn>
Subject: [PATCH v2 1/2] RISC-V: Add option defines for Scalar Cryptography
Date: Mon, 22 Nov 2021 16:19:09 +0800 [thread overview]
Message-ID: <20211122081910.1545117-2-siyu@isrc.iscas.ac.cn> (raw)
In-Reply-To: <20211122081910.1545117-1-siyu@isrc.iscas.ac.cn>
From: SiYu Wu <siyu@isrc.iscas.ac.cn>
gcc/ChangeLog:
2021-11-21 SiYu Wu <siyu@isrc.iscas.ac.cn>
* common/config/riscv/riscv-common.c (riscv_ext_version_table):
Add zbk* and zk*.
* config/riscv/riscv-opts.h (MASK_ZBKB): New.
(MASK_ZBKC): Ditto.
(MASK_ZBKX): Ditto.
(MASK_ZKNE): Ditto.
(MASK_ZKND): Ditto.
(MASK_ZKNH): Ditto.
(MASK_ZKR): Ditto.
(MASK_ZKSED): Ditto.
(MASK_ZKSH): Ditto.
(MASK_ZKT): Ditto.
(TARGET_ZBKB): Ditto.
(TARGET_ZBKC): Ditto.
(TARGET_ZBKX): Ditto.
(TARGET_ZKNE): Ditto.
(TARGET_ZKND): Ditto.
(TARGET_ZKNH): Ditto.
(TARGET_ZKR): Ditto.
(TARGET_ZKSED): Ditto.
(TARGET_ZKSH): Ditto.
(TARGET_ZKT): Ditto.
* config/riscv/riscv.opt (riscv_zk_subext): New.
---
gcc/common/config/riscv/riscv-common.c | 22 ++++++++++++++++++++++
gcc/config/riscv/riscv-opts.h | 22 ++++++++++++++++++++++
gcc/config/riscv/riscv.opt | 3 +++
3 files changed, 47 insertions(+)
diff --git a/gcc/common/config/riscv/riscv-common.c b/gcc/common/config/riscv/riscv-common.c
index b8dd0aeac3e..14dc6057ecd 100644
--- a/gcc/common/config/riscv/riscv-common.c
+++ b/gcc/common/config/riscv/riscv-common.c
@@ -106,6 +106,17 @@ static const struct riscv_ext_version riscv_ext_version_table[] =
{"zbc", ISA_SPEC_CLASS_NONE, 1, 0},
{"zbs", ISA_SPEC_CLASS_NONE, 1, 0},
+ {"zbkb", ISA_SPEC_CLASS_NONE, 1, 0},
+ {"zbkc", ISA_SPEC_CLASS_NONE, 1, 0},
+ {"zbkx", ISA_SPEC_CLASS_NONE, 1, 0},
+ {"zkne", ISA_SPEC_CLASS_NONE, 1, 0},
+ {"zknd", ISA_SPEC_CLASS_NONE, 1, 0},
+ {"zknh", ISA_SPEC_CLASS_NONE, 1, 0},
+ {"zkr", ISA_SPEC_CLASS_NONE, 1, 0},
+ {"zksed", ISA_SPEC_CLASS_NONE, 1, 0},
+ {"zksh", ISA_SPEC_CLASS_NONE, 1, 0},
+ {"zkt", ISA_SPEC_CLASS_NONE, 1, 0},
+
/* Terminate the list. */
{NULL, ISA_SPEC_CLASS_NONE, 0, 0}
};
@@ -915,6 +926,17 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] =
{"zbc", &gcc_options::x_riscv_zb_subext, MASK_ZBC},
{"zbs", &gcc_options::x_riscv_zb_subext, MASK_ZBS},
+ {"zbkb", &gcc_options::x_riscv_zk_subext, MASK_ZBKB},
+ {"zbkc", &gcc_options::x_riscv_zk_subext, MASK_ZBKC},
+ {"zbkx", &gcc_options::x_riscv_zk_subext, MASK_ZBKX},
+ {"zknd", &gcc_options::x_riscv_zk_subext, MASK_ZKND},
+ {"zkne", &gcc_options::x_riscv_zk_subext, MASK_ZKNE},
+ {"zknh", &gcc_options::x_riscv_zk_subext, MASK_ZKNH},
+ {"zkr", &gcc_options::x_riscv_zk_subext, MASK_ZKR},
+ {"zksed", &gcc_options::x_riscv_zk_subext, MASK_ZKSED},
+ {"zksh", &gcc_options::x_riscv_zk_subext, MASK_ZKSH},
+ {"zkt", &gcc_options::x_riscv_zk_subext, MASK_ZKT},
+
{NULL, NULL, 0}
};
diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index 2efc4b80f1f..f65ff678811 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -83,4 +83,26 @@ enum stack_protector_guard {
#define TARGET_ZBC ((riscv_zb_subext & MASK_ZBC) != 0)
#define TARGET_ZBS ((riscv_zb_subext & MASK_ZBS) != 0)
+#define MASK_ZBKB (1 << 0)
+#define MASK_ZBKC (1 << 1)
+#define MASK_ZBKX (1 << 2)
+#define MASK_ZKNE (1 << 3)
+#define MASK_ZKND (1 << 4)
+#define MASK_ZKNH (1 << 5)
+#define MASK_ZKR (1 << 6)
+#define MASK_ZKSED (1 << 7)
+#define MASK_ZKSH (1 << 8)
+#define MASK_ZKT (1 << 9)
+
+#define TARGET_ZBKB ((riscv_zk_subext & MASK_ZBKB) != 0)
+#define TARGET_ZBKC ((riscv_zk_subext & MASK_ZBKC) != 0)
+#define TARGET_ZBKX ((riscv_zk_subext & MASK_ZBKX) != 0)
+#define TARGET_ZKNE ((riscv_zk_subext & MASK_ZKNE) != 0)
+#define TARGET_ZKND ((riscv_zk_subext & MASK_ZKND) != 0)
+#define TARGET_ZKNH ((riscv_zk_subext & MASK_ZKNH) != 0)
+#define TARGET_ZKR ((riscv_zk_subext & MASK_ZKR) != 0)
+#define TARGET_ZKSED ((riscv_zk_subext & MASK_ZKSED) != 0)
+#define TARGET_ZKSH ((riscv_zk_subext & MASK_ZKSH) != 0)
+#define TARGET_ZKT ((riscv_zk_subext & MASK_ZKT) != 0)
+
#endif /* ! GCC_RISCV_OPTS_H */
diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
index 15bf89e17c2..617000975bf 100644
--- a/gcc/config/riscv/riscv.opt
+++ b/gcc/config/riscv/riscv.opt
@@ -198,6 +198,9 @@ int riscv_zi_subext
TargetVariable
int riscv_zb_subext
+TargetVariable
+int riscv_zk_subext
+
Enum
Name(isa_spec_class) Type(enum riscv_isa_spec_class)
Supported ISA specs (for use with the -misa-spec= option):
--
2.25.1
next prev parent reply other threads:[~2021-11-22 8:19 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-22 8:19 [PATCH v2 0/2] RISC-V: add gcc support for Scalar Cryptography v1.0.0-rc6 siyu
2021-11-22 8:19 ` siyu [this message]
2021-11-22 8:19 ` [PATCH v2 2/2] RISC-V: Add implied defines of Zk, Zkn and Zks siyu
2021-11-24 3:22 ` [PATCH v2 0/2] RISC-V: add gcc support for Scalar Cryptography v1.0.0-rc6 Palmer Dabbelt
2021-11-24 10:00 ` Kito Cheng
2021-11-24 16:41 ` Palmer Dabbelt
2021-12-03 16:11 ` Kito Cheng
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