Hi All,

After the first patch in the series this updates the optabs to expect the
canonical sequence.

Bootstrapped Regtested on arm-none-linux-gnueabihf and no issues.

Ok for master? and backport along with the first patch?

Thanks,
Tamar

gcc/ChangeLog:

	PR tree-optimization/102819
	PR tree-optimization/103169
	* config/arm/neon.md (cmul<conj_op><mode>3): Use canon order.
	* config/arm/vec-common.md (cmul<conj_op><mode>3,
	cml<fcmac1><conj_op><mode>4): Likewise.

--- inline copy of patch -- 
diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
index 8b0a396947cc8e7345f178b926128d7224fb218a..2b6ae67a7ec6bef505c2eaef0ec495d14c656495 100644
--- a/gcc/config/arm/neon.md
+++ b/gcc/config/arm/neon.md
@@ -2859,9 +2859,9 @@ (define_expand "cmul<conj_op><mode>3"
   rtx res1 = gen_reg_rtx (<MODE>mode);
   rtx tmp = force_reg (<MODE>mode, CONST0_RTX (<MODE>mode));
   emit_insn (gen_neon_vcmla<rotsplit1><mode> (res1, tmp,
-					      operands[2], operands[1]));
+					      operands[1], operands[2]));
   emit_insn (gen_neon_vcmla<rotsplit2><mode> (operands[0], res1,
-					      operands[2], operands[1]));
+					      operands[1], operands[2]));
   DONE;
 })
 
diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec-common.md
index e71d9b3811fde62159f5c21944fef9fe3f97b4bd..0940e987de53e191f4abdd248c654aed69f016f7 100644
--- a/gcc/config/arm/vec-common.md
+++ b/gcc/config/arm/vec-common.md
@@ -239,14 +239,14 @@ (define_expand "cmul<conj_op><mode>3"
     {
       rtx tmp = force_reg (<MODE>mode, CONST0_RTX (<MODE>mode));
       emit_insn (gen_arm_vcmla<rotsplit1><mode> (res1, tmp,
-						 operands[2], operands[1]));
+						 operands[1], operands[2]));
     }
   else
     emit_insn (gen_arm_vcmla<rotsplit1><mode> (res1, CONST0_RTX (<MODE>mode),
-					       operands[2], operands[1]));
+					       operands[1], operands[2]));
 
   emit_insn (gen_arm_vcmla<rotsplit2><mode> (operands[0], res1,
-					     operands[2], operands[1]));
+					     operands[1], operands[2]));
   DONE;
 })
 
@@ -265,18 +265,18 @@ (define_expand "arm_vcmla<rot><mode>"
 ;; remainder.  Because of this, expand early.
 (define_expand "cml<fcmac1><conj_op><mode>4"
   [(set (match_operand:VF 0 "register_operand")
-	(plus:VF (match_operand:VF 1 "register_operand")
-		 (unspec:VF [(match_operand:VF 2 "register_operand")
-			     (match_operand:VF 3 "register_operand")]
-			    VCMLA_OP)))]
+	(plus:VF (unspec:VF [(match_operand:VF 1 "register_operand")
+			     (match_operand:VF 2 "register_operand")]
+			    VCMLA_OP)
+		 (match_operand:VF 3 "register_operand")))]
   "(TARGET_COMPLEX || (TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT
 		      && ARM_HAVE_<MODE>_ARITH)) && !BYTES_BIG_ENDIAN"
 {
   rtx tmp = gen_reg_rtx (<MODE>mode);
-  emit_insn (gen_arm_vcmla<rotsplit1><mode> (tmp, operands[1],
-					     operands[3], operands[2]));
+  emit_insn (gen_arm_vcmla<rotsplit1><mode> (tmp, operands[3],
+					     operands[1], operands[2]));
   emit_insn (gen_arm_vcmla<rotsplit2><mode> (operands[0], tmp,
-					     operands[3], operands[2]));
+					     operands[1], operands[2]));
   DONE;
 })
 


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