From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by sourceware.org (Postfix) with ESMTPS id 6AF2B3858C27 for ; Tue, 25 Jan 2022 13:04:50 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 6AF2B3858C27 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=sifive.com Received: by mail-pj1-x1033.google.com with SMTP id g9-20020a17090a67c900b001b4f1d71e4fso2747803pjm.4 for ; Tue, 25 Jan 2022 05:04:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=aFx4MAqbJ3McIkLKtzAcFJIFy74ke4QrNe5jKQ8a2Ao=; b=hrIDnPAyyQFCpSCz+GBGzsj3TpRRe46KQk3AMxj9F/n5KdPHnHezXEGUG4j6A0pDho 2niteBBw9BI89360wnVH/Hhu5zQdemoRPYeqtNWQjgbQ6jVe/W2OdjccOY4bG1gy4F+3 9P4n1JqcnydSUjKR5VbLfr6/ZjvzQdAI+UVeWIuGDUSFcR/RckJsE8JTOgNSABU1WuDN aT6IIqYiG40uv7Ss5k267ecWtFfhLjGsqEj4NEFYQSWB18UCskz8tNPEEeaSyYicrbmd 8utrIPwH3xN7/+24EyTiy7+PENgxuTQKbPdoOHmcfCx1M/S9yxosEVEsbvi28LGs/0m3 GWng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=aFx4MAqbJ3McIkLKtzAcFJIFy74ke4QrNe5jKQ8a2Ao=; b=5C/hisjGVamOSul2Rm5w8bjx2Ph1Rro40B0fq17dk9kLylJ53Sk/ggHi+nj1Ylnscr XAGVsKmT3a41G/rfURDzs7E4oTKsIRLOzTTsIPUWZ9hpjUzAwH5wQFZsg42m5eXcfaFC NW7NrLlsFdiwFtYkTuauRmET5jQ1xX7ueAR3a+PRL3KtLEO1Brx/SQXeOz9LiaRuJFrS LUoiRDqD3eNpHkzqm3H2nL7TnN0hGrXKSxpJaOz3C4cd3KobP7SlrcP/eUyxm0gzYsNV iPdve/vgIt+eC4KQ/2V6xO0uZGDM48rS3EQeA37Rm66g5TTkuth7DLl05uq6ktScrRzw SGhg== X-Gm-Message-State: AOAM530zPdmvben8bJi4fQyEDjNPxKGY7JTi/fKqaFrorXa80mJ2Ukuu n7z5YR1GEVNof4M5r7N79j4SQuGiwjrUAA== X-Google-Smtp-Source: ABdhPJwDKWYLwt0hUwgik9VsQzY0uCsGmBw080NbFnEBSOBFdSOXJGcq8f30X8gDojCAHagRvP654Q== X-Received: by 2002:a17:902:9893:b0:14b:4d5e:de0c with SMTP id s19-20020a170902989300b0014b4d5ede0cmr9258424plp.117.1643115887746; Tue, 25 Jan 2022 05:04:47 -0800 (PST) Received: from hsinchu02.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id q8sm13894329pfl.143.2022.01.25.05.04.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Jan 2022 05:04:47 -0800 (PST) From: Kito Cheng To: gcc-patches@gcc.gnu.org, kito.cheng@gmail.com, jim.wilson.gcc@gmail.com, palmer@dabbelt.com, andrew@sifive.com, marxin@gcc.gnu.org Cc: Kito Cheng Subject: [PATCH] RISC-V: Always pass -misa-spec to assembler [PR104219] Date: Tue, 25 Jan 2022 21:04:42 +0800 Message-Id: <20220125130442.23646-1-kito.cheng@sifive.com> X-Mailer: git-send-email 2.34.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-13.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=unavailable autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 25 Jan 2022 13:04:51 -0000 Add -misa-spec to OPTION_DEFAULT_SPECS to make sure -misa-spec will always pass that into assembler, that prevent GCC and binutils using different way to interpret the ISA string. gcc/ChangeLog: PR target/104219 * config.gcc (riscv*-*-*): Normalize the with_isa_spec value. (all_defaults): Add isa_spec. * config/riscv/riscv.h (OPTION_DEFAULT_SPECS): Add isa_spec. --- gcc/config.gcc | 4 +++- gcc/config/riscv/riscv.h | 2 ++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/gcc/config.gcc b/gcc/config.gcc index 90aec3f8f3f..0bb8c63a46e 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -4643,12 +4643,14 @@ case "${target}" in case "${with_isa_spec}" in ""|default|20191213|201912) tm_defines="${tm_defines} TARGET_DEFAULT_ISA_SPEC=ISA_SPEC_CLASS_20191213" + with_isa_spec=20191213 ;; 2.2) tm_defines="${tm_defines} TARGET_DEFAULT_ISA_SPEC=ISA_SPEC_CLASS_2P2" ;; 20190608 | 201906) tm_defines="${tm_defines} TARGET_DEFAULT_ISA_SPEC=ISA_SPEC_CLASS_20190608" + with_isa_spec=20190608 ;; *) echo "--with-isa-spec only accept 2.2, 20191213, 201912, 20190608 or 201906" 1>&2 @@ -5430,7 +5432,7 @@ case ${target} in esac t= -all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1 madd4" +all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1 madd4 isa_spec" for option in $all_defaults do eval "val=\$with_"`echo $option | sed s/-/_/g` diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h index 695668424c3..8a4d2cf7f85 100644 --- a/gcc/config/riscv/riscv.h +++ b/gcc/config/riscv/riscv.h @@ -60,6 +60,7 @@ extern const char *riscv_default_mtune (int argc, const char **argv); --with-arch is ignored if -march or -mcpu is specified. --with-abi is ignored if -mabi is specified. --with-tune is ignored if -mtune or -mcpu is specified. + --with-isa-spec is ignored if -misa-spec is specified. But using default -march/-mtune value if -mcpu don't have valid option. */ #define OPTION_DEFAULT_SPECS \ @@ -70,6 +71,7 @@ extern const char *riscv_default_mtune (int argc, const char **argv); " %{!mcpu=*:-march=%(VALUE)}" \ " %{mcpu=*:%:riscv_expand_arch_from_cpu(%* %(VALUE))}}" }, \ {"abi", "%{!mabi=*:-mabi=%(VALUE)}" }, \ + {"isa_spec", "%{!misa-spec=*:-misa-spec=%(VALUE)}" }, \ #ifdef IN_LIBGCC2 #undef TARGET_64BIT -- 2.34.0