From: xuchenghua@loongson.cn
To: gcc-patches@gcc.gnu.org
Cc: joseph@codesourcery.com, paul.hua.gm@gmail.com,
xuchenghua@loongson.cn, chenglulu@loongson.cn
Subject: [PATCH v7 07/12] LoongArch Port: Builtin macros.
Date: Sat, 12 Feb 2022 11:11:37 +0800 [thread overview]
Message-ID: <20220212031142.1165933-8-xuchenghua@loongson.cn> (raw)
In-Reply-To: <20220212031142.1165933-1-xuchenghua@loongson.cn>
From: chenglulu <chenglulu@loongson.cn>
2022-02-12 Chenghua Xu <xuchenghua@loongson.cn>
Lulu Cheng <chenglulu@loongson.cn>
gcc/
*config/loongarch/loongarch-c.cc
---
gcc/config/loongarch/loongarch-c.cc | 109 ++++++++++++++++++++++++++++
1 file changed, 109 insertions(+)
create mode 100644 gcc/config/loongarch/loongarch-c.cc
diff --git a/gcc/config/loongarch/loongarch-c.cc b/gcc/config/loongarch/loongarch-c.cc
new file mode 100644
index 00000000000..e914bf306d5
--- /dev/null
+++ b/gcc/config/loongarch/loongarch-c.cc
@@ -0,0 +1,109 @@
+/* LoongArch-specific code for C family languages.
+ Copyright (C) 2021-2022 Free Software Foundation, Inc.
+ Contributed by Loongson Ltd.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+#define IN_TARGET_CODE 1
+
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "c-family/c-common.h"
+#include "cpplib.h"
+
+#define preprocessing_asm_p() (cpp_get_options (pfile)->lang == CLK_ASM)
+#define builtin_define(TXT) cpp_define (pfile, TXT)
+#define builtin_assert(TXT) cpp_assert (pfile, TXT)
+
+/* Define preprocessor macros for the -march and -mtune options.
+ PREFIX is either _LOONGARCH_ARCH or _LOONGARCH_TUNE, INFO is
+ the selected processor. If INFO's canonical name is "foo",
+ define PREFIX to be "foo", and define an additional macro
+ PREFIX_FOO. */
+#define LARCH_CPP_SET_PROCESSOR(PREFIX, CPU_TYPE) \
+ do \
+ { \
+ char *macro, *p; \
+ int cpu_type = (CPU_TYPE); \
+ \
+ macro = concat ((PREFIX), "_", \
+ loongarch_cpu_strings[cpu_type], NULL); \
+ for (p = macro; *p != 0; p++) \
+ *p = TOUPPER (*p); \
+ \
+ builtin_define (macro); \
+ builtin_define_with_value ((PREFIX), \
+ loongarch_cpu_strings[cpu_type], 1); \
+ free (macro); \
+ } \
+ while (0)
+
+void
+loongarch_cpu_cpp_builtins (cpp_reader *pfile)
+{
+ builtin_assert ("machine=loongarch");
+ builtin_assert ("cpu=loongarch");
+ builtin_define ("__loongarch__");
+
+ LARCH_CPP_SET_PROCESSOR ("_LOONGARCH_ARCH", __ACTUAL_ARCH);
+ LARCH_CPP_SET_PROCESSOR ("_LOONGARCH_TUNE", __ACTUAL_TUNE);
+
+ /* Base architecture / ABI. */
+ if (TARGET_64BIT)
+ {
+ builtin_define ("__loongarch_grlen=64");
+ builtin_define ("__loongarch64");
+ }
+
+ if (TARGET_ABI_LP64)
+ {
+ builtin_define ("_ABILP64=3");
+ builtin_define ("_LOONGARCH_SIM=_ABILP64");
+ builtin_define ("__loongarch_lp64");
+ }
+
+ /* These defines reflect the ABI in use, not whether the
+ FPU is directly accessible. */
+ if (TARGET_DOUBLE_FLOAT_ABI)
+ builtin_define ("__loongarch_double_float=1");
+ else if (TARGET_SINGLE_FLOAT_ABI)
+ builtin_define ("__loongarch_single_float=1");
+
+ if (TARGET_DOUBLE_FLOAT_ABI || TARGET_SINGLE_FLOAT_ABI)
+ builtin_define ("__loongarch_hard_float=1");
+ else
+ builtin_define ("__loongarch_soft_float=1");
+
+
+ /* ISA Extensions. */
+ if (TARGET_DOUBLE_FLOAT)
+ builtin_define ("__loongarch_frlen=64");
+ else if (TARGET_SINGLE_FLOAT)
+ builtin_define ("__loongarch_frlen=32");
+ else
+ builtin_define ("__loongarch_frlen=0");
+
+ /* Native Data Sizes. */
+ builtin_define_with_int_value ("_LOONGARCH_SZINT", INT_TYPE_SIZE);
+ builtin_define_with_int_value ("_LOONGARCH_SZLONG", LONG_TYPE_SIZE);
+ builtin_define_with_int_value ("_LOONGARCH_SZPTR", POINTER_SIZE);
+ builtin_define_with_int_value ("_LOONGARCH_FPSET", 32 / MAX_FPRS_PER_FMT);
+ builtin_define_with_int_value ("_LOONGARCH_SPFPSET", 32);
+
+}
--
2.31.1
next prev parent reply other threads:[~2022-02-12 3:12 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-12 3:11 [PATCH v7 00/12] Add LoongArch support xuchenghua
2022-02-12 3:11 ` [PATCH v7 01/12] LoongArch Port: Regenerate configure xuchenghua
2022-02-12 3:11 ` [PATCH v7 02/12] LoongArch Port: gcc build xuchenghua
2022-02-24 19:17 ` Xi Ruoyao
2022-02-12 3:11 ` [PATCH v7 03/12] LoongArch Port: Regenerate gcc/configure xuchenghua
2022-02-12 3:11 ` [PATCH v7 04/12] LoongArch Port: Machine description files xuchenghua
2022-02-12 3:11 ` [PATCH v7 05/12] LoongArch Port: Machine description C files and .h files xuchenghua
2022-02-24 19:37 ` Xi Ruoyao
2022-02-12 3:11 ` [PATCH v7 06/12] LoongArch Port: Builtin functions xuchenghua
2022-02-12 3:11 ` xuchenghua [this message]
2022-02-12 3:11 ` [PATCH v7 08/12] LoongArch Port: libgcc xuchenghua
2022-02-24 17:42 ` Xi Ruoyao
2022-02-12 3:11 ` [PATCH v7 09/12] LoongArch Port: Regenerate libgcc/configure xuchenghua
2022-02-12 3:11 ` [PATCH v7 10/12] LoongArch Port: libgomp xuchenghua
2022-02-12 3:11 ` [PATCH v7 11/12] LoongArch Port: gcc/testsuite xuchenghua
2022-02-24 19:32 ` Xi Ruoyao
2022-02-28 2:55 ` 程璐璐
2022-02-12 3:11 ` [PATCH v7 12/12] LoongArch Port: Add doc xuchenghua
2022-02-20 6:10 ` Ping ?: [PATCH v7 00/12] Add LoongArch support Paul Hua
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