From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 31F233857C60 for ; Fri, 4 Mar 2022 07:18:43 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 31F233857C60 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn Received: from 5.5.5 (unknown [10.2.5.5]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9BxgM86vSFilJUCAA--.13364S9; Fri, 04 Mar 2022 15:18:42 +0800 (CST) From: xuchenghua@loongson.cn To: gcc-patches@gcc.gnu.org Cc: joseph@codesourcery.com, paul.hua.gm@gmail.com, xuchenghua@loongson.cn, chenglulu@loongson.cn Subject: [PATCH v8 07/12] LoongArch Port: Builtin macros. Date: Fri, 4 Mar 2022 15:18:04 +0800 Message-Id: <20220304071809.3082015-8-xuchenghua@loongson.cn> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220304071809.3082015-1-xuchenghua@loongson.cn> References: <20220304071809.3082015-1-xuchenghua@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID: AQAAf9BxgM86vSFilJUCAA--.13364S9 X-Coremail-Antispam: 1UD129KBjvJXoWxZF4fZr4DZFy5Wr4xtr4kCrg_yoWrAFW8pr WUCr45KF48WFsxCa93ta45Xrn8Zr1rK34IqFyagrWUZFWUA34Iqr1YyrZxJF1UX3yrtw10 9wn3Aa1jqF48Aw7anT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUPI14x267AKxVWrJVCq3wAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_JF0E3s1l82xGYI kIc2x26xkF7I0E14v26ryj6s0DM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2 z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Gr1j6F 4UJwA2z4x0Y4vEx4A2jsIE14v26F4UJVW0owA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_GcCE 3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2I x0cI8IcVAFwI0_JrI_JrylYx0Ex4A2jsIE14v26r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8 JwACjcxG0xvY0x0EwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lw4CEc2x0rVAKj4xxMx kIecxEwVCm-wCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02 F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw 1lIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUCVW8JwCI42IY6xIIjxv20xvEc7Cj xVAFwI0_Gr0_Cr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r 1j6r4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x0JUJ WrAUUUUU= X-CM-SenderInfo: x0xfxv5qjk3to6or00hjvr0hdfq/ X-Spam-Status: No, score=-13.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 04 Mar 2022 07:18:46 -0000 From: chenglulu 2022-03-04 Chenghua Xu Lulu Cheng gcc/ *config/loongarch/loongarch-c.cc --- gcc/config/loongarch/loongarch-c.cc | 109 ++++++++++++++++++++++++++++ 1 file changed, 109 insertions(+) create mode 100644 gcc/config/loongarch/loongarch-c.cc diff --git a/gcc/config/loongarch/loongarch-c.cc b/gcc/config/loongarch/loongarch-c.cc new file mode 100644 index 00000000000..e914bf306d5 --- /dev/null +++ b/gcc/config/loongarch/loongarch-c.cc @@ -0,0 +1,109 @@ +/* LoongArch-specific code for C family languages. + Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING3. If not see +. */ + +#define IN_TARGET_CODE 1 + +#include "config.h" +#include "system.h" +#include "coretypes.h" +#include "tm.h" +#include "c-family/c-common.h" +#include "cpplib.h" + +#define preprocessing_asm_p() (cpp_get_options (pfile)->lang == CLK_ASM) +#define builtin_define(TXT) cpp_define (pfile, TXT) +#define builtin_assert(TXT) cpp_assert (pfile, TXT) + +/* Define preprocessor macros for the -march and -mtune options. + PREFIX is either _LOONGARCH_ARCH or _LOONGARCH_TUNE, INFO is + the selected processor. If INFO's canonical name is "foo", + define PREFIX to be "foo", and define an additional macro + PREFIX_FOO. */ +#define LARCH_CPP_SET_PROCESSOR(PREFIX, CPU_TYPE) \ + do \ + { \ + char *macro, *p; \ + int cpu_type = (CPU_TYPE); \ + \ + macro = concat ((PREFIX), "_", \ + loongarch_cpu_strings[cpu_type], NULL); \ + for (p = macro; *p != 0; p++) \ + *p = TOUPPER (*p); \ + \ + builtin_define (macro); \ + builtin_define_with_value ((PREFIX), \ + loongarch_cpu_strings[cpu_type], 1); \ + free (macro); \ + } \ + while (0) + +void +loongarch_cpu_cpp_builtins (cpp_reader *pfile) +{ + builtin_assert ("machine=loongarch"); + builtin_assert ("cpu=loongarch"); + builtin_define ("__loongarch__"); + + LARCH_CPP_SET_PROCESSOR ("_LOONGARCH_ARCH", __ACTUAL_ARCH); + LARCH_CPP_SET_PROCESSOR ("_LOONGARCH_TUNE", __ACTUAL_TUNE); + + /* Base architecture / ABI. */ + if (TARGET_64BIT) + { + builtin_define ("__loongarch_grlen=64"); + builtin_define ("__loongarch64"); + } + + if (TARGET_ABI_LP64) + { + builtin_define ("_ABILP64=3"); + builtin_define ("_LOONGARCH_SIM=_ABILP64"); + builtin_define ("__loongarch_lp64"); + } + + /* These defines reflect the ABI in use, not whether the + FPU is directly accessible. */ + if (TARGET_DOUBLE_FLOAT_ABI) + builtin_define ("__loongarch_double_float=1"); + else if (TARGET_SINGLE_FLOAT_ABI) + builtin_define ("__loongarch_single_float=1"); + + if (TARGET_DOUBLE_FLOAT_ABI || TARGET_SINGLE_FLOAT_ABI) + builtin_define ("__loongarch_hard_float=1"); + else + builtin_define ("__loongarch_soft_float=1"); + + + /* ISA Extensions. */ + if (TARGET_DOUBLE_FLOAT) + builtin_define ("__loongarch_frlen=64"); + else if (TARGET_SINGLE_FLOAT) + builtin_define ("__loongarch_frlen=32"); + else + builtin_define ("__loongarch_frlen=0"); + + /* Native Data Sizes. */ + builtin_define_with_int_value ("_LOONGARCH_SZINT", INT_TYPE_SIZE); + builtin_define_with_int_value ("_LOONGARCH_SZLONG", LONG_TYPE_SIZE); + builtin_define_with_int_value ("_LOONGARCH_SZPTR", POINTER_SIZE); + builtin_define_with_int_value ("_LOONGARCH_FPSET", 32 / MAX_FPRS_PER_FMT); + builtin_define_with_int_value ("_LOONGARCH_SPFPSET", 32); + +} -- 2.31.1