From: "H.J. Lu" <hjl.tools@gmail.com>
To: gcc-patches@gcc.gnu.org
Cc: liuhongt <hongtao.liu@intel.com>, Uros Bizjak <ubizjak@gmail.com>
Subject: [PATCH] x86: Use x constraint on KL patterns
Date: Fri, 25 Mar 2022 13:50:14 -0700 [thread overview]
Message-ID: <20220325205014.32895-1-hjl.tools@gmail.com> (raw)
Since KL instructions have no AVX512 version, replace the "v" register
constraint with the "x" register constraint.
PR target/105058
* config/i386/sse.md (loadiwkey): Replace "v" with "x".
(aes<aesklvariant>u8): Likewise.
---
gcc/config/i386/sse.md | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 29802d00ce6..33bd2c4768a 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -28364,8 +28364,8 @@ (define_insn "avx512f_dpbf16ps_<mode>_mask"
;; KEYLOCKER
(define_insn "loadiwkey"
- [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand" "v")
- (match_operand:V2DI 1 "register_operand" "v")
+ [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand" "x")
+ (match_operand:V2DI 1 "register_operand" "x")
(match_operand:V2DI 2 "register_operand" "Yz")
(match_operand:SI 3 "register_operand" "a")]
UNSPECV_LOADIWKEY)
@@ -28498,7 +28498,7 @@ (define_int_attr aesklvariant
(UNSPECV_AESENC256KLU8 "enc256kl")])
(define_insn "aes<aesklvariant>u8"
- [(set (match_operand:V2DI 0 "register_operand" "=v")
+ [(set (match_operand:V2DI 0 "register_operand" "=x")
(unspec_volatile:V2DI [(match_operand:V2DI 1 "register_operand" "0")
(match_operand:BLK 2 "memory_operand" "m")]
AESDECENCKL))
--
2.35.1
next reply other threads:[~2022-03-25 20:50 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-25 20:50 H.J. Lu [this message]
2022-03-26 1:08 ` Hongyu Wang
2022-03-26 1:22 ` H.J. Lu
2022-03-26 2:04 ` Hongyu Wang
2022-03-26 2:08 ` H.J. Lu
2022-03-26 6:51 ` Hongtao Liu
2022-03-26 6:35 ` Hongtao Liu
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