* [PATCH]rs6000: optimize li+rldicr+cmpd==>rotldi+cmpldi for 16bits cst
@ 2022-05-09 2:03 Jiufu Guo
2022-05-13 6:32 ` [PATCH V2]rs6000: Optimize comparison on rotated 16bits constant Jiufu Guo
0 siblings, 1 reply; 3+ messages in thread
From: Jiufu Guo @ 2022-05-09 2:03 UTC (permalink / raw)
To: gcc-patches; +Cc: segher, dje.gcc, linkw, guojiufu
Hi!
I would like to ping for trunk:
https://gcc.gnu.org/pipermail/gcc-patches/2022-March/591905.html
BR,
Jiufu
--------------
When checking eq/neq with a constant which has only 16bits, then it can
be optimized to check the rotated data. By this, the constant building
is optimized.
As the example in PR103743:
For "in == 0x8000000000000000LL", this patch generates:
rotldi %r3,%r3,16
cmpldi %cr0,%r3,32768
instead:
li %r9,-1
rldicr %r9,%r9,0,0
cmpd %cr0,%r3,%r9
This patch pass bootstrap and regtest on ppc64 and ppc64le.
Ok for trunk? Thanks!
BR,
Jiufu
PR target/103743
gcc/ChangeLog:
* config/rs6000/rs6000.cc (rot_to_16bits): New function.
(rs6000_generate_compare): Compare rotated const for eq.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr103743.c: New test.
* gcc.target/powerpc/pr103743_1.c: New test.
---
gcc/config/rs6000/rs6000.cc | 62 +++++++++++++
gcc/testsuite/gcc.target/powerpc/pr103743.c | 48 ++++++++++
gcc/testsuite/gcc.target/powerpc/pr103743_1.c | 87 +++++++++++++++++++
3 files changed, 197 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/powerpc/pr103743.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pr103743_1.c
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 3afe78f5d04..4aa1d0ca4ab 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -14860,6 +14860,42 @@ rs6000_reverse_condition (machine_mode mode, enum rtx_code code)
return reverse_condition (code);
}
+/* If SRC is a constant with only 16bits, return the number by which
+ the constant can be rotated to lowest 16bits.
+ Return 0, if SRC does not meet requirements.
+ Set *sgn to 1 if the rotated cst is negative, otherwise set it to 0.
+ Set *res_cst to the rotated constant. */
+
+static int
+rot_to_16bits (rtx src, machine_mode mode, bool *sgn, rtx *res_cst)
+{
+ if (!(src && CONST_INT_P (src)))
+ return 0;
+
+ unsigned HOST_WIDE_INT C = INTVAL (src);
+
+ /* If all 0 except low 16bits. */
+ int leadz = clz_hwi (C) + 16;
+ rtx cst = simplify_gen_binary (ROTATE, mode, src, GEN_INT (leadz));
+ if (satisfies_constraint_K (cst))
+ {
+ *res_cst = cst;
+ return leadz;
+ }
+
+ /* If all 1 except low 15bits. */
+ leadz = clz_hwi (~C) + 15;
+ cst = simplify_gen_binary (ROTATE, mode, src, GEN_INT (leadz));
+ if (satisfies_constraint_I (cst))
+ {
+ *sgn = true;
+ *res_cst = cst;
+ return leadz;
+ }
+
+ return 0;
+}
+
/* Generate a compare for CODE. Return a brand-new rtx that
represents the result of the compare. */
@@ -14889,6 +14925,32 @@ rs6000_generate_compare (rtx cmp, machine_mode mode)
else
comp_mode = CCmode;
+ /* "i == C" ==> "rotl(i,N) == rotl(C,N)" if rotl(C,N) only low 16bits. */
+ if ((code == NE || code == EQ) && mode == DImode)
+ {
+ /* The constant would already been set to a reg in the last insn. */
+ rtx_insn *last = get_last_insn_anywhere ();
+ rtx set = last ? single_set (last) : NULL_RTX;
+ rtx src = (set && SET_DEST (set) == op1) ? SET_SRC (set) : NULL_RTX;
+
+ /* It constant may be in constant pool. */
+ if (src && MEM_P (src))
+ src = avoid_constant_pool_reference (src);
+
+ rtx cst = NULL_RTX;
+ bool sgn = false;
+ int n = rot_to_16bits (src, mode, &sgn, &cst);
+ if (n >= 16 && n <= 48)
+ {
+ rtx dest = gen_reg_rtx (mode);
+ emit_insn (
+ gen_rtx_SET (dest, gen_rtx_ROTATE (mode, op0, GEN_INT (n))));
+ op0 = dest;
+ op1 = cst;
+ comp_mode = sgn ? CCmode : CCUNSmode;
+ }
+ }
+
/* If we have an unsigned compare, make sure we don't have a signed value as
an immediate. */
if (comp_mode == CCUNSmode && CONST_INT_P (op1)
diff --git a/gcc/testsuite/gcc.target/powerpc/pr103743.c b/gcc/testsuite/gcc.target/powerpc/pr103743.c
new file mode 100644
index 00000000000..606e5e51c4f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr103743.c
@@ -0,0 +1,48 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-times "cmpldi" 8 } } */
+/* { dg-final { scan-assembler-times "cmpdi" 4 } } */
+/* { dg-final { scan-assembler-times "rotldi" 8 } } */
+
+int foo (int a);
+
+int __attribute__ ((noinline)) udi_fun (unsigned long long in)
+{
+ if (in == (0x8642000000000000ULL))
+ return foo (1);
+ if (in == (0x7642000000000000ULL))
+ return foo (12);
+ if (in == (0x8000000000000000ULL))
+ return foo (32);
+ if (in == (0x8642FFFFFFFFFFFFULL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFULL))
+ return foo (51);
+ if (in == (0x7567000000ULL))
+ return foo (9);
+ if (in == (0xFFF8567FFFFFFFFFULL))
+ return foo (19);
+
+ return 0;
+}
+
+int __attribute__ ((noinline)) di_fun (long long in)
+{
+ if (in == (0x8642000000000000LL))
+ return foo (1);
+ if (in == (0x7642000000000000LL))
+ return foo (12);
+ if (in == (0x8000000000000000LL))
+ return foo (32);
+ if (in == (0x8642FFFFFFFFFFFFLL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFLL))
+ return foo (51);
+ if (in == (0x7567000000LL))
+ return foo (9);
+ if (in == (0xFFF8567FFFFFFFFFLL))
+ return foo (19);
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr103743_1.c b/gcc/testsuite/gcc.target/powerpc/pr103743_1.c
new file mode 100644
index 00000000000..56fbbe4d4f1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr103743_1.c
@@ -0,0 +1,87 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -std=c99" } */
+
+int
+foo (int a)
+{
+ return a + 6;
+}
+
+int __attribute__ ((noinline)) udi_fun (unsigned long long in)
+{
+ if (in == (0x8642000000000000ULL))
+ return foo (1);
+ if (in == (0x7642000000000000ULL))
+ return foo (12);
+ if (in == (0x8000000000000000ULL))
+ return foo (32);
+ if (in == (0x8642FFFFFFFFFFFFULL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFULL))
+ return foo (51);
+ if (in == (0x7567000000ULL))
+ return foo (9);
+ if (in == (0xFFF8567FFFFFFFFFULL))
+ return foo (19);
+
+ return 0;
+}
+
+int __attribute__ ((noinline)) di_fun (long long in)
+{
+ if (in == (0x8642000000000000LL))
+ return foo (1);
+ if (in == (0x7642000000000000LL))
+ return foo (12);
+ if (in == (0x8000000000000000LL))
+ return foo (32);
+ if (in == (0x8642FFFFFFFFFFFFLL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFLL))
+ return foo (51);
+ return 0;
+}
+
+int
+main ()
+{
+ int e = 0;
+ if (udi_fun (6) != 0)
+ e++;
+ if (udi_fun (0x8642000000000000ULL) != foo (1))
+ e++;
+ if (udi_fun (0x7642000000000000ULL) != foo (12))
+ e++;
+ if (udi_fun (0x8000000000000000ULL) != foo (32))
+ e++;
+ if (udi_fun (0x8642FFFFFFFFFFFFULL) != foo (46))
+ e++;
+ if (udi_fun (0x7642FFFFFFFFFFFFULL) != foo (51))
+ e++;
+ if (udi_fun (0x7567000000ULL) != foo (9))
+ e++;
+ if (udi_fun (0xFFF8567FFFFFFFFFULL) != foo (19))
+ e++;
+
+ if (di_fun (6) != 0)
+ e++;
+ if (di_fun (0x8642000000000000LL) != foo (1))
+ e++;
+ if (di_fun (0x7642000000000000LL) != foo (12))
+ e++;
+ if (di_fun (0x8000000000000000LL) != foo (32))
+ e++;
+ if (di_fun (0x8642FFFFFFFFFFFFLL) != foo (46))
+ e++;
+ if (di_fun (0x7642FFFFFFFFFFFFLL) != foo (51))
+ e++;
+ if (udi_fun (0x7567000000LL) != foo (9))
+ e++;
+ if (udi_fun (0xFFF8567FFFFFFFFFLL) != foo (19))
+ e++;
+
+ if (e)
+ __builtin_abort ();
+ return 0;
+}
+
--
2.25.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH V2]rs6000: Optimize comparison on rotated 16bits constant
2022-05-09 2:03 [PATCH]rs6000: optimize li+rldicr+cmpd==>rotldi+cmpldi for 16bits cst Jiufu Guo
@ 2022-05-13 6:32 ` Jiufu Guo
2022-05-25 5:30 ` [PATCH V3]rs6000: " Jiufu Guo
0 siblings, 1 reply; 3+ messages in thread
From: Jiufu Guo @ 2022-05-13 6:32 UTC (permalink / raw)
To: gcc-patches; +Cc: segher, dje.gcc, linkw
Hi,
This patch is based on:
https://gcc.gnu.org/pipermail/gcc-patches/2022-May/594252.html.
When checking eq/neq with a constant which has only 16bits, then it can
be optimized to check the rotated data. By this, the constant building
is optimized.
As the example in PR103743:
For "in == 0x8000000000000000LL", this patch generates:
rotldi %r3,%r3,16
cmpldi %cr0,%r3,32768
instead:
li %r9,-1
rldicr %r9,%r9,0,0
cmpd %cr0,%r3,%r9
Compare with previous patch, this patch refactors the code, and also
supports the comparison on the constant like: "0xc000000000000001LL",
which constant has 16bits (combined from high and low bits).
This patch pass bootstrap and regtest on ppc64 and ppc64le.
Ok for trunk? Thanks!
BR,
Jiufu
PR target/103743
gcc/ChangeLog:
* config/rs6000/rs6000.cc (rot_bits_to_mask): New.
(rotate_comparison_ops): New.
(rs6000_generate_compare): Optimize compare on const.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr103743.c: New test.
* gcc.target/powerpc/pr103743_1.c: New test.
---
gcc/config/rs6000/rs6000.cc | 100 ++++++++++++++++++
gcc/testsuite/gcc.target/powerpc/pr103743.c | 52 +++++++++
gcc/testsuite/gcc.target/powerpc/pr103743_1.c | 95 +++++++++++++++++
3 files changed, 247 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/powerpc/pr103743.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pr103743_1.c
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 4030864aa1a..dee1c575adc 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -14868,6 +14868,92 @@ rs6000_reverse_condition (machine_mode mode, enum rtx_code code)
return reverse_condition (code);
}
+/* If C can be rotated to a constant which all bits are 0, except lowest
+ N bits. MASK contains 1 in the lowest N bits, other bits are 0.
+ e.g. rotl(0x0000098760000000ULL, 36) == 0x9876, which high 48bits are 0.
+ Return the number by which the SRC is rotated, or -1 if fail to rotate. */
+
+static int
+rot_bits_to_mask (unsigned HOST_WIDE_INT C, unsigned HOST_WIDE_INT mask,
+ int total_bits = 64)
+{
+ /* The position of mask regard to the highest bit. */
+ int pos_mask = clz_hwi (mask);
+
+ /* Bits are lowest already, e.g. 0x1234ULL. */
+ int pos = clz_hwi (C);
+ if (pos_mask < pos)
+ return 0;
+
+ /* Bits in the middle, e.g. 0x0000098760000000ULL => 0x9876. */
+ if ((C & (mask << (pos_mask - pos))) == C)
+ return total_bits - (pos_mask - pos);
+
+ /* Bits are at hightest and lowest together:
+ e.g. 0xc000000000000001ULL => 0xe000. */
+ unsigned HOST_WIDE_INT low_bits = C & mask;
+ pos = clz_hwi (low_bits);
+ int n = pos - pos_mask;
+ unsigned HOST_WIDE_INT rot_C = (C << n) | (C >> (total_bits - n));
+ if ((rot_C & mask) == rot_C)
+ return n;
+
+ return -1;
+}
+
+/* Check if able to optimize the comparison on rotated operands.
+ Return the number by which the SRC is rotated, or -1 if fail to rotate.
+ */
+static int
+rotate_comparison_ops (rtx cmp, machine_mode mode, bool *sgn_cmp, rtx *cst)
+{
+ /* Now only support compare on DImode, for "== or !=". */
+ if (mode != DImode)
+ return -1;
+
+ enum rtx_code code = GET_CODE (cmp);
+ if (code != NE && code != EQ)
+ return -1;
+
+ rtx op1 = XEXP (cmp, 1);
+
+ /* The constant would already been set to a reg in the last insn. */
+ rtx_insn *last = get_last_insn_anywhere ();
+ rtx src = NULL_RTX;
+ if (last && single_set (last) && SET_DEST (single_set (last)) == op1)
+ src = SET_SRC (single_set (last));
+
+ /* It constant may be in constant pool. */
+ if (src && MEM_P (src))
+ src = avoid_constant_pool_reference (src);
+
+ /* Check if able to compare against rotated const. */
+ if (!(src && CONST_INT_P (src)))
+ return -1;
+
+ unsigned HOST_WIDE_INT C = INTVAL (src);
+
+ /* For case like 0x0000098760000000ULL, use logical cmpldi. */
+ int rot = rot_bits_to_mask (C, 0xFFFFULL);
+ if (rot >= 0)
+ {
+ *cst = src;
+ *sgn_cmp = false;
+ return rot;
+ }
+
+ /* For case like 0x8765FFFFFFFFFFFFLL, use sign cmpdi. */
+ rot = rot_bits_to_mask (~C, 0x7FFFULL);
+ if (rot >= 0)
+ {
+ *cst = src;
+ *sgn_cmp = true;
+ return rot;
+ }
+
+ return -1;
+}
+
/* Generate a compare for CODE. Return a brand-new rtx that
represents the result of the compare. */
@@ -14897,6 +14983,20 @@ rs6000_generate_compare (rtx cmp, machine_mode mode)
else
comp_mode = CCmode;
+ /* "i == C" ==> "rotl(i,N) == rotl(C,N)" if rotl(C,N) only low 16bits. */
+ bool sgn_cmp = false;
+ rtx cst = NULL_RTX;
+ int rot_bits = rotate_comparison_ops (cmp, mode, &sgn_cmp, &cst);
+ if (rot_bits > 0)
+ {
+ rtx n = GEN_INT (rot_bits);
+ rtx rot_op0 = gen_reg_rtx (mode);
+ emit_insn (gen_rtx_SET (rot_op0, gen_rtx_ROTATE (mode, op0, n)));
+ op0 = rot_op0;
+ op1 = simplify_gen_binary (ROTATE, mode, cst, n);
+ comp_mode = sgn_cmp ? CCmode : CCUNSmode;
+ }
+
/* If we have an unsigned compare, make sure we don't have a signed value as
an immediate. */
if (comp_mode == CCUNSmode && CONST_INT_P (op1)
diff --git a/gcc/testsuite/gcc.target/powerpc/pr103743.c b/gcc/testsuite/gcc.target/powerpc/pr103743.c
new file mode 100644
index 00000000000..55f365395a7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr103743.c
@@ -0,0 +1,52 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-times "cmpldi" 10 } } */
+/* { dg-final { scan-assembler-times "cmpdi" 4 } } */
+/* { dg-final { scan-assembler-times "rotldi" 10 } } */
+
+int foo (int a);
+
+int __attribute__ ((noinline)) udi_fun (unsigned long long in)
+{
+ if (in == (0x8642000000000000ULL))
+ return foo (1);
+ if (in == (0x7642000000000000ULL))
+ return foo (12);
+ if (in == (0x8000000000000000ULL))
+ return foo (32);
+ if (in == (0x8000000000000001ULL))
+ return foo (33);
+ if (in == (0x8642FFFFFFFFFFFFULL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFULL))
+ return foo (51);
+ if (in == (0x7567000000ULL))
+ return foo (9);
+ if (in == (0xFFF8567FFFFFFFFFULL))
+ return foo (19);
+
+ return 0;
+}
+
+int __attribute__ ((noinline)) di_fun (long long in)
+{
+ if (in == (0x8642000000000000LL))
+ return foo (1);
+ if (in == (0x7642000000000000LL))
+ return foo (12);
+ if (in == (0x8000000000000000LL))
+ return foo (32);
+ if (in == (0x8000000000000001LL))
+ return foo (33);
+ if (in == (0x8642FFFFFFFFFFFFLL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFLL))
+ return foo (51);
+ if (in == (0x7567000000LL))
+ return foo (9);
+ if (in == (0xFFF8567FFFFFFFFFLL))
+ return foo (19);
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr103743_1.c b/gcc/testsuite/gcc.target/powerpc/pr103743_1.c
new file mode 100644
index 00000000000..2c08c56714a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr103743_1.c
@@ -0,0 +1,95 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -std=c99" } */
+
+int
+foo (int a)
+{
+ return a + 6;
+}
+
+int __attribute__ ((noinline)) udi_fun (unsigned long long in)
+{
+ if (in == (0x8642000000000000ULL))
+ return foo (1);
+ if (in == (0x7642000000000000ULL))
+ return foo (12);
+ if (in == (0x8000000000000000ULL))
+ return foo (32);
+ if (in == (0x8000000000000001ULL))
+ return foo (33);
+ if (in == (0x8642FFFFFFFFFFFFULL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFULL))
+ return foo (51);
+ if (in == (0x7567000000ULL))
+ return foo (9);
+ if (in == (0xFFF8567FFFFFFFFFULL))
+ return foo (19);
+
+ return 0;
+}
+
+int __attribute__ ((noinline)) di_fun (long long in)
+{
+ if (in == (0x8642000000000000LL))
+ return foo (1);
+ if (in == (0x7642000000000000LL))
+ return foo (12);
+ if (in == (0x8000000000000000LL))
+ return foo (32);
+ if (in == (0x8000000000000001LL))
+ return foo (33);
+ if (in == (0x8642FFFFFFFFFFFFLL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFLL))
+ return foo (51);
+ return 0;
+}
+
+int
+main ()
+{
+ int e = 0;
+ if (udi_fun (6) != 0)
+ e++;
+ if (udi_fun (0x8642000000000000ULL) != foo (1))
+ e++;
+ if (udi_fun (0x7642000000000000ULL) != foo (12))
+ e++;
+ if (udi_fun (0x8000000000000000ULL) != foo (32))
+ e++;
+ if (udi_fun (0x8000000000000001ULL) != foo (33))
+ e++;
+ if (udi_fun (0x8642FFFFFFFFFFFFULL) != foo (46))
+ e++;
+ if (udi_fun (0x7642FFFFFFFFFFFFULL) != foo (51))
+ e++;
+ if (udi_fun (0x7567000000ULL) != foo (9))
+ e++;
+ if (udi_fun (0xFFF8567FFFFFFFFFULL) != foo (19))
+ e++;
+
+ if (di_fun (6) != 0)
+ e++;
+ if (di_fun (0x8642000000000000LL) != foo (1))
+ e++;
+ if (di_fun (0x7642000000000000LL) != foo (12))
+ e++;
+ if (di_fun (0x8000000000000000LL) != foo (32))
+ e++;
+ if (di_fun (0x8000000000000001LL) != foo (33))
+ e++;
+ if (di_fun (0x8642FFFFFFFFFFFFLL) != foo (46))
+ e++;
+ if (di_fun (0x7642FFFFFFFFFFFFLL) != foo (51))
+ e++;
+ if (udi_fun (0x7567000000LL) != foo (9))
+ e++;
+ if (udi_fun (0xFFF8567FFFFFFFFFLL) != foo (19))
+ e++;
+
+ if (e)
+ __builtin_abort ();
+ return 0;
+}
+
--
2.25.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH V3]rs6000: Optimize comparison on rotated 16bits constant
2022-05-13 6:32 ` [PATCH V2]rs6000: Optimize comparison on rotated 16bits constant Jiufu Guo
@ 2022-05-25 5:30 ` Jiufu Guo
0 siblings, 0 replies; 3+ messages in thread
From: Jiufu Guo @ 2022-05-25 5:30 UTC (permalink / raw)
To: Jiufu Guo via Gcc-patches; +Cc: dje.gcc, segher, linkw
Jiufu Guo via Gcc-patches <gcc-patches@gcc.gnu.org> writes:
Hi,
This patch is based on:
https://gcc.gnu.org/pipermail/gcc-patches/2022-May/594252.html.
Compare with previous patch, this patch refined the comment and
rename one function, and support case: "*p == 0xc000000000000001".
When checking eq/neq with a constant which has only 16bits, then it can
be optimized to check the rotated data. By this, the constant building
is optimized.
As the example in PR103743:
For "in == 0x8000000000000000LL", this patch generates:
rotldi %r3,%r3,16
cmpldi %cr0,%r3,32768
instead:
li %r9,-1
rldicr %r9,%r9,0,0
cmpd %cr0,%r3,%r9
This patch pass bootstrap and regtest on ppc64 and ppc64le.
Ok for trunk? Thanks!
BR,
Jiufu
PR target/103743
gcc/ChangeLog:
* config/rs6000/rs6000.cc (rotate_from_leading_zeros_const): New.
(rotate_comparison_ops): New.
(rs6000_generate_compare): Optimize compare on const.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr103743.c: New test.
* gcc.target/powerpc/pr103743_1.c: New test.
---
gcc/config/rs6000/rs6000.cc | 103 ++++++++++++++++++
gcc/testsuite/gcc.target/powerpc/pr103743.c | 52 +++++++++
gcc/testsuite/gcc.target/powerpc/pr103743_1.c | 95 ++++++++++++++++
3 files changed, 250 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/powerpc/pr103743.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pr103743_1.c
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index d4defc855d0..2cfe3c49e85 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -14858,6 +14858,95 @@ rs6000_reverse_condition (machine_mode mode, enum rtx_code code)
return reverse_condition (code);
}
+/* Check if C can be rotated from an immediate which contains leading
+ zeros at least CLZ.
+
+ Return the number by which C can be rotated from the immediate.
+ Return -1 if C can not be rotated as from. */
+
+static int
+rotate_from_leading_zeros_const (unsigned HOST_WIDE_INT c, int clz)
+{
+ /* case. 0..0xxx: already at least clz zeros. */
+ int lz = clz_hwi (c);
+ if (lz >= clz)
+ return 0;
+
+ /* case a. 0..0xxx0..0: at least clz zeros. */
+ int tz = ctz_hwi (c);
+ if (lz + tz >= clz)
+ return tz;
+
+ /* xx0..0xx: rotate enough bits firstly, then check case a. */
+ const int rot_bits = HOST_BITS_PER_WIDE_INT - clz + 1;
+ unsigned HOST_WIDE_INT rc = (c >> rot_bits) | (c << (clz - 1));
+ tz = ctz_hwi (rc);
+ if (clz_hwi (rc) + tz >= clz)
+ return tz + rot_bits;
+
+ return -1;
+}
+
+/* Check if able to optimize the CMP on rotated operands.
+ "i == C" ==> "rotl(i,N) == rotl(C,N)" if rotl(C,N) fit into
+ immediate operand of cmpldi or cmpdi.
+
+ Return the number by which the operands are rotated from.
+ Return -1 if unable to rotate. */
+
+static int
+rotate_comparison_ops (rtx cmp, machine_mode mode, bool *sgn_cmp, rtx *cst)
+{
+ /* Now only support compare on DImode, for "== or !=". */
+ if (mode != DImode)
+ return -1;
+
+ enum rtx_code code = GET_CODE (cmp);
+ if (code != NE && code != EQ)
+ return -1;
+
+ rtx op1 = XEXP (cmp, 1);
+
+ /* The constant would already been set to reg by previous insn. */
+ rtx_insn *insn = get_last_insn_anywhere ();
+ rtx src = NULL_RTX;
+ while (!src && insn && INSN_P (insn))
+ {
+ rtx set = single_set (insn);
+ if (set && SET_DEST (set) == op1)
+ src = SET_SRC (set);
+ else
+ insn = PREV_INSN (insn);
+ }
+
+ /* It constant may be in constant pool. */
+ if (src && MEM_P (src))
+ src = avoid_constant_pool_reference (src);
+
+ /* Check if able to compare against rotated const. */
+ if (!(src && CONST_INT_P (src)))
+ return -1;
+
+ unsigned HOST_WIDE_INT C = INTVAL (src);
+ *cst = src;
+
+ /* For case like 0x8765000000000000LL, use logical cmpldi.
+ Rotated from 0x8765. */
+ *sgn_cmp = false;
+ int rot = rotate_from_leading_zeros_const (C, 48);
+ if (rot >= 0)
+ return rot;
+
+ /* For case like 0x8765FFFFFFFFFFFFLL, use sign cmpdi.
+ Rotated from 0xFFFFFFFFFFFF8765. */
+ *sgn_cmp = true;
+ rot = rotate_from_leading_zeros_const (~C, 49);
+ if (rot >= 0)
+ return rot;
+
+ return -1;
+}
+
/* Generate a compare for CODE. Return a brand-new rtx that
represents the result of the compare. */
@@ -14887,6 +14976,20 @@ rs6000_generate_compare (rtx cmp, machine_mode mode)
else
comp_mode = CCmode;
+ /* "i == C" ==> "rotl(i,N) == rotl(C,N)" if rotl(C,N) only low 16bits. */
+ bool sgn_cmp = false;
+ rtx cst = NULL_RTX;
+ int rot_bits = rotate_comparison_ops (cmp, mode, &sgn_cmp, &cst);
+ if (rot_bits > 0)
+ {
+ rtx n = GEN_INT (HOST_BITS_PER_WIDE_INT - rot_bits);
+ rtx rot_op0 = gen_reg_rtx (mode);
+ emit_insn (gen_rtx_SET (rot_op0, gen_rtx_ROTATE (mode, op0, n)));
+ op0 = rot_op0;
+ op1 = simplify_gen_binary (ROTATE, mode, cst, n);
+ comp_mode = sgn_cmp ? CCmode : CCUNSmode;
+ }
+
/* If we have an unsigned compare, make sure we don't have a signed value as
an immediate. */
if (comp_mode == CCUNSmode && CONST_INT_P (op1)
diff --git a/gcc/testsuite/gcc.target/powerpc/pr103743.c b/gcc/testsuite/gcc.target/powerpc/pr103743.c
new file mode 100644
index 00000000000..55f365395a7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr103743.c
@@ -0,0 +1,52 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-times "cmpldi" 10 } } */
+/* { dg-final { scan-assembler-times "cmpdi" 4 } } */
+/* { dg-final { scan-assembler-times "rotldi" 10 } } */
+
+int foo (int a);
+
+int __attribute__ ((noinline)) udi_fun (unsigned long long in)
+{
+ if (in == (0x8642000000000000ULL))
+ return foo (1);
+ if (in == (0x7642000000000000ULL))
+ return foo (12);
+ if (in == (0x8000000000000000ULL))
+ return foo (32);
+ if (in == (0x8000000000000001ULL))
+ return foo (33);
+ if (in == (0x8642FFFFFFFFFFFFULL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFULL))
+ return foo (51);
+ if (in == (0x7567000000ULL))
+ return foo (9);
+ if (in == (0xFFF8567FFFFFFFFFULL))
+ return foo (19);
+
+ return 0;
+}
+
+int __attribute__ ((noinline)) di_fun (long long in)
+{
+ if (in == (0x8642000000000000LL))
+ return foo (1);
+ if (in == (0x7642000000000000LL))
+ return foo (12);
+ if (in == (0x8000000000000000LL))
+ return foo (32);
+ if (in == (0x8000000000000001LL))
+ return foo (33);
+ if (in == (0x8642FFFFFFFFFFFFLL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFLL))
+ return foo (51);
+ if (in == (0x7567000000LL))
+ return foo (9);
+ if (in == (0xFFF8567FFFFFFFFFLL))
+ return foo (19);
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr103743_1.c b/gcc/testsuite/gcc.target/powerpc/pr103743_1.c
new file mode 100644
index 00000000000..2c08c56714a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr103743_1.c
@@ -0,0 +1,95 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -std=c99" } */
+
+int
+foo (int a)
+{
+ return a + 6;
+}
+
+int __attribute__ ((noinline)) udi_fun (unsigned long long in)
+{
+ if (in == (0x8642000000000000ULL))
+ return foo (1);
+ if (in == (0x7642000000000000ULL))
+ return foo (12);
+ if (in == (0x8000000000000000ULL))
+ return foo (32);
+ if (in == (0x8000000000000001ULL))
+ return foo (33);
+ if (in == (0x8642FFFFFFFFFFFFULL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFULL))
+ return foo (51);
+ if (in == (0x7567000000ULL))
+ return foo (9);
+ if (in == (0xFFF8567FFFFFFFFFULL))
+ return foo (19);
+
+ return 0;
+}
+
+int __attribute__ ((noinline)) di_fun (long long in)
+{
+ if (in == (0x8642000000000000LL))
+ return foo (1);
+ if (in == (0x7642000000000000LL))
+ return foo (12);
+ if (in == (0x8000000000000000LL))
+ return foo (32);
+ if (in == (0x8000000000000001LL))
+ return foo (33);
+ if (in == (0x8642FFFFFFFFFFFFLL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFLL))
+ return foo (51);
+ return 0;
+}
+
+int
+main ()
+{
+ int e = 0;
+ if (udi_fun (6) != 0)
+ e++;
+ if (udi_fun (0x8642000000000000ULL) != foo (1))
+ e++;
+ if (udi_fun (0x7642000000000000ULL) != foo (12))
+ e++;
+ if (udi_fun (0x8000000000000000ULL) != foo (32))
+ e++;
+ if (udi_fun (0x8000000000000001ULL) != foo (33))
+ e++;
+ if (udi_fun (0x8642FFFFFFFFFFFFULL) != foo (46))
+ e++;
+ if (udi_fun (0x7642FFFFFFFFFFFFULL) != foo (51))
+ e++;
+ if (udi_fun (0x7567000000ULL) != foo (9))
+ e++;
+ if (udi_fun (0xFFF8567FFFFFFFFFULL) != foo (19))
+ e++;
+
+ if (di_fun (6) != 0)
+ e++;
+ if (di_fun (0x8642000000000000LL) != foo (1))
+ e++;
+ if (di_fun (0x7642000000000000LL) != foo (12))
+ e++;
+ if (di_fun (0x8000000000000000LL) != foo (32))
+ e++;
+ if (di_fun (0x8000000000000001LL) != foo (33))
+ e++;
+ if (di_fun (0x8642FFFFFFFFFFFFLL) != foo (46))
+ e++;
+ if (di_fun (0x7642FFFFFFFFFFFFLL) != foo (51))
+ e++;
+ if (udi_fun (0x7567000000LL) != foo (9))
+ e++;
+ if (udi_fun (0xFFF8567FFFFFFFFFLL) != foo (19))
+ e++;
+
+ if (e)
+ __builtin_abort ();
+ return 0;
+}
+
--
2.25.1
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-05-25 5:30 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-09 2:03 [PATCH]rs6000: optimize li+rldicr+cmpd==>rotldi+cmpldi for 16bits cst Jiufu Guo
2022-05-13 6:32 ` [PATCH V2]rs6000: Optimize comparison on rotated 16bits constant Jiufu Guo
2022-05-25 5:30 ` [PATCH V3]rs6000: " Jiufu Guo
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