From: Jiufu Guo <guojiufu@linux.ibm.com>
To: gcc-patches@gcc.gnu.org
Cc: segher@kernel.crashing.org, dje.gcc@gmail.com, linkw@gcc.gnu.org,
guojiufu@linux.ibm.com
Subject: [PATCH V4] rs6000: Optimize cmp on rotated 16bits constant
Date: Mon, 25 Jul 2022 21:29:22 +0800 [thread overview]
Message-ID: <20220725132922.45470-1-guojiufu@linux.ibm.com> (raw)
Hi,
When checking eq/neq with a constant which has only 16bits, it can be
optimized to check the rotated data. By this, the constant building
is optimized.
As the example in PR103743:
For "in == 0x8000000000000000LL", this patch generates:
rotldi %r3,%r3,16
cmpldi %cr0,%r3,32768
instead:
li %r9,-1
rldicr %r9,%r9,0,0
cmpd %cr0,%r3,%r9
This is a new patch to optimize compare(eq/ne) on rotatable constant.
This patch would be more straitforward than previous patch, like:
https://gcc.gnu.org/pipermail/gcc-patches/2022-May/595576.html.
This patch pass bootstrap and regtest on ppc64 and ppc64le.
Is it ok for trunk? Thanks for comments!
BR,
Jeff(Jiufu)
PR target/103743
gcc/ChangeLog:
* config/rs6000/rs6000-protos.h (rotate_from_leading_zeros_const):
New decl.
* config/rs6000/rs6000.cc (rotate_from_leading_zeros_const): New
define for checking simply rotated constant.
* config/rs6000/rs6000.md (*rotate_on_cmpdi): New
define_insn_and_split to optimze comparing on rotated constant.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr103743.c: New test.
* gcc.target/powerpc/pr103743_1.c: New test.
---
gcc/config/rs6000/rs6000-protos.h | 1 +
gcc/config/rs6000/rs6000.cc | 29 ++++++
gcc/config/rs6000/rs6000.md | 54 ++++++++++-
gcc/testsuite/gcc.target/powerpc/pr103743.c | 52 ++++++++++
gcc/testsuite/gcc.target/powerpc/pr103743_1.c | 95 +++++++++++++++++++
5 files changed, 230 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/gcc.target/powerpc/pr103743.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pr103743_1.c
diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h
index 3ea01023609..bc7f6ff64ef 100644
--- a/gcc/config/rs6000/rs6000-protos.h
+++ b/gcc/config/rs6000/rs6000-protos.h
@@ -35,6 +35,7 @@ extern bool xxspltib_constant_p (rtx, machine_mode, int *, int *);
extern int vspltis_shifted (rtx);
extern HOST_WIDE_INT const_vector_elt_as_int (rtx, unsigned int);
extern bool macho_lo_sum_memory_operand (rtx, machine_mode);
+extern int rotate_from_leading_zeros_const (unsigned HOST_WIDE_INT, int);
extern int num_insns_constant (rtx, machine_mode);
extern int small_data_operand (rtx, machine_mode);
extern bool mem_operand_gpr (rtx, machine_mode);
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 3ff16b8ae04..9c0996603d0 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -14861,6 +14861,35 @@ rs6000_reverse_condition (machine_mode mode, enum rtx_code code)
return reverse_condition (code);
}
+/* Check if C can be rotated from an immediate which contains leading
+ zeros at least CLZ.
+
+ Return the number by which C can be rotated from the immediate.
+ Return -1 if C can not be rotated as from. */
+
+int
+rotate_from_leading_zeros_const (unsigned HOST_WIDE_INT c, int clz)
+{
+ /* case. 0..0xxx: already at least clz zeros. */
+ int lz = clz_hwi (c);
+ if (lz >= clz)
+ return 0;
+
+ /* case a. 0..0xxx0..0: at least clz zeros. */
+ int tz = ctz_hwi (c);
+ if (lz + tz >= clz)
+ return tz;
+
+ /* xx0..0xx: rotate enough bits firstly, then check case a. */
+ const int rot_bits = HOST_BITS_PER_WIDE_INT - clz + 1;
+ unsigned HOST_WIDE_INT rc = (c >> rot_bits) | (c << (clz - 1));
+ tz = ctz_hwi (rc);
+ if (clz_hwi (rc) + tz >= clz)
+ return tz + rot_bits;
+
+ return -1;
+}
+
/* Generate a compare for CODE. Return a brand-new rtx that
represents the result of the compare. */
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 1367a2cb779..603781b29aa 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -7720,6 +7720,59 @@ (define_insn "*movsi_from_df"
"xscvdpsp %x0,%x1"
[(set_attr "type" "fp")])
+
+(define_code_iterator eqne [eq ne])
+
+;; "i == C" ==> "rotl(i,N) == rotl(C,N)"
+(define_insn_and_split "*rotate_on_cmpdi"
+ [(set (pc)
+ (if_then_else (eqne (match_operand:DI 1 "gpc_reg_operand" "r")
+ (match_operand:DI 2 "const_int_operand" "n"))
+ (label_ref (match_operand 0 ""))
+ (pc)))]
+ "TARGET_POWERPC64 && !reload_completed && can_create_pseudo_p ()
+ && num_insns_constant (operands[2], DImode) > 1
+ && (rotate_from_leading_zeros_const (~UINTVAL (operands[2]), 49) > 0
+ || rotate_from_leading_zeros_const (UINTVAL (operands[2]), 48) > 0)"
+ "#"
+ "&& 1"
+ [(pc)]
+{
+ rtx cnd = XEXP (SET_SRC (single_set (curr_insn)), 0);
+ bool ne = GET_CODE (cnd) == NE;
+
+ bool sgn = false;
+ unsigned HOST_WIDE_INT C = INTVAL (operands[2]);
+ int rot = rotate_from_leading_zeros_const (C, 48);
+ if (rot < 0)
+ {
+ sgn = true;
+ rot = rotate_from_leading_zeros_const (~C, 49);
+ }
+ rtx n = GEN_INT (HOST_BITS_PER_WIDE_INT - rot);
+
+ /* i' = rotl (i, n) */
+ rtx op0 = gen_reg_rtx (DImode);
+ emit_insn (gen_rtx_SET (op0, gen_rtx_ROTATE (DImode, operands[1], n)));
+
+ /* C' = rotl (C, n) */
+ rtx op1 = GEN_INT ((C << INTVAL (n)) | (C >> rot));
+
+ /* i' == C' */
+ machine_mode comp_mode = sgn ? CCmode : CCUNSmode;
+ rtx cc = gen_reg_rtx (comp_mode);
+ emit_insn (gen_rtx_SET (cc, gen_rtx_COMPARE (comp_mode, op0, op1)));
+
+ rtx cmp = ne ? gen_rtx_NE (CCmode, cc, const0_rtx)
+ : gen_rtx_EQ (CCmode, cc, const0_rtx);
+ rtx loc_ref = gen_rtx_LABEL_REF (VOIDmode, operands[0]);
+ emit_jump_insn (gen_rtx_SET (pc_rtx,
+ gen_rtx_IF_THEN_ELSE (VOIDmode, cmp,
+ loc_ref, pc_rtx)));
+ DONE;
+}
+)
+
;; Split a load of a large constant into the appropriate two-insn
;; sequence.
@@ -13426,7 +13479,6 @@ (define_expand "@ctr<mode>"
;; rs6000_legitimate_combined_insn prevents combine creating any of
;; the ctr<mode> insns.
-(define_code_iterator eqne [eq ne])
(define_code_attr bd [(eq "bdz") (ne "bdnz")])
(define_code_attr bd_neg [(eq "bdnz") (ne "bdz")])
diff --git a/gcc/testsuite/gcc.target/powerpc/pr103743.c b/gcc/testsuite/gcc.target/powerpc/pr103743.c
new file mode 100644
index 00000000000..e18833685fb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr103743.c
@@ -0,0 +1,52 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-times "cmpldi" 10 } } */
+/* { dg-final { scan-assembler-times "cmpdi" 4 } } */
+/* { dg-final { scan-assembler-times "rotldi" 14 } } */
+
+int foo (int a);
+
+int __attribute__ ((noinline)) udi_fun (unsigned long long in)
+{
+ if (in == (0x8642000000000000ULL))
+ return foo (1);
+ if (in == (0x7642000000000000ULL))
+ return foo (12);
+ if (in == (0x8000000000000000ULL))
+ return foo (32);
+ if (in == (0x8000000000000001ULL))
+ return foo (33);
+ if (in == (0x8642FFFFFFFFFFFFULL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFULL))
+ return foo (51);
+ if (in == (0x7567000000ULL))
+ return foo (9);
+ if (in == (0xFFF8567FFFFFFFFFULL))
+ return foo (19);
+
+ return 0;
+}
+
+int __attribute__ ((noinline)) di_fun (long long in)
+{
+ if (in == (0x8642000000000000LL))
+ return foo (1);
+ if (in == (0x7642000000000000LL))
+ return foo (12);
+ if (in == (0x8000000000000000LL))
+ return foo (32);
+ if (in == (0x8000000000000001LL))
+ return foo (33);
+ if (in == (0x8642FFFFFFFFFFFFLL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFLL))
+ return foo (51);
+ if (in == (0x7567000000LL))
+ return foo (9);
+ if (in == (0xFFF8567FFFFFFFFFLL))
+ return foo (19);
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr103743_1.c b/gcc/testsuite/gcc.target/powerpc/pr103743_1.c
new file mode 100644
index 00000000000..2c08c56714a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr103743_1.c
@@ -0,0 +1,95 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -std=c99" } */
+
+int
+foo (int a)
+{
+ return a + 6;
+}
+
+int __attribute__ ((noinline)) udi_fun (unsigned long long in)
+{
+ if (in == (0x8642000000000000ULL))
+ return foo (1);
+ if (in == (0x7642000000000000ULL))
+ return foo (12);
+ if (in == (0x8000000000000000ULL))
+ return foo (32);
+ if (in == (0x8000000000000001ULL))
+ return foo (33);
+ if (in == (0x8642FFFFFFFFFFFFULL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFULL))
+ return foo (51);
+ if (in == (0x7567000000ULL))
+ return foo (9);
+ if (in == (0xFFF8567FFFFFFFFFULL))
+ return foo (19);
+
+ return 0;
+}
+
+int __attribute__ ((noinline)) di_fun (long long in)
+{
+ if (in == (0x8642000000000000LL))
+ return foo (1);
+ if (in == (0x7642000000000000LL))
+ return foo (12);
+ if (in == (0x8000000000000000LL))
+ return foo (32);
+ if (in == (0x8000000000000001LL))
+ return foo (33);
+ if (in == (0x8642FFFFFFFFFFFFLL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFLL))
+ return foo (51);
+ return 0;
+}
+
+int
+main ()
+{
+ int e = 0;
+ if (udi_fun (6) != 0)
+ e++;
+ if (udi_fun (0x8642000000000000ULL) != foo (1))
+ e++;
+ if (udi_fun (0x7642000000000000ULL) != foo (12))
+ e++;
+ if (udi_fun (0x8000000000000000ULL) != foo (32))
+ e++;
+ if (udi_fun (0x8000000000000001ULL) != foo (33))
+ e++;
+ if (udi_fun (0x8642FFFFFFFFFFFFULL) != foo (46))
+ e++;
+ if (udi_fun (0x7642FFFFFFFFFFFFULL) != foo (51))
+ e++;
+ if (udi_fun (0x7567000000ULL) != foo (9))
+ e++;
+ if (udi_fun (0xFFF8567FFFFFFFFFULL) != foo (19))
+ e++;
+
+ if (di_fun (6) != 0)
+ e++;
+ if (di_fun (0x8642000000000000LL) != foo (1))
+ e++;
+ if (di_fun (0x7642000000000000LL) != foo (12))
+ e++;
+ if (di_fun (0x8000000000000000LL) != foo (32))
+ e++;
+ if (di_fun (0x8000000000000001LL) != foo (33))
+ e++;
+ if (di_fun (0x8642FFFFFFFFFFFFLL) != foo (46))
+ e++;
+ if (di_fun (0x7642FFFFFFFFFFFFLL) != foo (51))
+ e++;
+ if (udi_fun (0x7567000000LL) != foo (9))
+ e++;
+ if (udi_fun (0xFFF8567FFFFFFFFFLL) != foo (19))
+ e++;
+
+ if (e)
+ __builtin_abort ();
+ return 0;
+}
+
--
2.17.1
next reply other threads:[~2022-07-25 13:29 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-25 13:29 Jiufu Guo [this message]
2022-08-17 3:12 ` Jiufu Guo
2022-08-23 22:18 ` Segher Boessenkool
2022-08-24 7:48 ` Jiufu Guo
2022-08-24 14:07 ` Segher Boessenkool
2022-08-25 12:11 ` Jiufu Guo
2022-08-25 12:34 ` Segher Boessenkool
2022-08-26 9:28 ` Jiufu Guo
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