From: Palmer Dabbelt <palmer@rivosinc.com>
To: gcc-patches@gcc.gnu.org
Subject: [PATCH] RISC-V: Fix the sge<u> ..., x0, ... pattern
Date: Sat, 6 Aug 2022 12:41:23 -0700 [thread overview]
Message-ID: <20220806194122.19633-1-palmer@rivosinc.com> (raw)
There's no operand 2 here, so referencing it doesn't make sense. I
couldn't find a way to trigger bad assembly output so I don't have a
test.
gcc/ChangeLog
PR target/106543
* config/riscv/riscv.md (sge<u>_<X:mode><GPR:mode>): Remove
reference to non-existent operand.
---
No new failures on the Linux multilibs on trunk.
---
gcc/config/riscv/riscv.md | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 0796f91dd30..ed1c7f241e6 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -2386,7 +2386,7 @@
(any_ge:GPR (match_operand:X 1 "register_operand" " r")
(const_int 1)))]
""
- "slt%i2<u>\t%0,zero,%1"
+ "slt<u>\t%0,zero,%1"
[(set_attr "type" "slt")
(set_attr "mode" "<X:MODE>")])
--
2.34.1
next reply other threads:[~2022-08-06 19:41 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-06 19:41 Palmer Dabbelt [this message]
2022-08-10 15:51 ` Kito Cheng
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