From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from server28.superhosting.bg (server28.superhosting.bg [217.174.156.11]) by sourceware.org (Postfix) with ESMTPS id 5576A3857BA4 for ; Mon, 22 Aug 2022 19:36:13 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 5576A3857BA4 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=dinux.eu Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=dinux.eu DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=dinux.eu; s=default; h=Content-Transfer-Encoding:MIME-Version:Message-Id:Date:Subject: Cc:To:From:Sender:Reply-To:Content-Type:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: In-Reply-To:References:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=NyXoNLjgJ6ACG40gfM+xolJTBEcQAv32X5k6VGXukzk=; b=s4XkC4NN4bSqxgew93YM4jFMMd X1IWizy2MW+rtrHEbSUdjgNsgfAW+Kl6kU/w7oOSEUzb0bXpGYZZSX22o1ajpbzOMS+AqjoRJ0r4L szNpb45ZBbFY8DPz/HJ192UWIaiuG1E5m75GgW2xSwFLuqJnEYGAFmpTPWR5/0GWqPwNqzFXCpNOw 5vnxSIpRZd+S1eNAoAnnoCPK5IOg8YNyaPBNkYKENaUt9Y13UBcQkB7VVHTyMl2nASKMZMMLw7NNV W1pUrU+YQwfA/F18y1lbZ9XkJNCCBd6CTeUEXDxQfyrWLrKbrdKROoHqfyzN3TiSPG76pdgZ2GKR/ p959ZuYA==; Received: from [95.87.234.74] (port=58104 helo=kendros.lan) by server28.superhosting.bg with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1oQDDT-000BOI-IV; Mon, 22 Aug 2022 22:36:12 +0300 From: Dimitar Dimitrov To: gcc-patches@gcc.gnu.org Subject: [committed] pru: Optimize 64-bit logical operations Date: Mon, 22 Aug 2022 22:35:41 +0300 Message-Id: <20220822193541.1860863-3-dimitar@dinux.eu> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server28.superhosting.bg X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - dinux.eu X-Get-Message-Sender-Via: server28.superhosting.bg: authenticated_id: dimitar@dinux.eu X-Authenticated-Sender: server28.superhosting.bg: dimitar@dinux.eu X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Aug 2022 19:36:14 -0000 The earlyclobber in the pattern yields inefficient code due to unnecessarily generated moves. Optimize by removing the earlyclobber for two special alternatives: - If OP2 is a small constant integer. - If the logical bit operation has only two operands. Regression tested on pru-unknown-elf, committed to mainline. gcc/ChangeLog: * config/pru/pru.md (pru_di3): New alternative for two operands but without earlyclobber. gcc/testsuite/ChangeLog: * gcc.target/pru/bitop-di.c: New test. Signed-off-by: Dimitar Dimitrov --- gcc/config/pru/pru.md | 39 +++++++++++++++++++++---- gcc/testsuite/gcc.target/pru/bitop-di.c | 25 ++++++++++++++++ 2 files changed, 58 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/gcc.target/pru/bitop-di.c diff --git a/gcc/config/pru/pru.md b/gcc/config/pru/pru.md index 02e11350a4d..144cd35d809 100644 --- a/gcc/config/pru/pru.md +++ b/gcc/config/pru/pru.md @@ -786,15 +786,42 @@ (define_expand "di3" operands[2] = force_reg (DImode, operands[2]); }) +;; 64-bit pattern for logical operations. (define_insn "pru_di3" - [(set (match_operand:DI 0 "register_operand" "=&r,&r") + [(set (match_operand:DI 0 "register_operand" "=r,&r,r") (LOGICAL_BITOP:DI - (match_operand:DI 1 "register_operand" "%r,r") - (match_operand:DI 2 "reg_or_ubyte_operand" "r,I")))] + (match_operand:DI 1 "register_operand" "%0,r,r") + (match_operand:DI 2 "reg_or_ubyte_operand" "r,r,I")))] "" - "@ - \\t%F0, %F1, %F2\;\\t%N0, %N1, %N2 - \\t%F0, %F1, %2\;\\t%N0, %N1, 0" +{ + switch (which_alternative) + { + case 0: + if (REGNO (operands[0]) == (REGNO (operands[2]) + 4)) + return "\\t%N0, %N0, %N2\;" + "\\t%F0, %F0, %F2"; + else + return "\\t%F0, %F0, %F2\;" + "\\t%N0, %N0, %N2"; + case 1: + /* With the three-register variant there is no way to handle the case + when OP0 overlaps both OP1 and OP2. Example: + OP0_lo == OP1_hi + OP0_hi == OP2_lo + Hence this variant's OP0 must be marked as an earlyclobber. */ + return "\\t%F0, %F1, %F2\;" + "\\t%N0, %N1, %N2"; + case 2: + if (REGNO (operands[0]) == (REGNO (operands[1]) + 4)) + return "\\t%N0, %N1, 0\;" + "\\t%F0, %F1, %2"; + else + return "\\t%F0, %F1, %2\;" + "\\t%N0, %N1, 0"; + default: + gcc_unreachable (); + } +} [(set_attr "type" "alu") (set_attr "length" "8")]) diff --git a/gcc/testsuite/gcc.target/pru/bitop-di.c b/gcc/testsuite/gcc.target/pru/bitop-di.c new file mode 100644 index 00000000000..4290cdbc759 --- /dev/null +++ b/gcc/testsuite/gcc.target/pru/bitop-di.c @@ -0,0 +1,25 @@ +/* 64-bit logical bit operations. */ + +/* { dg-do compile } */ +/* { dg-options "-O1" } */ + +unsigned long long +test_xor_di (unsigned long long val1, unsigned long long val2) +{ + /* { dg-final { scan-assembler "xor\\tr14, r14, r16" } } */ + return val1 ^ val2; +} + +unsigned long long +test_and_di (unsigned long long val1, unsigned long long val2) +{ + /* { dg-final { scan-assembler "and\\tr14, r14, r16" } } */ + return val1 & val2; +} + +unsigned long long +test_ior_di (unsigned long long val1, unsigned long long val2) +{ + /* { dg-final { scan-assembler "or\\tr14, r14, r16" } } */ + return val1 | val2; +} -- 2.37.2