From: juzhe.zhong@rivai.ai
To: gcc-patches@gcc.gnu.org
Cc: kito.cheng@gmail.com, zhongjuzhe <juzhe.zhong@rivai.ai>
Subject: [PATCH] RISC-V: Fix annotation
Date: Tue, 30 Aug 2022 10:57:42 +0800 [thread overview]
Message-ID: <20220830025742.178055-1-juzhe.zhong@rivai.ai> (raw)
From: zhongjuzhe <juzhe.zhong@rivai.ai>
gcc/ChangeLog:
* config/riscv/riscv.h (enum reg_class): Change vype to vtype.
---
gcc/config/riscv/riscv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
index 29582f7c545..3ee5a93ce6a 100644
--- a/gcc/config/riscv/riscv.h
+++ b/gcc/config/riscv/riscv.h
@@ -462,7 +462,7 @@ enum reg_class
FP_REGS, /* floating-point registers */
FRAME_REGS, /* arg pointer and frame pointer */
VL_REGS, /* vl register */
- VTYPE_REGS, /* vype register */
+ VTYPE_REGS, /* vtype register */
VM_REGS, /* v0.t registers */
VD_REGS, /* vector registers except v0.t */
V_REGS, /* vector registers */
--
2.36.1
next reply other threads:[~2022-08-30 2:57 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-30 2:57 juzhe.zhong [this message]
2022-09-01 2:05 ` Kito Cheng
2022-12-14 8:39 juzhe.zhong
2022-12-16 19:53 ` Jeff Law
2022-12-19 15:07 ` Kito Cheng
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