From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id 1AF2938515FB; Tue, 6 Sep 2022 12:28:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 1AF2938515FB Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 286CLxhf020008; Tue, 6 Sep 2022 12:28:03 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : mime-version; s=pp1; bh=0OtIYeodjOYY21qTUNQnffqEtM9kuqM1v9PPEopdmVg=; b=mvfouM9TxKRfAAMd18gKDdR1dFs8byGIpLevgAUn5H6fEDntC4ifGKR5YTAdXETaBfmE 0CyNkTR5ahsEVB4cr4/h9OsCS3O4+mHy3kMmtH/bLkkQwAK7m7wUUKvZkdSMX5E8o69b SknAuye7dr8krImQ8zL7Iag4VBkQJQvsBJdRTeCzJchSIlF6cWbEyVLSh/7Fg0+rEv1R 23rIx+n1et2XOGwH4CsIn/k/rOXMNDQhvH2P0yEiuKU32UdHsZ3bnUZ3gCRHAtXRsa+6 Fct6dw/aWnypfF/dMMDqDuTizlAoShAnBNydqe2ctP3NMBee8oZzZ7Un03G3maLlsUTv FA== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3je65703ys-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 06 Sep 2022 12:28:02 +0000 Received: from m0098410.ppops.net (m0098410.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 286CO8nJ030283; Tue, 6 Sep 2022 12:28:02 GMT Received: from ppma04ams.nl.ibm.com (63.31.33a9.ip4.static.sl-reverse.com [169.51.49.99]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3je65703xw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 06 Sep 2022 12:28:02 +0000 Received: from pps.filterd (ppma04ams.nl.ibm.com [127.0.0.1]) by ppma04ams.nl.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 286CMEuq000315; Tue, 6 Sep 2022 12:27:59 GMT Received: from b06cxnps4075.portsmouth.uk.ibm.com (d06relay12.portsmouth.uk.ibm.com [9.149.109.197]) by ppma04ams.nl.ibm.com with ESMTP id 3jbxj8ur2g-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 06 Sep 2022 12:27:59 +0000 Received: from b06wcsmtp001.portsmouth.uk.ibm.com (b06wcsmtp001.portsmouth.uk.ibm.com [9.149.105.160]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 286CRvLH28311962 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 6 Sep 2022 12:27:57 GMT Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 82207A405C; Tue, 6 Sep 2022 12:27:57 +0000 (GMT) Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B91A8A4054; Tue, 6 Sep 2022 12:27:56 +0000 (GMT) Received: from pike.rch.stglabs.ibm.com (unknown [9.5.12.127]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Tue, 6 Sep 2022 12:27:56 +0000 (GMT) From: Jiufu Guo To: gcc-patches@gcc.gnu.org Cc: segher@kernel.crashing.org, dje.gcc@gmail.com, linkw@gcc.gnu.org, guojiufu@linux.ibm.com Subject: [PATCH] Using pli(paddi) and rotate to build 64bit constants Date: Tue, 6 Sep 2022 20:27:56 +0800 Message-Id: <20220906122756.76006-1-guojiufu@linux.ibm.com> X-Mailer: git-send-email 2.17.1 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 6yWSWm0LVOToU14AeWnhUZ32dY816z0Y X-Proofpoint-GUID: LJFKSYxm60wRe5jxFlG9W3iZNDQVB4lU X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-06_05,2022-09-06_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 impostorscore=0 suspectscore=0 bulkscore=0 mlxlogscore=999 malwarescore=0 priorityscore=1501 lowpriorityscore=0 clxscore=1015 phishscore=0 mlxscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2207270000 definitions=main-2209060057 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi, Test cases are updated/added, and code is refined as the comments in the review for previous version: https://gcc.gnu.org/pipermail/gcc-patches/2022-September/600768.html As mentioned in PR106550, since pli could support 34bits immediate, we could use less instructions(3insn would be ok) to build 64bits constant with pli. For example, for constant 0x020805006106003, we could generate it with: asm code1: pli 9,101736451 (0x6106003) sldi 9,9,32 paddi 9,9, 2130000 (0x0208050) or asm code2: pli 10, 2130000 pli 9, 101736451 rldimi 9, 10, 32, 0 The asm code2 would be better. This patch generates the asm code2 in split1 pass, this patch also supports to generate asm code1 when splitter is only after RA. This patch pass boostrap and regtest on ppc64. P10 testing is running. Thanks for any comments! BR, Jeff(Jiufu) PR target/106550 gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Use pli. gcc/testsuite/ChangeLog: * gcc.target/powerpc/pr106550.c: New test. * gcc.target/powerpc/pr106550_1.c: New test. --- gcc/config/rs6000/rs6000.cc | 35 +++++++++++++++++++ gcc/testsuite/gcc.target/powerpc/pr106550.c | 14 ++++++++ gcc/testsuite/gcc.target/powerpc/pr106550_1.c | 22 ++++++++++++ 3 files changed, 71 insertions(+) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr106550.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr106550_1.c diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 2f3146e56f8..c05b7869141 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -10181,6 +10181,41 @@ rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT c) gen_rtx_IOR (DImode, copy_rtx (temp), GEN_INT (ud1))); } + else if (TARGET_PREFIXED) + { + if (can_create_pseudo_p ()) + { + /* pli A,H + pli B,L + rldimi A,B,32,0. */ + temp = gen_reg_rtx (DImode); + rtx temp1 = gen_reg_rtx (DImode); + emit_move_insn (temp, GEN_INT ((ud4 << 16) | ud3)); + emit_move_insn (temp1, GEN_INT ((ud2 << 16) | ud1)); + + emit_insn (gen_rotldi3_insert_3 (dest, temp, GEN_INT (32), temp1, + GEN_INT (0xffffffff))); + } + else + { + /* pli A,H + sldi A,32 + paddi A,A,L. */ + emit_move_insn (dest, GEN_INT ((ud4 << 16) | ud3)); + + emit_move_insn (dest, gen_rtx_ASHIFT (DImode, dest, GEN_INT (32))); + + bool can_use_paddi = REGNO (dest) != FIRST_GPR_REGNO; + + /* Use paddi for the low 32 bits. */ + if (ud2 != 0 && ud1 != 0 && can_use_paddi) + emit_move_insn (dest, gen_rtx_PLUS (DImode, dest, + GEN_INT ((ud2 << 16) | ud1))); + + /* Use oris, ori for low 32 bits. */ + if (ud2 != 0 && (ud1 == 0 || !can_use_paddi)) + emit_move_insn (ud1 != 0 ? dest : dest, + gen_rtx_IOR (DImode, dest, GEN_INT (ud2 << 16))); + if (ud1 != 0 && (ud2 == 0 || !can_use_paddi)) + emit_move_insn (dest, gen_rtx_IOR (DImode, dest, GEN_INT (ud1))); + } + } else { temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode); diff --git a/gcc/testsuite/gcc.target/powerpc/pr106550.c b/gcc/testsuite/gcc.target/powerpc/pr106550.c new file mode 100644 index 00000000000..d023fac4676 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr106550.c @@ -0,0 +1,14 @@ +/* PR target/106550 */ +/* { dg-options "-O2 -mdejagnu-cpu=power10" } */ +/* { dg-require-effective-target power10_ok } */ + +void +foo (unsigned long long *a) +{ + *a++ = 0x020805006106003; /* pli+pli+rldimi */ + *a++ = 0x2351847027482577;/* pli+pli+rldimi */ +} + +/* { dg-final { scan-assembler-times {\mpli\M} 4 } } */ +/* { dg-final { scan-assembler-times {\mrldimi\M} 2 } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/pr106550_1.c b/gcc/testsuite/gcc.target/powerpc/pr106550_1.c new file mode 100644 index 00000000000..48f76ca3da9 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr106550_1.c @@ -0,0 +1,22 @@ +/* PR target/106550 */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-options "-O2 -mdejagnu-cpu=power10 -fdisable-rtl-split1" } */ +/* force the constant splitter run after RA: -fdisable-rtl-split1. */ + +void +foo (unsigned long long *a) +{ + /* Test oris/ori is used where paddi does not work with 'r0'. */ + register long long d asm("r0") = 0x1245abcef9240dec; /* pli+sldi+oris+ori */ + long long n; + asm("cntlzd %0, %1" : "=r"(n) : "r"(d)); + *a++ = n; + + *a++ = 0x235a8470a7480000ULL; /* pli+sldi+oris*/ + *a++ = 0x23a184700000b677ULL; /* pli+sldi+ori*/ +} + +/* { dg-final { scan-assembler-times {\mpli\M} 3 } } */ +/* { dg-final { scan-assembler-times {\msldi\M} 3 } } */ +/* { dg-final { scan-assembler-times {\moris\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mori\M} 2 } } */ -- 2.17.1