From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) by sourceware.org (Postfix) with ESMTPS id E2B483858D38 for ; Tue, 20 Sep 2022 13:14:09 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E2B483858D38 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=foss.st.com Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28KBJqYg029128; Tue, 20 Sep 2022 15:14:04 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : mime-version : content-type : content-transfer-encoding; s=selector1; bh=tXXuY658wcK56uHhpwZ+1wKwN29hsGWV7sOxOcopOtE=; b=OSCfdb2NamFdHNMBZXKUxfQzlqrIiFNRny3ixyqmuzrdupRv91FtxXyBh5CSxWW3fw/9 DP5llATMXgcogaJtSxf3QtlzT3+Z7lRzNQVoghJWqsMeiRN/WS5DLzFa/oFtDo7ouenm fizuTd8UG1Qf4AdmHVEsYwVaZH5DoCSpHLtW4j4apgcjCYAKvfgVpSTskqiwIoByFQyS t1R6TmMyAGZ3NciylLySs0cMojxclP/RP/xDy2j95Fae8v5hHH39XNzxg4qQUxNtzNH4 dtP3nvsIgDtYPs1Os0eUFV4W3mXQzHS/PFJ6l9FglT1UEPBhcec1b5CNCy0AxV1H1XoP 9Q== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3jn6atssm3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 20 Sep 2022 15:14:04 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 6947410002A; Tue, 20 Sep 2022 15:14:02 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 65537231503; Tue, 20 Sep 2022 15:14:02 +0200 (CEST) Received: from jkgcxl0002.jkg.st.com (10.75.127.47) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2375.31; Tue, 20 Sep 2022 15:14:01 +0200 From: =?UTF-8?q?Torbj=C3=B6rn=20SVENSSON?= To: CC: , , , =?UTF-8?q?Torbj=C3=B6rn=20SVENSSON?= Subject: [PATCH v2] testsuite: Skip intrinsics test if arm Date: Tue, 20 Sep 2022 15:13:37 +0200 Message-ID: <20220920131337.843046-1-torbjorn.svensson@foss.st.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-20_04,2022-09-20_02,2022-06-22_01 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: In the test cases, it's clearly written that intrinsics is not implemented on arm*. A simple xfail does not help since there are link error and that would cause an UNRESOLVED testcase rather than XFAIL. By changing to dg-skip-if, the entire test case is omitted. gcc/testsuite/ChangeLog: * gcc.target/aarch64/advsimd-intrinsics/vld1x2.c: Replace dg-xfail-if with gd-skip-if. * gcc.target/aarch64/advsimd-intrinsics/vld1x3.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vld1x4.c: Likewise. Co-Authored-By: Yvan ROUX Signed-off-by: Torbjörn SVENSSON --- gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c | 2 +- gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c | 2 +- gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c index 92a139bc523..f933102be47 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c @@ -1,6 +1,6 @@ /* We haven't implemented these intrinsics for arm yet. */ -/* { dg-xfail-if "" { arm*-*-* } } */ /* { dg-do run } */ +/* { dg-skip-if "unsupported" { arm*-*-* } } */ /* { dg-options "-O3" } */ #include diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c index 6ddd507d9cf..b20dec061b5 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c @@ -1,6 +1,6 @@ /* We haven't implemented these intrinsics for arm yet. */ -/* { dg-xfail-if "" { arm*-*-* } } */ /* { dg-do run } */ +/* { dg-skip-if "unsupported" { arm*-*-* } } */ /* { dg-options "-O3" } */ #include diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c index 451a0afc6aa..e59f845880e 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c @@ -1,6 +1,6 @@ /* We haven't implemented these intrinsics for arm yet. */ -/* { dg-xfail-if "" { arm*-*-* } } */ /* { dg-do run } */ +/* { dg-skip-if "unsupported" { arm*-*-* } } */ /* { dg-options "-O3" } */ #include -- 2.25.1