From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) by sourceware.org (Postfix) with ESMTPS id A36B83858D3C for ; Fri, 7 Oct 2022 13:29:01 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org A36B83858D3C Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=foss.st.com Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 297AmFB5022870; Fri, 7 Oct 2022 15:28:55 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : mime-version : content-type : content-transfer-encoding; s=selector1; bh=EvPKULajsCh7PRU5oT/LaODvUl/7QqMnGfmmSvLO5NU=; b=uqb9iWCYGfSEASJH5Y/tSrC1RCiaMbZnRXGgQSRmRc7+P3SkfjCnef0bZU15vwyToy2x FEu0jJHbVtA+jMn7fgeY2BjMsosERNxEJ0clSbsgWcuVCZi+VD0bTDCGvhSoetUvTFoF nkAA0fWG7+prBYUMLvNAUS5eYA/n/bcEbot1UMNxYm02JoAHmxnIY/FaXJdDONgS494N fEL/c1aHdqMjd/9pk/ZJ3VftKac0UksX1vSWTVP75iuF6E7jShr/8NR01FkASiKVShjr 0IxOijT6YhIdbxHmfxOf68P+MRefbyQK0X54LnD1Xu7i7ZwYcOs6B8e1Z4mjqpp08pw2 cg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3k2jp80u4h-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 07 Oct 2022 15:28:55 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5F23910002A; Fri, 7 Oct 2022 15:28:48 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 462DC22F7C0; Fri, 7 Oct 2022 15:28:48 +0200 (CEST) Received: from jkgcxl0002.jkg.st.com (10.75.127.47) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2375.31; Fri, 7 Oct 2022 15:28:47 +0200 From: =?UTF-8?q?Torbj=C3=B6rn=20SVENSSON?= To: CC: , , =?UTF-8?q?Torbj=C3=B6rn=20SVENSSON?= , Yvan ROUX Subject: [PATCH v3] testsuite: Sanitize fails for SP FPU on Arm Date: Fri, 7 Oct 2022 15:28:29 +0200 Message-ID: <20221007132828.335317-1-torbjorn.svensson@foss.st.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-10-06_05,2022-10-07_01,2022-06-22_01 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,GIT_PATCH_0,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This patch stops reporting fails for Arm targets with single precision floating point unit for types wider than 32 bits (the width of float on arm-none-eabi). As reported in PR102017, fenv is reported as supported in recent versions of newlib. At the same time, for some Arm targets, the implementation in libgcc does not support exceptions and thus, the test fails with a call to abort(). gcc/testsuite/ChangeLog: * lib/target-supports.exp (check_effective_target_fenv_exceptions_double): New. (check_effective_target_fenv_exceptions_long_double): New. * gcc.dg/c2x-float-7.c: Split into 3 tests... * gcc.dg/c2x-float-7a.c: Float part of c2x-float-7.c. * gcc.dg/c2x-float-7b.c: Double part of c2x-float-7.c. * gcc.dg/c2x-float-7c.c: Long double part of c2x-float-7.c. * gcc.dg/pr95115.c: Switch to fenv_exceptions_double. * gcc.dg/torture/float32x-nan-floath.c: Likewise. * gcc.dg/torture/float32x-nan.c: Likewise. * gcc.dg/torture/float64-nan-floath.c: Likewise. * gcc.dg/torture/float64-nan.c: Likewise. * gcc.dg/torture/inf-compare-1.c: Likewise. * gcc.dg/torture/inf-compare-2.c: Likewise. * gcc.dg/torture/inf-compare-3.c: Likewise. * gcc.dg/torture/inf-compare-4.c: Likewise. * gcc.dg/torture/inf-compare-5.c: Likewise. * gcc.dg/torture/inf-compare-6.c: Likewise. * gcc.dg/torture/inf-compare-7.c: Likewise. * gcc.dg/torture/inf-compare-8.c: Likewise. * gcc.dg/torture/inf-compare-1-float.c: New test. * gcc.dg/torture/inf-compare-2-float.c: New test. * gcc.dg/torture/inf-compare-3-float.c: New test. * gcc.dg/torture/inf-compare-4-float.c: New test. * gcc.dg/torture/inf-compare-5-float.c: New test. * gcc.dg/torture/inf-compare-6-float.c: New test. * gcc.dg/torture/inf-compare-7-float.c: New test. * gcc.dg/torture/inf-compare-8-float.c: New test. Co-Authored-By: Yvan ROUX Signed-off-by: Torbjörn SVENSSON --- gcc/testsuite/gcc.dg/c2x-float-7.c | 49 ------------ gcc/testsuite/gcc.dg/c2x-float-7a.c | 32 ++++++++ gcc/testsuite/gcc.dg/c2x-float-7b.c | 32 ++++++++ gcc/testsuite/gcc.dg/c2x-float-7c.c | 32 ++++++++ gcc/testsuite/gcc.dg/pr95115.c | 2 +- .../gcc.dg/torture/float32x-nan-floath.c | 2 +- gcc/testsuite/gcc.dg/torture/float32x-nan.c | 2 +- .../gcc.dg/torture/float64-nan-floath.c | 2 +- gcc/testsuite/gcc.dg/torture/float64-nan.c | 2 +- .../gcc.dg/torture/inf-compare-1-float.c | 21 ++++++ gcc/testsuite/gcc.dg/torture/inf-compare-1.c | 2 +- .../gcc.dg/torture/inf-compare-2-float.c | 21 ++++++ gcc/testsuite/gcc.dg/torture/inf-compare-2.c | 2 +- .../gcc.dg/torture/inf-compare-3-float.c | 21 ++++++ gcc/testsuite/gcc.dg/torture/inf-compare-3.c | 2 +- .../gcc.dg/torture/inf-compare-4-float.c | 21 ++++++ gcc/testsuite/gcc.dg/torture/inf-compare-4.c | 2 +- .../gcc.dg/torture/inf-compare-5-float.c | 19 +++++ gcc/testsuite/gcc.dg/torture/inf-compare-5.c | 2 +- .../gcc.dg/torture/inf-compare-6-float.c | 19 +++++ gcc/testsuite/gcc.dg/torture/inf-compare-6.c | 2 +- .../gcc.dg/torture/inf-compare-7-float.c | 19 +++++ gcc/testsuite/gcc.dg/torture/inf-compare-7.c | 2 +- .../gcc.dg/torture/inf-compare-8-float.c | 19 +++++ gcc/testsuite/gcc.dg/torture/inf-compare-8.c | 2 +- gcc/testsuite/lib/target-supports.exp | 74 +++++++++++++++++++ 26 files changed, 343 insertions(+), 62 deletions(-) delete mode 100644 gcc/testsuite/gcc.dg/c2x-float-7.c create mode 100644 gcc/testsuite/gcc.dg/c2x-float-7a.c create mode 100644 gcc/testsuite/gcc.dg/c2x-float-7b.c create mode 100644 gcc/testsuite/gcc.dg/c2x-float-7c.c create mode 100644 gcc/testsuite/gcc.dg/torture/inf-compare-1-float.c create mode 100644 gcc/testsuite/gcc.dg/torture/inf-compare-2-float.c create mode 100644 gcc/testsuite/gcc.dg/torture/inf-compare-3-float.c create mode 100644 gcc/testsuite/gcc.dg/torture/inf-compare-4-float.c create mode 100644 gcc/testsuite/gcc.dg/torture/inf-compare-5-float.c create mode 100644 gcc/testsuite/gcc.dg/torture/inf-compare-6-float.c create mode 100644 gcc/testsuite/gcc.dg/torture/inf-compare-7-float.c create mode 100644 gcc/testsuite/gcc.dg/torture/inf-compare-8-float.c diff --git a/gcc/testsuite/gcc.dg/c2x-float-7.c b/gcc/testsuite/gcc.dg/c2x-float-7.c deleted file mode 100644 index 0c90ff24165..00000000000 --- a/gcc/testsuite/gcc.dg/c2x-float-7.c +++ /dev/null @@ -1,49 +0,0 @@ -/* Test SNAN macros. Runtime exceptions test, to verify NaN is - signaling. */ -/* { dg-do run } */ -/* { dg-require-effective-target fenv_exceptions } */ -/* { dg-options "-std=c2x -pedantic-errors -fsignaling-nans" } */ -/* { dg-add-options ieee } */ - -#include -#include - -/* These should be defined if and only if signaling NaNs are supported - for the given types. If the testsuite gains effective-target - support for targets not supporting signaling NaNs, or not - supporting them for all types, this test should be made - appropriately conditional. */ -#ifndef FLT_SNAN -#error "FLT_SNAN undefined" -#endif -#ifndef DBL_SNAN -#error "DBL_SNAN undefined" -#endif -#ifndef LDBL_SNAN -#error "LDBL_SNAN undefined" -#endif - -volatile float f = FLT_SNAN; -volatile double d = DBL_SNAN; -volatile long double ld = LDBL_SNAN; - -extern void abort (void); -extern void exit (int); - -int -main (void) -{ - feclearexcept (FE_ALL_EXCEPT); - f += f; - if (!fetestexcept (FE_INVALID)) - abort (); - feclearexcept (FE_ALL_EXCEPT); - d += d; - if (!fetestexcept (FE_INVALID)) - abort (); - feclearexcept (FE_ALL_EXCEPT); - ld += ld; - if (!fetestexcept (FE_INVALID)) - abort (); - exit (0); -} diff --git a/gcc/testsuite/gcc.dg/c2x-float-7a.c b/gcc/testsuite/gcc.dg/c2x-float-7a.c new file mode 100644 index 00000000000..129e7906adc --- /dev/null +++ b/gcc/testsuite/gcc.dg/c2x-float-7a.c @@ -0,0 +1,32 @@ +/* Test SNAN macros. Runtime exceptions test, to verify NaN is + signaling. */ +/* { dg-do run } */ +/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-options "-std=c2x -pedantic-errors -fsignaling-nans" } */ +/* { dg-add-options ieee } */ + +#include +#include + +/* This should be defined if and only if signaling NaNs is supported + for the given type. If the testsuite gains effective-target + support for targets not supporting signaling NaNs, this test + should be made appropriately conditional. */ +#ifndef FLT_SNAN +#error "FLT_SNAN undefined" +#endif + +volatile float f = FLT_SNAN; + +extern void abort (void); +extern void exit (int); + +int +main (void) +{ + feclearexcept (FE_ALL_EXCEPT); + f += f; + if (!fetestexcept (FE_INVALID)) + abort (); + exit (0); +} diff --git a/gcc/testsuite/gcc.dg/c2x-float-7b.c b/gcc/testsuite/gcc.dg/c2x-float-7b.c new file mode 100644 index 00000000000..0ae9038c1f2 --- /dev/null +++ b/gcc/testsuite/gcc.dg/c2x-float-7b.c @@ -0,0 +1,32 @@ +/* Test SNAN macros. Runtime exceptions test, to verify NaN is + signaling. */ +/* { dg-do run } */ +/* { dg-require-effective-target fenv_exceptions_double } */ +/* { dg-options "-std=c2x -pedantic-errors -fsignaling-nans" } */ +/* { dg-add-options ieee } */ + +#include +#include + +/* This should be defined if and only if signaling NaNs is supported + for the given type. If the testsuite gains effective-target + support for targets not supporting signaling NaNs, this test + should be made appropriately conditional. */ +#ifndef DBL_SNAN +#error "DBL_SNAN undefined" +#endif + +volatile double d = DBL_SNAN; + +extern void abort (void); +extern void exit (int); + +int +main (void) +{ + feclearexcept (FE_ALL_EXCEPT); + d += d; + if (!fetestexcept (FE_INVALID)) + abort (); + exit (0); +} diff --git a/gcc/testsuite/gcc.dg/c2x-float-7c.c b/gcc/testsuite/gcc.dg/c2x-float-7c.c new file mode 100644 index 00000000000..038fd5501b3 --- /dev/null +++ b/gcc/testsuite/gcc.dg/c2x-float-7c.c @@ -0,0 +1,32 @@ +/* Test SNAN macros. Runtime exceptions test, to verify NaN is + signaling. */ +/* { dg-do run } */ +/* { dg-require-effective-target fenv_exceptions_long_double } */ +/* { dg-options "-std=c2x -pedantic-errors -fsignaling-nans" } */ +/* { dg-add-options ieee } */ + +#include +#include + +/* This should be defined if and only if signaling NaNs is supported + for the given type. If the testsuite gains effective-target + support for targets not supporting signaling NaNs, this test + should be made appropriately conditional. */ +#ifndef LDBL_SNAN +#error "LDBL_SNAN undefined" +#endif + +volatile long double ld = LDBL_SNAN; + +extern void abort (void); +extern void exit (int); + +int +main (void) +{ + feclearexcept (FE_ALL_EXCEPT); + ld += ld; + if (!fetestexcept (FE_INVALID)) + abort (); + exit (0); +} diff --git a/gcc/testsuite/gcc.dg/pr95115.c b/gcc/testsuite/gcc.dg/pr95115.c index 46a95dfb698..69c4f83250c 100644 --- a/gcc/testsuite/gcc.dg/pr95115.c +++ b/gcc/testsuite/gcc.dg/pr95115.c @@ -1,7 +1,7 @@ /* { dg-do run } */ /* { dg-options "-O2 -ftrapping-math" } */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ #include #include diff --git a/gcc/testsuite/gcc.dg/torture/float32x-nan-floath.c b/gcc/testsuite/gcc.dg/torture/float32x-nan-floath.c index 0aab4be26ca..8d58b41e069 100644 --- a/gcc/testsuite/gcc.dg/torture/float32x-nan-floath.c +++ b/gcc/testsuite/gcc.dg/torture/float32x-nan-floath.c @@ -4,7 +4,7 @@ /* { dg-add-options float32x } */ /* { dg-add-options ieee } */ /* { dg-require-effective-target float32x_runtime } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ #define WIDTH 32 #define EXT 1 diff --git a/gcc/testsuite/gcc.dg/torture/float32x-nan.c b/gcc/testsuite/gcc.dg/torture/float32x-nan.c index d976d379732..46f35a4ca80 100644 --- a/gcc/testsuite/gcc.dg/torture/float32x-nan.c +++ b/gcc/testsuite/gcc.dg/torture/float32x-nan.c @@ -4,7 +4,7 @@ /* { dg-add-options float32x } */ /* { dg-add-options ieee } */ /* { dg-require-effective-target float32x_runtime } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ #define WIDTH 32 #define EXT 1 diff --git a/gcc/testsuite/gcc.dg/torture/float64-nan-floath.c b/gcc/testsuite/gcc.dg/torture/float64-nan-floath.c index 1f5298bd399..444f234737b 100644 --- a/gcc/testsuite/gcc.dg/torture/float64-nan-floath.c +++ b/gcc/testsuite/gcc.dg/torture/float64-nan-floath.c @@ -4,7 +4,7 @@ /* { dg-add-options float64 } */ /* { dg-add-options ieee } */ /* { dg-require-effective-target float64_runtime } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ #define WIDTH 64 #define EXT 0 diff --git a/gcc/testsuite/gcc.dg/torture/float64-nan.c b/gcc/testsuite/gcc.dg/torture/float64-nan.c index 51a6437fd52..11b70edea37 100644 --- a/gcc/testsuite/gcc.dg/torture/float64-nan.c +++ b/gcc/testsuite/gcc.dg/torture/float64-nan.c @@ -4,7 +4,7 @@ /* { dg-add-options float64 } */ /* { dg-add-options ieee } */ /* { dg-require-effective-target float64_runtime } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ #define WIDTH 64 #define EXT 0 diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-1-float.c b/gcc/testsuite/gcc.dg/torture/inf-compare-1-float.c new file mode 100644 index 00000000000..6409878f39f --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-1-float.c @@ -0,0 +1,21 @@ +/* { dg-do run { xfail { powerpc*-*-* } } } */ +/* remove the xfail for powerpc when pr58684 is fixed */ +/* { dg-add-options ieee } */ +/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-skip-if "fenv" { powerpc-ibm-aix* } } */ + +#include + +extern void abort (void); +extern void exit (int); + +volatile float x = __builtin_nan (""); +volatile int i; + +int +main (void) +{ + i = x > __builtin_inf (); + if (i != 0 || !fetestexcept (FE_INVALID)) + abort (); +} diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-1.c b/gcc/testsuite/gcc.dg/torture/inf-compare-1.c index 70f255e680a..5e0a2d0c601 100644 --- a/gcc/testsuite/gcc.dg/torture/inf-compare-1.c +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-1.c @@ -1,7 +1,7 @@ /* { dg-do run { xfail { powerpc*-*-* } } } */ /* remove the xfail for powerpc when pr58684 is fixed */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ /* { dg-skip-if "fenv" { powerpc-ibm-aix* } } */ #include diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-2-float.c b/gcc/testsuite/gcc.dg/torture/inf-compare-2-float.c new file mode 100644 index 00000000000..3cb7df8c157 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-2-float.c @@ -0,0 +1,21 @@ +/* { dg-do run { xfail { powerpc*-*-* } } } */ +/* remove the xfail for powerpc when pr58684 is fixed */ +/* { dg-add-options ieee } */ +/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-skip-if "fenv" { powerpc-ibm-aix* } } */ + +#include + +extern void abort (void); +extern void exit (int); + +volatile float x = __builtin_nan (""); +volatile int i; + +int +main (void) +{ + i = x < -__builtin_inf (); + if (i != 0 || !fetestexcept (FE_INVALID)) + abort (); +} diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-2.c b/gcc/testsuite/gcc.dg/torture/inf-compare-2.c index 011f992d5a0..6e396fb6c98 100644 --- a/gcc/testsuite/gcc.dg/torture/inf-compare-2.c +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-2.c @@ -1,7 +1,7 @@ /* { dg-do run { xfail { powerpc*-*-* } } } */ /* remove the xfail for powerpc when pr58684 is fixed */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ /* { dg-skip-if "fenv" { powerpc-ibm-aix* } } */ #include diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-3-float.c b/gcc/testsuite/gcc.dg/torture/inf-compare-3-float.c new file mode 100644 index 00000000000..297aa0e2e0e --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-3-float.c @@ -0,0 +1,21 @@ +/* { dg-do run { xfail { powerpc*-*-* } } } */ +/* remove the xfail for powerpc when pr58684 is fixed */ +/* { dg-add-options ieee } */ +/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-skip-if "fenv" { powerpc-ibm-aix* } } */ + +#include + +extern void abort (void); +extern void exit (int); + +volatile float x = __builtin_nan (""); +volatile int i; + +int +main (void) +{ + i = x <= __builtin_inf (); + if (i != 0 || !fetestexcept (FE_INVALID)) + abort (); +} diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-3.c b/gcc/testsuite/gcc.dg/torture/inf-compare-3.c index de5c478a8d8..cac8c68f49f 100644 --- a/gcc/testsuite/gcc.dg/torture/inf-compare-3.c +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-3.c @@ -1,7 +1,7 @@ /* { dg-do run { xfail { powerpc*-*-* } } } */ /* remove the xfail for powerpc when pr58684 is fixed */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ /* { dg-skip-if "fenv" { powerpc-ibm-aix* } } */ #include diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-4-float.c b/gcc/testsuite/gcc.dg/torture/inf-compare-4-float.c new file mode 100644 index 00000000000..e719c3700e9 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-4-float.c @@ -0,0 +1,21 @@ +/* { dg-do run { xfail { powerpc*-*-* } } } */ +/* remove the xfail for powerpc when pr58684 is fixed */ +/* { dg-add-options ieee } */ +/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-skip-if "fenv" { powerpc-ibm-aix* } } */ + +#include + +extern void abort (void); +extern void exit (int); + +volatile float x = __builtin_nan (""); +volatile int i; + +int +main (void) +{ + i = x >= -__builtin_inf (); + if (i != 0 || !fetestexcept (FE_INVALID)) + abort (); +} diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-4.c b/gcc/testsuite/gcc.dg/torture/inf-compare-4.c index 685562d3a40..43b2b2f04ff 100644 --- a/gcc/testsuite/gcc.dg/torture/inf-compare-4.c +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-4.c @@ -1,7 +1,7 @@ /* { dg-do run { xfail { powerpc*-*-* } } } */ /* remove the xfail for powerpc when pr58684 is fixed */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ /* { dg-skip-if "fenv" { powerpc-ibm-aix* } } */ #include diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-5-float.c b/gcc/testsuite/gcc.dg/torture/inf-compare-5-float.c new file mode 100644 index 00000000000..0050644ee8d --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-5-float.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-add-options ieee } */ +/* { dg-require-effective-target fenv_exceptions } */ + +#include + +extern void abort (void); +extern void exit (int); + +volatile float x = __builtin_nan (""); +volatile int i; + +int +main (void) +{ + i = x == __builtin_inf (); + if (i != 0 || fetestexcept (FE_INVALID)) + abort (); +} diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-5.c b/gcc/testsuite/gcc.dg/torture/inf-compare-5.c index d7f17e7dd21..37289b4771f 100644 --- a/gcc/testsuite/gcc.dg/torture/inf-compare-5.c +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-5.c @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ #include diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-6-float.c b/gcc/testsuite/gcc.dg/torture/inf-compare-6-float.c new file mode 100644 index 00000000000..46e8758b4aa --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-6-float.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-add-options ieee } */ +/* { dg-require-effective-target fenv_exceptions } */ + +#include + +extern void abort (void); +extern void exit (int); + +volatile float x = __builtin_nan (""); +volatile int i; + +int +main (void) +{ + i = x == -__builtin_inf (); + if (i != 0 || fetestexcept (FE_INVALID)) + abort (); +} diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-6.c b/gcc/testsuite/gcc.dg/torture/inf-compare-6.c index 2dd862b7ebe..7a8ff01fab2 100644 --- a/gcc/testsuite/gcc.dg/torture/inf-compare-6.c +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-6.c @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ #include diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-7-float.c b/gcc/testsuite/gcc.dg/torture/inf-compare-7-float.c new file mode 100644 index 00000000000..11d987a9f4d --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-7-float.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-add-options ieee } */ +/* { dg-require-effective-target fenv_exceptions } */ + +#include + +extern void abort (void); +extern void exit (int); + +volatile float x = __builtin_nan (""); +volatile int i; + +int +main (void) +{ + i = x != __builtin_inf (); + if (i != 1 || fetestexcept (FE_INVALID)) + abort (); +} diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-7.c b/gcc/testsuite/gcc.dg/torture/inf-compare-7.c index 36676b4e79f..c0e080b4027 100644 --- a/gcc/testsuite/gcc.dg/torture/inf-compare-7.c +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-7.c @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ #include diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-8-float.c b/gcc/testsuite/gcc.dg/torture/inf-compare-8-float.c new file mode 100644 index 00000000000..5510c67401c --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-8-float.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-add-options ieee } */ +/* { dg-require-effective-target fenv_exceptions } */ + +#include + +extern void abort (void); +extern void exit (int); + +volatile float x = __builtin_nan (""); +volatile int i; + +int +main (void) +{ + i = x != -__builtin_inf (); + if (i != 1 || fetestexcept (FE_INVALID)) + abort (); +} diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-8.c b/gcc/testsuite/gcc.dg/torture/inf-compare-8.c index cfda813a0c6..ebc0260bfba 100644 --- a/gcc/testsuite/gcc.dg/torture/inf-compare-8.c +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-8.c @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ #include diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 7c9dd45f2a7..ab3f52c2715 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -10835,6 +10835,80 @@ proc check_effective_target_fenv_exceptions_dfp {} { } [add_options_for_ieee "-std=gnu99"]] } +# Return 1 if is available with all the standard IEEE +# exceptions and floating-point exceptions are raised by arithmetic +# operations. (If the target requires special options for "inexact" +# exceptions, those need to be specified in the testcases.) + +proc check_effective_target_fenv_exceptions_double {} { + return [check_runtime fenv_exceptions_double { + #include + #include + #ifndef FE_DIVBYZERO + # error Missing FE_DIVBYZERO + #endif + #ifndef FE_INEXACT + # error Missing FE_INEXACT + #endif + #ifndef FE_INVALID + # error Missing FE_INVALID + #endif + #ifndef FE_OVERFLOW + # error Missing FE_OVERFLOW + #endif + #ifndef FE_UNDERFLOW + # error Missing FE_UNDERFLOW + #endif + volatile double a = 0.0f, r; + int + main (void) + { + r = a / a; + if (fetestexcept (FE_INVALID)) + exit (0); + else + abort (); + } + } [add_options_for_ieee "-std=gnu99"]] +} + +# Return 1 if is available with all the standard IEEE +# exceptions and floating-point exceptions are raised by arithmetic +# operations. (If the target requires special options for "inexact" +# exceptions, those need to be specified in the testcases.) + +proc check_effective_target_fenv_exceptions_long_double {} { + return [check_runtime fenv_exceptions_long_double { + #include + #include + #ifndef FE_DIVBYZERO + # error Missing FE_DIVBYZERO + #endif + #ifndef FE_INEXACT + # error Missing FE_INEXACT + #endif + #ifndef FE_INVALID + # error Missing FE_INVALID + #endif + #ifndef FE_OVERFLOW + # error Missing FE_OVERFLOW + #endif + #ifndef FE_UNDERFLOW + # error Missing FE_UNDERFLOW + #endif + volatile long double a = 0.0f, r; + int + main (void) + { + r = a / a; + if (fetestexcept (FE_INVALID)) + exit (0); + else + abort (); + } + } [add_options_for_ieee "-std=gnu99"]] +} + # Return 1 if -fexceptions is supported. proc check_effective_target_exceptions {} { -- 2.25.1