From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from cstnet.cn (smtp84.cstnet.cn [159.226.251.84]) by sourceware.org (Postfix) with ESMTP id 54CCF384D1B1 for ; Thu, 20 Oct 2022 09:33:07 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 54CCF384D1B1 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=iscas.ac.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=iscas.ac.cn Received: from localhost.localdomain (unknown [47.113.87.88]) by APP-05 (Coremail) with SMTP id zQCowAB3jnfCFVFjiiDzBQ--.8085S6; Thu, 20 Oct 2022 17:32:53 +0800 (CST) From: jiawei To: gcc-patches@gcc.gnu.org Cc: kito.cheng@sifive.com, palmer@rivosinc.com, christoph.muellner@vrull.eu, wuwei2016@iscas.ac.cn, Jiawei Subject: [v4 PATCH 4/4] RISC-V: Add zhinx/zhinxmin testcases. Date: Thu, 20 Oct 2022 17:32:35 +0800 Message-Id: <20221020093235.5071-5-jiawei@iscas.ac.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221020093235.5071-1-jiawei@iscas.ac.cn> References: <20221020093235.5071-1-jiawei@iscas.ac.cn> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID:zQCowAB3jnfCFVFjiiDzBQ--.8085S6 X-Coremail-Antispam: 1UD129KBjvJXoWxXFy5CFyxKrW8Wr48AF1kZrb_yoW7JF1fpa 1DGrWFyrWfJFZa9r1fK3W8JFWaqrsFgayru3s2yw1xur13trWIqFyktF4xXw1UJFyUtr43 urZFkr4aka1FqrJanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUBS14x267AKxVWrJVCq3wAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_JF0E3s1l82xGYI kIc2x26xkF7I0E14v26ryj6s0DM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2 z4x0Y4vE2Ix0cI8IcVAFwI0_Gr0_Xr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Cr0_Gr 1UM28EF7xvwVC2z280aVAFwI0_Cr1j6rxdM28EF7xvwVC2z280aVCY1x0267AKxVW0oVCq 3wAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7 IYx2IY67AKxVWUJVWUGwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r4U M4x0Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwCY02Avz4vE174l42xK82 IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC2 0s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMI IF0xvE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF 0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87 Iv6xkF7I0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjfUU6pPUUUUU X-Originating-IP: [47.113.87.88] X-CM-SenderInfo: 5mld4v3l6l2u1dvotugofq/1tbiAw4FAGNQ7Y2cHwAAsY X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,KAM_SHORT,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: Jiawei Test zhinx/zhinxmin support, same like with zfh/zfhmin testcases but use gprs and don't use fmv instruction. gcc/testsuite/ChangeLog: * gcc.target/riscv/_Float16-zhinx-1.c: New test. * gcc.target/riscv/_Float16-zhinx-2.c: New test. * gcc.target/riscv/_Float16-zhinx-3.c: New test. * gcc.target/riscv/_Float16-zhinxmin-1.c: New test. * gcc.target/riscv/_Float16-zhinxmin-2.c: New test. * gcc.target/riscv/_Float16-zhinxmin-3.c: New test. --- gcc/testsuite/gcc.target/riscv/_Float16-zhinx-1.c | 10 ++++++++++ gcc/testsuite/gcc.target/riscv/_Float16-zhinx-2.c | 9 +++++++++ gcc/testsuite/gcc.target/riscv/_Float16-zhinx-3.c | 9 +++++++++ gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c | 10 ++++++++++ gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-2.c | 10 ++++++++++ gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-3.c | 10 ++++++++++ 6 files changed, 58 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zhinx-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zhinx-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zhinx-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-3.c diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinx-1.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinx-1.c new file mode 100644 index 00000000000..90172b57e05 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinx-1.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64i_zhinx -mabi=lp64 -O" } */ + +_Float16 foo1 (_Float16 a, _Float16 b) +{ + return b; +} + +/* { dg-final { scan-assembler-not "fmv.h" } } */ +/* { dg-final { scan-assembler-times "mv" 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinx-2.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinx-2.c new file mode 100644 index 00000000000..26f01198c97 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinx-2.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64i_zhinx -mabi=lp64 -O" } */ + +_Float16 foo1 (_Float16 a, _Float16 b) +{ + /* { dg-final { scan-assembler-not "fadd.h fa" } } */ + /* { dg-final { scan-assembler-times "fadd.h a" 1 } } */ + return a + b; +} diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinx-3.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinx-3.c new file mode 100644 index 00000000000..573913568e7 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinx-3.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64i_zhinx -mabi=lp64 -O" } */ + +int foo1 (_Float16 a, _Float16 b) +{ + /* { dg-final { scan-assembler-not "fgt.h fa" } } */ + /* { dg-final { scan-assembler-times "fgt.h a" 1 } } */ + return a > b; +} diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c new file mode 100644 index 00000000000..0070ebf616c --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64i_zhinxmin -mabi=lp64 -O" } */ + +_Float16 foo1 (_Float16 a, _Float16 b) +{ + /* { dg-final { scan-assembler-not "fmv.h" } } */ + /* { dg-final { scan-assembler-not "fmv.s" } } */ + /* { dg-final { scan-assembler-times "mv" 1 } } */ + return b; +} diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-2.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-2.c new file mode 100644 index 00000000000..17f45a938d5 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-2.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64i_zhinxmin -mabi=lp64 -O" } */ + +_Float16 foo1 (_Float16 a, _Float16 b) +{ + /* { dg-final { scan-assembler-not "fadd.h" } } */ + /* { dg-final { scan-assembler-not "fadd.s fa" } } */ + /* { dg-final { scan-assembler-times "fadd.s a" 1 } } */ + return a + b; +} diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-3.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-3.c new file mode 100644 index 00000000000..7a43641a5a6 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-3.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64if_zfhmin -mabi=lp64f -O" } */ + +int foo1 (_Float16 a, _Float16 b) +{ + /* { dg-final { scan-assembler-not "fgt.h" } } */ + /* { dg-final { scan-assembler-not "fgt.s fa" } } */ + /* { dg-final { scan-assembler-times "fgt.s a" 1 } } */ + return a > b; +} -- 2.25.1