From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtpbguseast3.qq.com (smtpbguseast3.qq.com [54.243.244.52]) by sourceware.org (Postfix) with ESMTPS id 25F40385840A for ; Mon, 24 Oct 2022 01:39:25 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 25F40385840A Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp69t1666575559tr3pamg9 Received: from server1.localdomain ( [42.247.22.65]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 24 Oct 2022 09:39:18 +0800 (CST) X-QQ-SSF: 01400000000000D0K000000A0000000 X-QQ-FEAT: QityeSR92A2gDdR+yDdHw5u+VvZgMU27g9A28lYT1+pBadduNbwQsjKjWHE9v LVdMAm8sbw0bm+OC6fp2llYqh16DFmQSDwE+uJqUBJIKCNSfk484WgrsjUM1QSOoe1lSDs4 g5JoCTbPCMZt/mdmLms5OyjhdDMuiADw/dLSW6/cI37iImBbO1GhBcdIVFyHUnusADTQ0SC VVYlbnfZumoCOi5FFsyTizYVlyrQPfwRfEdwOqiNvLxoH5gcii6jJC6VW5IJpXlyTvYRs6C 7eAzWtENcRk1hdE5N2deMlWbdaTuE9+erfBVr/9nV0gQYcoNN8JpQrpoib+FtRw8FUIC47/ X7DvSFZ7ZV+a2cftHbEZ4B2UNkf0rl4JUMlO6XNSayPcyz1DgM= X-QQ-GoodBg: 2 From: juzhe.zhong@rivai.ai To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, Ju-Zhe Zhong Subject: [PATCH] RISC-V: Fix REG_CLASS_CONTENTS. Date: Mon, 24 Oct 2022 09:39:16 +0800 Message-Id: <20221024013916.14043-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvr:qybglogicsvr7 X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: Ju-Zhe Zhong gcc/ChangeLog: * config/riscv/riscv.h (enum reg_class): Fix ALL_REGS. --- gcc/config/riscv/riscv.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h index acae68ebb2d..37363e975e1 100644 --- a/gcc/config/riscv/riscv.h +++ b/gcc/config/riscv/riscv.h @@ -516,7 +516,7 @@ enum reg_class { 0x00000000, 0x00000000, 0x00000000, 0x00000001 }, /* V0_REGS */ \ { 0x00000000, 0x00000000, 0x00000000, 0xfffffffe }, /* VNoV0_REGS */ \ { 0x00000000, 0x00000000, 0x00000000, 0xffffffff }, /* V_REGS */ \ - { 0xffffffff, 0xffffffff, 0x00000003, 0x00000000 } /* ALL_REGS */ \ + { 0xffffffff, 0xffffffff, 0x0000000f, 0xffffffff } /* ALL_REGS */ \ } /* A C expression whose value is a register class containing hard -- 2.36.1