From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtpbguseast1.qq.com (smtpbguseast1.qq.com [54.204.34.129]) by sourceware.org (Postfix) with ESMTPS id C138938582A8 for ; Mon, 24 Oct 2022 02:27:45 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org C138938582A8 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp77t1666578460tdu9sdfg Received: from server1.localdomain ( [42.247.22.65]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 24 Oct 2022 10:27:38 +0800 (CST) X-QQ-SSF: 01400000000000D0K000000A0000000 X-QQ-FEAT: 4rCmCcmdMHcz/z+LZP3pZFGX8l9NRmE50fe918o4qJDHdn0yEAg1FI4o1bLlx eCbZm9OaHfq82iMSekowcIwA7mws8FjrLpKRvNfXePQ/GNbdv6Gqfsr08INm4DNgyLETfff 0tZ+K7nv4tqKGe1K5SpEINEKG26JgtZm9JcryPG/vN0Z8T3m5MzkjL/H79E8j0k5mpiLqwH p7RW/PwP+A6VGm2ZPgMXyuEWZFhCwwwqgXycYHkNpxHuwP58KN9u+sclr8mWhyntgex6DFn hycKuCGKAdBoUyGCl+vbLUHeigQPbAMwE5Bzp5WQpPXSvJWBcxPiMCK7mvI0LkFFP4J3XAF ctqHro7o1ZgGeCP0LlUoHBCMhC6lPujKLsmgfOCKJUkbWiGXhSyyJrj9dEJbK5oKAIFRXqb a56E5iCemG0= X-QQ-GoodBg: 2 From: juzhe.zhong@rivai.ai To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, pinskia@gmail.com, Ju-Zhe Zhong Subject: [PATCH] RISC-V: Support (set (mem) (const_poly_int)) Date: Mon, 24 Oct 2022 10:27:37 +0800 Message-Id: <20221024022737.52627-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvr:qybglogicsvr7 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,TXREP,URIBL_BLACK autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: Ju-Zhe Zhong gcc/ChangeLog: * config/riscv/riscv.cc (riscv_legitimize_move): Adjust using force_reg. --- gcc/config/riscv/riscv.cc | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 98374a922d1..1fd34f6ae8d 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -1967,9 +1967,7 @@ riscv_legitimize_move (machine_mode mode, rtx dest, rtx src) */ if (MEM_P (dest)) { - rtx tmp = gen_reg_rtx (mode); - emit_move_insn (tmp, src); - emit_move_insn (dest, tmp); + emit_move_insn (dest, force_reg (mode, src)); return true; } poly_int64 value = rtx_to_poly_int64 (src); -- 2.36.1