From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from xry111.site (xry111.site [IPv6:2001:470:683e::1]) by sourceware.org (Postfix) with ESMTPS id 4B45A3853567 for ; Wed, 9 Nov 2022 13:53:57 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 4B45A3853567 Authentication-Results: sourceware.org; dmarc=pass (p=reject dis=none) header.from=xry111.site Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=xry111.site DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xry111.site; s=default; t=1668002035; bh=p7p78xvpS/8gHnjdjPKqsq65b5DpsMjADA4+VkUQX10=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bP0CnwFyXOYpQwCSE9MIODEtLLfrXoVVQ71WMGznzs/tnReqEhKb7FXzVZpq+NtZ3 b7SJdZCt/29G6YcPQJuIZgRgJFsOfdZCeEfIDTZYH79cSNKTl3E2Z7S4rfXPiTbksc eIwCdoX/FMVEgKCJCTwWIOP0cCltFprKg3m09dnc= Received: from xry111-x57s1.. (unknown [IPv6:240e:358:113a:1300:dc73:854d:832e:2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (Client did not present a certificate) (Authenticated sender: xry111@xry111.site) by xry111.site (Postfix) with ESMTPSA id 0A57E66888; Wed, 9 Nov 2022 08:53:49 -0500 (EST) From: Xi Ruoyao To: gcc-patches@gcc.gnu.org Cc: Lulu Cheng , Wang Xuerui , Chenghua Xu , Xiaolin Tang , Xi Ruoyao Subject: [PATCH v2 2/4] LoongArch: Add ftint{,rm,rp}.{w,l}.{s,d} instructions Date: Wed, 9 Nov 2022 21:53:27 +0800 Message-Id: <20221109135329.952128-3-xry111@xry111.site> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221109135329.952128-1-xry111@xry111.site> References: <20221109135329.952128-1-xry111@xry111.site> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FROM_SUSPICIOUS_NTLD,GIT_PATCH_0,KAM_SHORT,LIKELY_SPAM_FROM,PDS_OTHER_BAD_TLD,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This allows to optimize the following builtins if -fno-math-errno: - __builtin_lrint{,f} - __builtin_lfloor{,f} - __builtin_lceil{,f} Inspired by https://gcc.gnu.org/pipermail/gcc-patches/2022-November/605287.html. ANYFI is added so the compiler won't try ftint.l.s if -mfpu=32. If we simply used GPR here an ICE would be triggered with __builtin_lrintf and -mfpu=32. ftint{rm,rp} instructions may raise inexact exception, so they can't be used if -fno-trapping-math -fno-fp-int-builtin-inexact. Note that the .w.{s,d} variants are not tested because we don't support ILP32 for now. gcc/ChangeLog: * config/loongarch/loongarch.md (UNSPEC_FTINT): New unspec. (UNSPEC_FTINTRM): Likewise. (UNSPEC_FTINTRP): Likewise. (LRINT): New define_int_iterator. (lrint_pattern): New define_int_attr. (lrint_submenmonic): Likewise. (lrint_allow_inexact): Likewise. (ANYFI): New define_mode_iterator. (lrint): New instruction template. gcc/testsuite/ChangeLog: * gcc.target/loongarch/ftint.c: New test. * gcc.target/loongarch/ftint-no-inexact.c: New test. --- gcc/config/loongarch/loongarch.md | 34 ++++++++++++++ .../gcc.target/loongarch/ftint-no-inexact.c | 44 +++++++++++++++++++ gcc/testsuite/gcc.target/loongarch/ftint.c | 44 +++++++++++++++++++ 3 files changed, 122 insertions(+) create mode 100644 gcc/testsuite/gcc.target/loongarch/ftint-no-inexact.c create mode 100644 gcc/testsuite/gcc.target/loongarch/ftint.c diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index a14ab14ac24..eb127c346a3 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -38,6 +38,9 @@ (define_c_enum "unspec" [ UNSPEC_FMAX UNSPEC_FMIN UNSPEC_FCOPYSIGN + UNSPEC_FTINT + UNSPEC_FTINTRM + UNSPEC_FTINTRP ;; Override return address for exception handling. UNSPEC_EH_RETURN @@ -374,6 +377,11 @@ (define_mode_iterator QHWD [QI HI SI (DI "TARGET_64BIT")]) (define_mode_iterator ANYF [(SF "TARGET_HARD_FLOAT") (DF "TARGET_DOUBLE_FLOAT")]) +;; Iterator for fixed-point modes which can be hold by a hardware +;; floating-point register. +(define_mode_iterator ANYFI [(SI "TARGET_HARD_FLOAT") + (DI "TARGET_DOUBLE_FLOAT")]) + ;; A mode for which moves involving FPRs may need to be split. (define_mode_iterator SPLITF [(DF "!TARGET_64BIT && TARGET_DOUBLE_FLOAT") @@ -515,6 +523,19 @@ (define_code_attr fcond [(unordered "cun") (define_code_attr sel [(eq "masknez") (ne "maskeqz")]) (define_code_attr selinv [(eq "maskeqz") (ne "masknez")]) +;; Iterator and attributes for floating-point to fixed-point conversion +;; instructions. +(define_int_iterator LRINT [UNSPEC_FTINT UNSPEC_FTINTRM UNSPEC_FTINTRP]) +(define_int_attr lrint_pattern [(UNSPEC_FTINT "lrint") + (UNSPEC_FTINTRM "lfloor") + (UNSPEC_FTINTRP "lceil")]) +(define_int_attr lrint_submenmonic [(UNSPEC_FTINT "") + (UNSPEC_FTINTRM "rm") + (UNSPEC_FTINTRP "rp")]) +(define_int_attr lrint_allow_inexact [(UNSPEC_FTINT "1") + (UNSPEC_FTINTRM "0") + (UNSPEC_FTINTRP "0")]) + ;; ;; .................... ;; @@ -2022,6 +2043,19 @@ (define_insn "rint2" [(set_attr "type" "fcvt") (set_attr "mode" "")]) +;; Convert floating-point numbers to integers +(define_insn "2" + [(set (match_operand:ANYFI 0 "register_operand" "=f") + (unspec:ANYFI [(match_operand:ANYF 1 "register_operand" "f")] + LRINT))] + "TARGET_HARD_FLOAT && + ( + || flag_fp_int_builtin_inexact + || !flag_trapping_math)" + "ftint.. %0,%1" + [(set_attr "type" "fcvt") + (set_attr "mode" "")]) + ;; Load the low word of operand 0 with operand 1. (define_insn "load_low" [(set (match_operand:SPLITF 0 "register_operand" "=f,f") diff --git a/gcc/testsuite/gcc.target/loongarch/ftint-no-inexact.c b/gcc/testsuite/gcc.target/loongarch/ftint-no-inexact.c new file mode 100644 index 00000000000..88b83a9c056 --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/ftint-no-inexact.c @@ -0,0 +1,44 @@ +/* { dg-do compile } */ +/* { dg-options "-mabi=lp64d -mdouble-float -fno-math-errno -fno-fp-int-builtin-inexact" } */ +/* { dg-final { scan-assembler "ftint\\.l\\.s" } } */ +/* { dg-final { scan-assembler "ftint\\.l\\.d" } } */ +/* { dg-final { scan-assembler-not "ftintrm\\.l\\.s" } } */ +/* { dg-final { scan-assembler-not "ftintrm\\.l\\.d" } } */ +/* { dg-final { scan-assembler-not "ftintrp\\.l\\.s" } } */ +/* { dg-final { scan-assembler-not "ftintrp\\.l\\.d" } } */ + +long +my_lrint (double a) +{ + return __builtin_lrint (a); +} + +long +my_lrintf (float a) +{ + return __builtin_lrintf (a); +} + +long +my_lfloor (double a) +{ + return __builtin_lfloor (a); +} + +long +my_lfloorf (float a) +{ + return __builtin_lfloorf (a); +} + +long +my_lceil (double a) +{ + return __builtin_lceil (a); +} + +long +my_lceilf (float a) +{ + return __builtin_lceilf (a); +} diff --git a/gcc/testsuite/gcc.target/loongarch/ftint.c b/gcc/testsuite/gcc.target/loongarch/ftint.c new file mode 100644 index 00000000000..7a326a454d8 --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/ftint.c @@ -0,0 +1,44 @@ +/* { dg-do compile } */ +/* { dg-options "-mabi=lp64d -mdouble-float -fno-math-errno -ffp-int-builtin-inexact" } */ +/* { dg-final { scan-assembler "ftint\\.l\\.s" } } */ +/* { dg-final { scan-assembler "ftint\\.l\\.d" } } */ +/* { dg-final { scan-assembler "ftintrm\\.l\\.s" } } */ +/* { dg-final { scan-assembler "ftintrm\\.l\\.d" } } */ +/* { dg-final { scan-assembler "ftintrp\\.l\\.s" } } */ +/* { dg-final { scan-assembler "ftintrp\\.l\\.d" } } */ + +long +my_lrint (double a) +{ + return __builtin_lrint (a); +} + +long +my_lrintf (float a) +{ + return __builtin_lrintf (a); +} + +long +my_lfloor (double a) +{ + return __builtin_lfloor (a); +} + +long +my_lfloorf (float a) +{ + return __builtin_lfloorf (a); +} + +long +my_lceil (double a) +{ + return __builtin_lceil (a); +} + +long +my_lceilf (float a) +{ + return __builtin_lceilf (a); +} -- 2.38.1