From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by sourceware.org (Postfix) with ESMTPS id 10D2C3858D20 for ; Fri, 11 Nov 2022 09:08:40 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 10D2C3858D20 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668157721; x=1699693721; h=from:to:cc:subject:date:message-id; bh=AkRORqT+PUCsKKEA0P65oMPzawPaf3IDaVAwYc9Qcjc=; b=ec7c0FpRkpCd5HhCINgMcBnnyIrU4EvsG3L0dX+CSiM6m1tlwRqKSpoN Vb6Ux9DFGbQcadzp29o9OBXrSIkXgTVvrOQ+iV9ObnostxH6PD8TxfoBQ vnNCKeA/HiVigBg4HHfK2RsmYCdshwfwJRQBsu4t0bH5IIi+WvG8N1c8p vpS81ZHSwam7f2qwOVRk0ReI3f6a/uY+gcQwXkcsmEc2R4jJjvsja1D5v IcujbJCiJMeObMa60bF5rNojRqTg5/eWdOmcrpEEOEH8wIhj1aGFKBbxz gYVy9j6TBjZ5GoKMu6m4qBKGQ0rDghJ4hmE9+cY91r8TNMnAMk6w8e5ur w==; X-IronPort-AV: E=McAfee;i="6500,9779,10527"; a="310274973" X-IronPort-AV: E=Sophos;i="5.96,156,1665471600"; d="scan'208";a="310274973" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2022 01:08:39 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10527"; a="780118856" X-IronPort-AV: E=Sophos;i="5.96,156,1665471600"; d="scan'208";a="780118856" Received: from scymds02.sc.intel.com ([10.82.73.244]) by fmsmga001.fm.intel.com with ESMTP; 11 Nov 2022 01:08:39 -0800 Received: from shgcc10.sh.intel.com (shgcc10.sh.intel.com [10.239.154.125]) by scymds02.sc.intel.com with ESMTP id 2AB98cCg003784; Fri, 11 Nov 2022 01:08:39 -0800 From: "Cui,Lili" To: gcc-patches@gcc.gnu.org Cc: hongtao.liu@intel.com, Lili Cui Subject: [PATCH] x86: Enable 256 move by pieces for ALDERLAKE and AVX2. Date: Fri, 11 Nov 2022 17:08:38 +0800 Message-Id: <20221111090838.7194-1-lili.cui@intel.com> X-Mailer: git-send-email 2.17.1 X-Spam-Status: No, score=-11.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: Lili Cui Hi Hontao, This patch is to enable 256 move by pieces for ALDERLAKE and AVX2. Bootstrap is ok, and no regressions for i386/x86-64 testsuite. OK for master? gcc/Changelog: * config/i386/x86-tune.def (X86_TUNE_AVX256_MOVE_BY_PIECES): Add alderlake and avx2. (X86_TUNE_AVX256_STORE_BY_PIECES): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/pieces-memset-50.c: New test. --- gcc/config/i386/x86-tune.def | 4 ++-- gcc/testsuite/gcc.target/i386/pieces-memset-50.c | 12 ++++++++++++ 2 files changed, 14 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-50.c diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def index 58e29e7806a..cd66f335113 100644 --- a/gcc/config/i386/x86-tune.def +++ b/gcc/config/i386/x86-tune.def @@ -536,12 +536,12 @@ DEF_TUNE (X86_TUNE_AVX256_OPTIMAL, "avx256_optimal", m_CORE_AVX512) /* X86_TUNE_AVX256_MOVE_BY_PIECES: Optimize move_by_pieces with 256-bit AVX instructions. */ DEF_TUNE (X86_TUNE_AVX256_MOVE_BY_PIECES, "avx256_move_by_pieces", - m_CORE_AVX512) + m_ALDERLAKE | m_CORE_AVX2) /* X86_TUNE_AVX256_STORE_BY_PIECES: Optimize store_by_pieces with 256-bit AVX instructions. */ DEF_TUNE (X86_TUNE_AVX256_STORE_BY_PIECES, "avx256_store_by_pieces", - m_CORE_AVX512) + m_ALDERLAKE | m_CORE_AVX2) /* X86_TUNE_AVX512_MOVE_BY_PIECES: Optimize move_by_pieces with 512-bit AVX instructions. */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-50.c b/gcc/testsuite/gcc.target/i386/pieces-memset-50.c new file mode 100644 index 00000000000..c09e7c3649c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-50.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=alderlake" } */ + +extern char *dst; + +void +foo (int x) +{ + __builtin_memset (dst, x, 64); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 2 } } */ -- 2.17.1 Thanks, Lili.