From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR01-HE1-obe.outbound.protection.outlook.com (mail-eopbgr130049.outbound.protection.outlook.com [40.107.13.49]) by sourceware.org (Postfix) with ESMTPS id 13B6E3AA9409 for ; Thu, 17 Nov 2022 16:38:58 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 13B6E3AA9409 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=0OU4/Vcofys98ctEBEDwYi/IBwYzPsAnzCVTH2lcuu8=; b=2f5TewSZh7GTeASYCuBWqurqgI0s1wmegH2JjKtr1rMJsQES8EptLuxGuniqX/PKqb3lCFy5SeiPuvOEWApxCZSwCDKvYP6reI/axxQHY6LsmM9tmifg4uQ1I++vmnuiMBVpYSqL6xAiB9GElgaj9SvNhzdzTf8oN1Sol+VDBs8= Received: from FR3P281CA0189.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:a4::12) by DU2PR08MB7309.eurprd08.prod.outlook.com (2603:10a6:10:2e4::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5834.6; Thu, 17 Nov 2022 16:38:46 +0000 Received: from VI1EUR03FT048.eop-EUR03.prod.protection.outlook.com (2603:10a6:d10:a4:cafe::30) by FR3P281CA0189.outlook.office365.com (2603:10a6:d10:a4::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5834.8 via Frontend Transport; Thu, 17 Nov 2022 16:38:46 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; pr=C Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by VI1EUR03FT048.mail.protection.outlook.com (100.127.144.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5834.8 via Frontend Transport; Thu, 17 Nov 2022 16:38:45 +0000 Received: ("Tessian outbound b4aebcc5bc64:v130"); Thu, 17 Nov 2022 16:38:45 +0000 X-CheckRecipientChecked: true X-CR-MTA-CID: dcae393e94711aaf X-CR-MTA-TID: 64aa7808 Received: from 15e16c7e1e82.1 by 64aa7808-outbound-1.mta.getcheckrecipient.com id BBB4B074-5536-476D-BFC4-DF5282985901.1; Thu, 17 Nov 2022 16:38:36 +0000 Received: from EUR01-HE1-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id 15e16c7e1e82.1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Thu, 17 Nov 2022 16:38:36 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=fw08fBEKaTP83DGqJ+LmReiEOFcKTUmB+/0kqF2mit4vNBT5YPANn+DLi/K/SqnpxvsztjdaK3/TTRAYEvSHkXwxrdjh1g22h7gb5kk+5bl52Wm8W535W6cqiKBJ25dwXLE6P5mrbTR3yX8/m6ytrJmj+qO8llMEaDjoFWckst0ol/TXzKQLR66xDzfkqJh7nf4yPj4B7b6d4hZ3vWUbKGvuNLloHmRroYIUO9YlC/3CsUWRtZlF+o9HkXJkUmXMo7JzrKroIgpjsq3ko91/2ion+UacOitNKpT73zGO9WGxJxJWGAhmIvETfF+zt7ra0IY018e/vHOG16nvN1i99Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=0OU4/Vcofys98ctEBEDwYi/IBwYzPsAnzCVTH2lcuu8=; b=Et6FGNE/a/crZ4/uwLXECj1C27wvXSAoZuShxJ5BOH+oAMF+mDnJ/0Y7hcx38EjGnS6R1kVtjDR40GJlyhEhib/xWkjshIC3m93liEe6vRtyh+Mfbug1EsPVgB2+qJ9IqgF+qOMPxXn3c1vl7hk0ntnk3tbTD/dSR0ipppNOq3ysdrFltBxwnj4PzRhdCSnFQNM6374p/cUTSPkQNZ0+Xz+Rh41e4ZLmKJGvlQRo3sF4to5BoKAi1LnX1CARcnOkQDjyYD5FIIJbnQGb+xb6Y0nhaAAcjnmriAskEGPfNgCL2iRgE//wvXfE0bsd3S5v4Bw0S0K/kOm4cKORj5GLdw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 40.67.248.234) smtp.rcpttodomain=gcc.gnu.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=0OU4/Vcofys98ctEBEDwYi/IBwYzPsAnzCVTH2lcuu8=; b=2f5TewSZh7GTeASYCuBWqurqgI0s1wmegH2JjKtr1rMJsQES8EptLuxGuniqX/PKqb3lCFy5SeiPuvOEWApxCZSwCDKvYP6reI/axxQHY6LsmM9tmifg4uQ1I++vmnuiMBVpYSqL6xAiB9GElgaj9SvNhzdzTf8oN1Sol+VDBs8= Received: from DBBPR09CA0041.eurprd09.prod.outlook.com (2603:10a6:10:d4::29) by AS8PR08MB7941.eurprd08.prod.outlook.com (2603:10a6:20b:539::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5834.5; Thu, 17 Nov 2022 16:38:23 +0000 Received: from DBAEUR03FT032.eop-EUR03.prod.protection.outlook.com (2603:10a6:10:d4:cafe::81) by DBBPR09CA0041.outlook.office365.com (2603:10a6:10:d4::29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5813.20 via Frontend Transport; Thu, 17 Nov 2022 16:38:21 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 40.67.248.234) smtp.mailfrom=arm.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C Received: from nebula.arm.com (40.67.248.234) by DBAEUR03FT032.mail.protection.outlook.com (100.127.142.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5834.8 via Frontend Transport; Thu, 17 Nov 2022 16:38:21 +0000 Received: from AZ-NEU-EX04.Arm.com (10.251.24.32) by AZ-NEU-EX03.Arm.com (10.251.24.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Thu, 17 Nov 2022 16:38:19 +0000 Received: from e124257.nice.arm.com (10.34.105.24) by mail.arm.com (10.251.24.32) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Thu, 17 Nov 2022 16:38:19 +0000 From: Andrea Corallo To: CC: , , Andrea Corallo Subject: [PATCH 09/35] arm: improve tests for vmax* Date: Thu, 17 Nov 2022 17:37:43 +0100 Message-ID: <20221117163809.1009526-10-andrea.corallo@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221117163809.1009526-1-andrea.corallo@arm.com> References: <20221117163809.1009526-1-andrea.corallo@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: DBAEUR03FT032:EE_|AS8PR08MB7941:EE_|VI1EUR03FT048:EE_|DU2PR08MB7309:EE_ X-MS-Office365-Filtering-Correlation-Id: 13890446-f057-47b5-0837-08dac8ba325f x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: 2zCnDD3mJHiR3GAnPS3SSrSMxj9XrDbh+1xZCl/+eqdcfy3Qzf4NvEcgBqXLdCHWXQDsQvQh5xp+BIHKLgYRjEUCQFuSzQgai2EQBZZ14yZLkU4nsqkPz4wgV5PK7niF5+VEGhrMYkftX65rt1/0FnGH80r+qCHemO0q4aWnLLQo4E/lHn4vdkPm3FA8NKjlxLd4VIMjWcbSYbmnwWfnkIwYCVM+QRtgA69bGjq6x6zFlrJG3718B22hgzzP8R8TZlr+wBnpA3P8lwdSP7V2E1Ey/oqGYDyQ1u6jdPdZ+pNqidG6Z9llQgluC3lqZJ/6juffmZYU4nX7LvAo34Ug1+nwO8yQNUB/0F1PRqKw5ncaB75iGWq8aUOvCk2PkysEkoMfv7Kf4ednNLFDg5zB2+VOHSHMKapJtqdFOP4ErgjBfJZfJuxVX0rCf0y8VZUb6Y93mWwuxPfznCBIUJeV107HEdmO1qgSbzfxZ0j7va8y/Z+vU06GhnApvnhUNMf2rX2jOB5mBAhmCSba3F+Mzez3fsXkCwBvQ2D4735Z9pO3Vr4b/i0222Zhzug55heO6ElB85wTmUyorGwRs2wFVMmvWSp/QBW0v5H2NVY5nZbgMlqytm6pESzvItvv+aTXS/CVP9L3QyqFLqDTeljxchPymcFuLwuAUjOHVlszBTDN6beRx0/iqdnVvlhdA0Noe8D+f8D5vqY3E8c401/nWpiVFBVMRtvuEt230Vbp/iiDFLpyUHjyUDZ72QksqyiVrsb6dLKuMDPyFtEPgBsVkfGhMzeWGEGtvFLD4aunNtXlOvNH63icmUGN7CXwoBAn X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:nebula.arm.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(396003)(136003)(346002)(376002)(39860400002)(451199015)(40470700004)(46966006)(36840700001)(36756003)(84970400001)(8676002)(356005)(40460700003)(83380400001)(41300700001)(2906002)(82740400003)(81166007)(36860700001)(54906003)(8936002)(86362001)(6916009)(70586007)(40480700001)(47076005)(478600001)(1076003)(2616005)(70206006)(336012)(4326008)(186003)(426003)(316002)(5660300002)(82310400005)(6666004)(7696005)(26005)(44832011)(30864003)(36900700001)(579004)(559001);DIR:OUT;SFP:1101; X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB7941 X-MS-Exchange-Transport-CrossTenantHeadersStripped: VI1EUR03FT048.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: 7b2e9c55-6a20-4457-470e-08dac8ba23b1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: WyqjYIVw/VDSlw9M9avSwpcZO8Y+dEjMzkYxvJ1lZv91elHyQxaz7lGAENoLkXp9xfSF6zh2amuCQ5IMYevSJTcrGr5/IxpagQNsYzXkPqLVuy2wVJ98YHDi5ecJ9mMkA1rQhIg1qL9xro2RdRh5vFDvn14IiXTK3731WfyjuijVJXkXaigVtjkSt0JyUUJs65hMyMLmvX6wtA62B/I7ppRuZ9GlaCS4ycbT/fVxo9PjuZREX49pU4p7SA/Rrp5/lEJNqPZcjtK1ZoR+/om3Ti4nENShGSKSiGzcd0qaTKxDs7h7vTgjgHvdZndUT/HjAI3zcMDDjw8qY7DQqJf/BIgW9O3fyQzHA8c86vXQeJ42TsaX5aLfAjc/Kq01Et1LPmCnJEJ5WdxHD+fYIQJ25Y3vzl1klJN02zRFC5YWUWEbCxZm42zKUzWBwQYrwhqBdBcdsMG9n2+6mosMl0rJdBZ4begYuFWDAhp+vEHRde1yZcpAAGHd/6/Z2GFlychOWhSuxum08JiK73RngDp1p7rHoZnQtxFzje5q3xvzmprQD2jKirxKGahArPxqR0EPCx3ifKKYRcq3U0JFNdBl5HkmVCVlTaFswTbuVPnKZKFd8o2n0nae3T3xbOw8BjtDyov5LMPM7NTlsICovjFca9aVb7fZewO5bIPeuXwQo1cTTFhqBPoDOZv/X/5wU83ekL17bO8w/0GLyK7LfbRMrOZAXbhCxPo+m6/lORzAh+Xat4AL12QkLWDRF9GJwLsWget4B4Zl10aWHV2VIEdmeA== X-Forefront-Antispam-Report: CIP:63.35.35.123;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:64aa7808-outbound-1.mta.getcheckrecipient.com;PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com;CAT:NONE;SFS:(13230022)(4636009)(136003)(376002)(396003)(346002)(39860400002)(451199015)(36840700001)(46966006)(40470700004)(84970400001)(36756003)(8936002)(82740400003)(478600001)(7696005)(40480700001)(30864003)(36860700001)(83380400001)(86362001)(82310400005)(40460700003)(2906002)(426003)(70586007)(6666004)(5660300002)(26005)(44832011)(81166007)(2616005)(1076003)(6916009)(70206006)(47076005)(8676002)(186003)(41300700001)(54906003)(4326008)(316002)(336012)(579004)(559001);DIR:OUT;SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Nov 2022 16:38:45.9501 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 13890446-f057-47b5-0837-08dac8ba325f X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: VI1EUR03FT048.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU2PR08MB7309 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c: Improve test. * gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxaq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxaq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxaq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxavq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxavq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxavq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_u8.c: Likewise. --- .../arm/mve/intrinsics/vmaxaq_m_s16.c | 25 +++++++++-- .../arm/mve/intrinsics/vmaxaq_m_s32.c | 25 +++++++++-- .../arm/mve/intrinsics/vmaxaq_m_s8.c | 25 +++++++++-- .../arm/mve/intrinsics/vmaxaq_s16.c | 16 +++++++- .../arm/mve/intrinsics/vmaxaq_s32.c | 16 +++++++- .../gcc.target/arm/mve/intrinsics/vmaxaq_s8.c | 16 +++++++- .../arm/mve/intrinsics/vmaxavq_p_s16.c | 41 ++++++++++++++++--- .../arm/mve/intrinsics/vmaxavq_p_s32.c | 41 ++++++++++++++++--- .../arm/mve/intrinsics/vmaxavq_p_s8.c | 41 ++++++++++++++++--- .../arm/mve/intrinsics/vmaxavq_s16.c | 29 ++++++++++--- .../arm/mve/intrinsics/vmaxavq_s32.c | 29 ++++++++++--- .../arm/mve/intrinsics/vmaxavq_s8.c | 29 ++++++++++--- .../arm/mve/intrinsics/vmaxnmaq_f16.c | 16 +++++++- .../arm/mve/intrinsics/vmaxnmaq_f32.c | 16 +++++++- .../arm/mve/intrinsics/vmaxnmaq_m_f16.c | 25 +++++++++-- .../arm/mve/intrinsics/vmaxnmaq_m_f32.c | 25 +++++++++-- .../arm/mve/intrinsics/vmaxnmavq_f16.c | 27 +++++++++--- .../arm/mve/intrinsics/vmaxnmavq_f32.c | 27 +++++++++--- .../arm/mve/intrinsics/vmaxnmavq_p_f16.c | 39 +++++++++++++++--- .../arm/mve/intrinsics/vmaxnmavq_p_f32.c | 39 +++++++++++++++--- .../arm/mve/intrinsics/vmaxnmq_f16.c | 16 +++++++- .../arm/mve/intrinsics/vmaxnmq_f32.c | 16 +++++++- .../arm/mve/intrinsics/vmaxnmq_m_f16.c | 26 ++++++++++-- .../arm/mve/intrinsics/vmaxnmq_m_f32.c | 26 ++++++++++-- .../arm/mve/intrinsics/vmaxnmq_x_f16.c | 25 +++++++++-- .../arm/mve/intrinsics/vmaxnmq_x_f32.c | 25 +++++++++-- .../arm/mve/intrinsics/vmaxnmvq_f16.c | 27 +++++++++--- .../arm/mve/intrinsics/vmaxnmvq_f32.c | 27 +++++++++--- .../arm/mve/intrinsics/vmaxnmvq_p_f16.c | 39 +++++++++++++++--- .../arm/mve/intrinsics/vmaxnmvq_p_f32.c | 39 +++++++++++++++--- .../arm/mve/intrinsics/vmaxq_m_s16.c | 26 ++++++++++-- .../arm/mve/intrinsics/vmaxq_m_s32.c | 26 ++++++++++-- .../arm/mve/intrinsics/vmaxq_m_s8.c | 26 ++++++++++-- .../arm/mve/intrinsics/vmaxq_m_u16.c | 26 ++++++++++-- .../arm/mve/intrinsics/vmaxq_m_u32.c | 26 ++++++++++-- .../arm/mve/intrinsics/vmaxq_m_u8.c | 26 ++++++++++-- .../gcc.target/arm/mve/intrinsics/vmaxq_s16.c | 16 +++++++- .../gcc.target/arm/mve/intrinsics/vmaxq_s32.c | 16 +++++++- .../gcc.target/arm/mve/intrinsics/vmaxq_s8.c | 16 +++++++- .../gcc.target/arm/mve/intrinsics/vmaxq_u16.c | 16 +++++++- .../gcc.target/arm/mve/intrinsics/vmaxq_u32.c | 16 +++++++- .../gcc.target/arm/mve/intrinsics/vmaxq_u8.c | 16 +++++++- .../arm/mve/intrinsics/vmaxq_x_s16.c | 25 +++++++++-- .../arm/mve/intrinsics/vmaxq_x_s32.c | 25 +++++++++-- .../arm/mve/intrinsics/vmaxq_x_s8.c | 25 +++++++++-- .../arm/mve/intrinsics/vmaxq_x_u16.c | 25 +++++++++-- .../arm/mve/intrinsics/vmaxq_x_u32.c | 25 +++++++++-- .../arm/mve/intrinsics/vmaxq_x_u8.c | 25 +++++++++-- .../arm/mve/intrinsics/vmaxvq_p_s16.c | 31 ++++++++++---- .../arm/mve/intrinsics/vmaxvq_p_s32.c | 31 ++++++++++---- .../arm/mve/intrinsics/vmaxvq_p_s8.c | 31 ++++++++++---- .../arm/mve/intrinsics/vmaxvq_p_u16.c | 39 +++++++++++++++--- .../arm/mve/intrinsics/vmaxvq_p_u32.c | 39 +++++++++++++++--- .../arm/mve/intrinsics/vmaxvq_p_u8.c | 39 +++++++++++++++--- .../arm/mve/intrinsics/vmaxvq_s16.c | 23 +++++++---- .../arm/mve/intrinsics/vmaxvq_s32.c | 23 +++++++---- .../gcc.target/arm/mve/intrinsics/vmaxvq_s8.c | 23 +++++++---- .../arm/mve/intrinsics/vmaxvq_u16.c | 27 +++++++++--- .../arm/mve/intrinsics/vmaxvq_u32.c | 27 +++++++++--- .../gcc.target/arm/mve/intrinsics/vmaxvq_u8.c | 27 +++++++++--- 60 files changed, 1318 insertions(+), 257 deletions(-) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c index 48d213277df..4c487ed7f60 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxat.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int16x8_t b, mve_pred16_t p) { return vmaxaq_m_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxat.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxat.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p) { return vmaxaq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c index 49273819861..5156467f0c1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxat.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, int32x4_t b, mve_pred16_t p) { return vmaxaq_m_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxat.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxat.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p) { return vmaxaq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c index 5ecdb2c19dc..6564bd88c9b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxat.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int8x16_t b, mve_pred16_t p) { return vmaxaq_m_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxat.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxat.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p) { return vmaxaq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c index f9a9f896aa2..6cabf9f723b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxa.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int16x8_t b) { return vmaxaq_s16 (a, b); } -/* { dg-final { scan-assembler "vmaxa.s16" } } */ +/* +**foo1: +** ... +** vmaxa.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int16x8_t b) { return vmaxaq (a, b); } -/* { dg-final { scan-assembler "vmaxa.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c index efe2fc16ff7..d0dd3c23600 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxa.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, int32x4_t b) { return vmaxaq_s32 (a, b); } -/* { dg-final { scan-assembler "vmaxa.s32" } } */ +/* +**foo1: +** ... +** vmaxa.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, int32x4_t b) { return vmaxaq (a, b); } -/* { dg-final { scan-assembler "vmaxa.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c index 5c2e35f71a6..a7344638dcf 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxa.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int8x16_t b) { return vmaxaq_s8 (a, b); } -/* { dg-final { scan-assembler "vmaxa.s8" } } */ +/* +**foo1: +** ... +** vmaxa.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int8x16_t b) { return vmaxaq (a, b); } -/* { dg-final { scan-assembler "vmaxa.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c index 74ffad4e726..ac81c8fd1bd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c @@ -1,9 +1,20 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint16_t foo (uint16_t a, int16x8_t b, mve_pred16_t p) { @@ -11,18 +22,36 @@ foo (uint16_t a, int16x8_t b, mve_pred16_t p) } +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint16_t foo1 (uint16_t a, int16x8_t b, mve_pred16_t p) { return vmaxavq_p (a, b, p); } - -int16_t -foo2 (uint8_t a, int16x8_t b, mve_pred16_t p) +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ +uint16_t +foo2 (int16x8_t b, mve_pred16_t p) { - return vmaxavq_p (a, b, p); + return vmaxavq_p (1, b, p); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxavt.s16" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c index 40800b0f12e..119c0c34c76 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c @@ -1,9 +1,20 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo (uint32_t a, int32x4_t b, mve_pred16_t p) { @@ -11,18 +22,36 @@ foo (uint32_t a, int32x4_t b, mve_pred16_t p) } +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo1 (uint32_t a, int32x4_t b, mve_pred16_t p) { return vmaxavq_p (a, b, p); } - -int32_t -foo2 (uint16_t a, int32x4_t b, mve_pred16_t p) +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ +uint32_t +foo2 (int32x4_t b, mve_pred16_t p) { - return vmaxavq_p (a, b, p); + return vmaxavq_p (1, b, p); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxavt.s32" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c index 7638737fb84..dfd7f828ef6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c @@ -1,9 +1,20 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint8_t foo (uint8_t a, int8x16_t b, mve_pred16_t p) { @@ -11,18 +22,36 @@ foo (uint8_t a, int8x16_t b, mve_pred16_t p) } +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint8_t foo1 (uint8_t a, int8x16_t b, mve_pred16_t p) { return vmaxavq_p (a, b, p); } - -int8_t -foo2 (uint32_t a, int8x16_t b, mve_pred16_t p) +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ +uint8_t +foo2 (int8x16_t b, mve_pred16_t p) { - return vmaxavq_p (a, b, p); + return vmaxavq_p (1, b, p); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxavt.s8" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c index 0dca149b3e8..9f59e8e4542 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c @@ -1,9 +1,16 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxav.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint16_t foo (uint16_t a, int16x8_t b) { @@ -11,18 +18,28 @@ foo (uint16_t a, int16x8_t b) } +/* +**foo1: +** ... +** vmaxav.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint16_t foo1 (uint16_t a, int16x8_t b) { return vmaxavq (a, b); } - -int16_t -foo2 (uint8_t a, int16x8_t b) +/* +**foo2: +** ... +** vmaxav.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ +uint16_t +foo2 (int16x8_t b) { - return vmaxavq (a, b); + return vmaxavq (1, b); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxav.s16" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c index f419a771017..716b8a2a979 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c @@ -1,9 +1,16 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxav.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo (uint32_t a, int32x4_t b) { @@ -11,18 +18,28 @@ foo (uint32_t a, int32x4_t b) } +/* +**foo1: +** ... +** vmaxav.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo1 (uint32_t a, int32x4_t b) { return vmaxavq (a, b); } - -int32_t -foo2 (uint16_t a, int32x4_t b) +/* +**foo2: +** ... +** vmaxav.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ +uint32_t +foo2 (int32x4_t b) { - return vmaxavq (a, b); + return vmaxavq (1, b); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxav.s32" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c index 214ad88f4aa..0f1a87af54b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c @@ -1,9 +1,16 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxav.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint8_t foo (uint8_t a, int8x16_t b) { @@ -11,18 +18,28 @@ foo (uint8_t a, int8x16_t b) } +/* +**foo1: +** ... +** vmaxav.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint8_t foo1 (uint8_t a, int8x16_t b) { return vmaxavq (a, b); } - -int8_t -foo2 (uint32_t a, int8x16_t b) +/* +**foo2: +** ... +** vmaxav.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ +uint8_t +foo2 (int8x16_t b) { - return vmaxavq (a, b); + return vmaxavq (1, b); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxav.s8" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c index f19707125db..cd4c813bf3b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxnma.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b) { return vmaxnmaq_f16 (a, b); } -/* { dg-final { scan-assembler "vmaxnma.f16" } } */ +/* +**foo1: +** ... +** vmaxnma.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b) { return vmaxnmaq (a, b); } -/* { dg-final { scan-assembler "vmaxnma.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c index 94fc3a2aa28..527466fc131 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxnma.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b) { return vmaxnmaq_f32 (a, b); } -/* { dg-final { scan-assembler "vmaxnma.f32" } } */ +/* +**foo1: +** ... +** vmaxnma.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b) { return vmaxnmaq (a, b); } -/* { dg-final { scan-assembler "vmaxnma.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c index b2e82f5464c..39c68cdc172 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmat.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vmaxnmaq_m_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxnmat.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmat.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vmaxnmaq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c index 8fa7344b054..f6f8bf07549 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmat.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vmaxnmaq_m_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxnmat.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmat.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vmaxnmaq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c index 6d8cf19a341..4c1f20be036 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c @@ -1,9 +1,16 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxnmav.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float16_t foo (float16_t a, float16x8_t b) { @@ -11,18 +18,28 @@ foo (float16_t a, float16x8_t b) } +/* +**foo1: +** ... +** vmaxnmav.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float16_t foo1 (float16_t a, float16x8_t b) { return vmaxnmavq (a, b); } - +/* +**foo2: +** ... +** vmaxnmav.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float16_t -foo2 (float32_t a, float16x8_t b) +foo2 (float16x8_t b) { - return vmaxnmavq (a, b); + return vmaxnmavq (1.1, b); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxnmav.f16" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c index ef79030d8eb..86087335cea 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c @@ -1,9 +1,16 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxnmav.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float32_t foo (float32_t a, float32x4_t b) { @@ -11,18 +18,28 @@ foo (float32_t a, float32x4_t b) } +/* +**foo1: +** ... +** vmaxnmav.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float32_t foo1 (float32_t a, float32x4_t b) { return vmaxnmavq (a, b); } - +/* +**foo2: +** ... +** vmaxnmav.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float32_t -foo2 (float16_t a, float32x4_t b) +foo2 (float32x4_t b) { - return vmaxnmavq (a, b); + return vmaxnmavq (1.1, b); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxnmav.f32" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c index f7f39f59dad..a4973567d5e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c @@ -1,9 +1,20 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmavt.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float16_t foo (float16_t a, float16x8_t b, mve_pred16_t p) { @@ -11,18 +22,36 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p) } +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmavt.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float16_t foo1 (float16_t a, float16x8_t b, mve_pred16_t p) { return vmaxnmavq_p (a, b, p); } - +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmavt.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float16_t -foo2 (float32_t a, float16x8_t b, mve_pred16_t p) +foo2 (float16x8_t b, mve_pred16_t p) { - return vmaxnmavq_p (a, b, p); + return vmaxnmavq_p (1.1, b, p); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxnmavt.f16" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c index 341f6254a5a..b229cb3a322 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c @@ -1,9 +1,20 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmavt.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float32_t foo (float32_t a, float32x4_t b, mve_pred16_t p) { @@ -11,18 +22,36 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p) } +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmavt.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float32_t foo1 (float32_t a, float32x4_t b, mve_pred16_t p) { return vmaxnmavq_p (a, b, p); } - +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmavt.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float32_t -foo2 (float16_t a, float32x4_t b, mve_pred16_t p) +foo2 (float32x4_t b, mve_pred16_t p) { - return vmaxnmavq_p (a, b, p); + return vmaxnmavq_p (1.1, b, p); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxnmavt.f32" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c index 59a8070e07b..faf968ebb21 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxnm.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b) { return vmaxnmq_f16 (a, b); } -/* { dg-final { scan-assembler "vmaxnm.f16" } } */ +/* +**foo1: +** ... +** vmaxnm.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b) { return vmaxnmq (a, b); } -/* { dg-final { scan-assembler "vmaxnm.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c index 5db42bd4b8c..f7ee01b1f14 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxnm.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b) { return vmaxnmq_f32 (a, b); } -/* { dg-final { scan-assembler "vmaxnm.f32" } } */ +/* +**foo1: +** ... +** vmaxnm.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b) { return vmaxnmq (a, b); } -/* { dg-final { scan-assembler "vmaxnm.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c index 4668fd03c9d..ee3444393ed 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) { return vmaxnmq_m_f16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxnmt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) { return vmaxnmq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxnmt.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c index 9e8ccbc84b7..5d434432856 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) { return vmaxnmq_m_f32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxnmt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) { return vmaxnmq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxnmt.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c index ecca6069d22..dad76734fd8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vmaxnmq_x_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxnmt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vmaxnmq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c index c3965dda4f1..2fe8c0d4f3d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vmaxnmq_x_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxnmt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vmaxnmq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c index 80bd1d4cda1..9787cc1ba90 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c @@ -1,9 +1,16 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxnmv.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float16_t foo (float16_t a, float16x8_t b) { @@ -11,18 +18,28 @@ foo (float16_t a, float16x8_t b) } +/* +**foo1: +** ... +** vmaxnmv.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float16_t foo1 (float16_t a, float16x8_t b) { return vmaxnmvq (a, b); } - +/* +**foo2: +** ... +** vmaxnmv.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float16_t -foo2 (float32_t a, float16x8_t b) +foo2 (float16x8_t b) { - return vmaxnmvq (a, b); + return vmaxnmvq (1.1, b); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxnmv.f16" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c index bb2fc46f88a..b1191876850 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c @@ -1,9 +1,16 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxnmv.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float32_t foo (float32_t a, float32x4_t b) { @@ -11,18 +18,28 @@ foo (float32_t a, float32x4_t b) } +/* +**foo1: +** ... +** vmaxnmv.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float32_t foo1 (float32_t a, float32x4_t b) { return vmaxnmvq (a, b); } - +/* +**foo2: +** ... +** vmaxnmv.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float32_t -foo2 (float16_t a, float32x4_t b) +foo2 (float32x4_t b) { - return vmaxnmvq (a, b); + return vmaxnmvq (1.1, b); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxnmv.f32" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c index 3efe203007b..0b1740d5ed2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c @@ -1,9 +1,20 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmvt.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float16_t foo (float16_t a, float16x8_t b, mve_pred16_t p) { @@ -11,18 +22,36 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p) } +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmvt.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float16_t foo1 (float16_t a, float16x8_t b, mve_pred16_t p) { return vmaxnmvq_p (a, b, p); } - +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmvt.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float16_t -foo2 (float32_t a, float16x8_t b, mve_pred16_t p) +foo2 (float16x8_t b, mve_pred16_t p) { - return vmaxnmvq_p (a, b, p); + return vmaxnmvq_p (1.1, b, p); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxnmvt.f16" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c index 6c13247f1f1..ca6ad91d24d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c @@ -1,9 +1,20 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmvt.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float32_t foo (float32_t a, float32x4_t b, mve_pred16_t p) { @@ -11,18 +22,36 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p) } +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmvt.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float32_t foo1 (float32_t a, float32x4_t b, mve_pred16_t p) { return vmaxnmvq_p (a, b, p); } - +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxnmvt.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ float32_t -foo2 (float16_t a, float32x4_t b, mve_pred16_t p) +foo2 (float32x4_t b, mve_pred16_t p) { - return vmaxnmvq_p (a, b, p); + return vmaxnmvq_p (1.1, b, p); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxnmvt.f32" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c index 2791ed4c562..548824fc58a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmaxq_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmaxq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxt.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c index 27f7d5d7b16..e935729b47d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmaxq_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmaxq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c index 23b7569f720..8028fa031c7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vmaxq_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vmaxq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxt.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c index 61e51e3b830..e872f9e72f8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmaxq_m_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmaxq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxt.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c index 23df7eeaed6..76606555881 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vmaxq_m_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vmaxq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxt.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c index 138d5c87894..7ade467cafd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmaxq_m_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmaxq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxt.u8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c index a42fc82a852..bf547a2420d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmax.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { return vmaxq_s16 (a, b); } -/* { dg-final { scan-assembler "vmax.s16" } } */ +/* +**foo1: +** ... +** vmax.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { return vmaxq (a, b); } -/* { dg-final { scan-assembler "vmax.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c index 14c094a5d11..25bb950c0bf 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmax.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { return vmaxq_s32 (a, b); } -/* { dg-final { scan-assembler "vmax.s32" } } */ +/* +**foo1: +** ... +** vmax.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { return vmaxq (a, b); } -/* { dg-final { scan-assembler "vmax.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c index 0540a27bae9..33057f1a58e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmax.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { return vmaxq_s8 (a, b); } -/* { dg-final { scan-assembler "vmax.s8" } } */ +/* +**foo1: +** ... +** vmax.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { return vmaxq (a, b); } -/* { dg-final { scan-assembler "vmax.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c index 6b9b5a73bcd..7717a9a5057 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmax.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b) { return vmaxq_u16 (a, b); } -/* { dg-final { scan-assembler "vmax.u16" } } */ +/* +**foo1: +** ... +** vmax.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b) { return vmaxq (a, b); } -/* { dg-final { scan-assembler "vmax.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c index 3112302bf1a..36b5c276cfe 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmax.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b) { return vmaxq_u32 (a, b); } -/* { dg-final { scan-assembler "vmax.u32" } } */ +/* +**foo1: +** ... +** vmax.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b) { return vmaxq (a, b); } -/* { dg-final { scan-assembler "vmax.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c index b1baa5083bd..e643e5f3e3c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmax.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b) { return vmaxq_u8 (a, b); } -/* { dg-final { scan-assembler "vmax.u8" } } */ +/* +**foo1: +** ... +** vmax.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b) { return vmaxq (a, b); } -/* { dg-final { scan-assembler "vmax.u8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c index 9d92f2ccd85..a32feb0d7cd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmaxq_x_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmaxq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c index 200fd4b1bb1..3ac1994c4f8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmaxq_x_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmaxq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c index 2fe752558b9..c9ba33d1504 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vmaxq_x_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vmaxq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c index 967622e331c..954a9e2f02a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmaxq_x_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmaxq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c index 56b5d8fa8b8..022d418af84 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vmaxq_x_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vmaxq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c index 1816f959dd7..7e1687a8b72 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmaxq_x_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmaxt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmaxq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c index 657efc51bea..a97703eb58c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c @@ -1,9 +1,20 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxvt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int16_t foo (int16_t a, int16x8_t b, mve_pred16_t p) { @@ -11,18 +22,20 @@ foo (int16_t a, int16x8_t b, mve_pred16_t p) } +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxvt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int16_t foo1 (int16_t a, int16x8_t b, mve_pred16_t p) { return vmaxvq_p (a, b, p); } - -int16_t -foo2 (int8_t a, int16x8_t b, mve_pred16_t p) -{ - return vmaxvq_p (a, b, p); -} - -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxvt.s16" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c index 5882351c0fa..b4bddcb8312 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c @@ -1,9 +1,20 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxvt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int32x4_t b, mve_pred16_t p) { @@ -11,18 +22,20 @@ foo (int32_t a, int32x4_t b, mve_pred16_t p) } +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxvt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int32x4_t b, mve_pred16_t p) { return vmaxvq_p (a, b, p); } - -int32_t -foo2 (int16_t a, int32x4_t b, mve_pred16_t p) -{ - return vmaxvq_p (a, b, p); -} - -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxvt.s32" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c index 3737ecd3307..ee8c3e9155f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c @@ -1,9 +1,20 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxvt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int8_t foo (int8_t a, int8x16_t b, mve_pred16_t p) { @@ -11,18 +22,20 @@ foo (int8_t a, int8x16_t b, mve_pred16_t p) } +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxvt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int8_t foo1 (int8_t a, int8x16_t b, mve_pred16_t p) { return vmaxvq_p (a, b, p); } - -int8_t -foo2 (int32_t a, int8x16_t b, mve_pred16_t p) -{ - return vmaxvq_p (a, b, p); -} - -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxvt.s8" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c index 348cf39caa0..906adf85936 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c @@ -1,9 +1,20 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxvt.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint16_t foo (uint16_t a, uint16x8_t b, mve_pred16_t p) { @@ -11,18 +22,36 @@ foo (uint16_t a, uint16x8_t b, mve_pred16_t p) } +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxvt.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint16_t foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p) { return vmaxvq_p (a, b, p); } - +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxvt.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint16_t -foo2 (uint32_t a, uint16x8_t b, mve_pred16_t p) +foo2 (uint16x8_t b, mve_pred16_t p) { - return vmaxvq_p (a, b, p); + return vmaxvq_p (1, b, p); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxvt.u16" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c index f2e976216c5..acc5367c5a2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c @@ -1,9 +1,20 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxvt.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo (uint32_t a, uint32x4_t b, mve_pred16_t p) { @@ -11,18 +22,36 @@ foo (uint32_t a, uint32x4_t b, mve_pred16_t p) } +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxvt.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p) { return vmaxvq_p (a, b, p); } - +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxvt.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t -foo2 (uint8_t a, uint32x4_t b, mve_pred16_t p) +foo2 (uint32x4_t b, mve_pred16_t p) { - return vmaxvq_p (a, b, p); + return vmaxvq_p (1, b, p); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxvt.u32" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c index 7df5b63c9bc..358cb40f829 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c @@ -1,9 +1,20 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxvt.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint8_t foo (uint8_t a, uint8x16_t b, mve_pred16_t p) { @@ -11,18 +22,36 @@ foo (uint8_t a, uint8x16_t b, mve_pred16_t p) } +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxvt.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint8_t foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p) { return vmaxvq_p (a, b, p); } - +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmaxvt.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint8_t -foo2 (uint16_t a, uint8x16_t b, mve_pred16_t p) +foo2 (uint8x16_t b, mve_pred16_t p) { - return vmaxvq_p (a, b, p); + return vmaxvq_p (1, b, p); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxvt.u8" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c index 8412452cf33..485355a7d72 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c @@ -1,9 +1,16 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxv.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int16_t foo (int16_t a, int16x8_t b) { @@ -11,18 +18,16 @@ foo (int16_t a, int16x8_t b) } +/* +**foo1: +** ... +** vmaxv.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int16_t foo1 (int16_t a, int16x8_t b) { return vmaxvq (a, b); } - -int16_t -foo2 (int8_t a, int16x8_t b) -{ - return vmaxvq (a, b); -} - -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxv.s16" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c index 09f4909c9a8..3b9075689a0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c @@ -1,9 +1,16 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxv.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int32x4_t b) { @@ -11,18 +18,16 @@ foo (int32_t a, int32x4_t b) } +/* +**foo1: +** ... +** vmaxv.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int32x4_t b) { return vmaxvq (a, b); } - -int32_t -foo2 (int16_t a, int32x4_t b) -{ - return vmaxvq (a, b); -} - -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxv.s32" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c index a087bbc6b64..f13a0168d9d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c @@ -1,9 +1,16 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxv.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int8_t foo (int8_t a, int8x16_t b) { @@ -11,18 +18,16 @@ foo (int8_t a, int8x16_t b) } +/* +**foo1: +** ... +** vmaxv.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ int8_t foo1 (int8_t a, int8x16_t b) { return vmaxvq (a, b); } - -int8_t -foo2 (int32_t a, int8x16_t b) -{ - return vmaxvq (a, b); -} - -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxv.s8" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c index 47fe0d1cf0f..6a0fe254043 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c @@ -1,9 +1,16 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxv.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint16_t foo (uint16_t a, uint16x8_t b) { @@ -11,18 +18,28 @@ foo (uint16_t a, uint16x8_t b) } +/* +**foo1: +** ... +** vmaxv.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint16_t foo1 (uint16_t a, uint16x8_t b) { return vmaxvq (a, b); } - +/* +**foo2: +** ... +** vmaxv.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint16_t -foo2 (uint32_t a, uint16x8_t b) +foo2 (uint16x8_t b) { - return vmaxvq (a, b); + return vmaxvq (1, b); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxv.u16" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c index aa723daf5dd..eed20046e53 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c @@ -1,9 +1,16 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxv.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo (uint32_t a, uint32x4_t b) { @@ -11,18 +18,28 @@ foo (uint32_t a, uint32x4_t b) } +/* +**foo1: +** ... +** vmaxv.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t foo1 (uint32_t a, uint32x4_t b) { return vmaxvq (a, b); } - +/* +**foo2: +** ... +** vmaxv.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint32_t -foo2 (uint8_t a, uint32x4_t b) +foo2 (uint32x4_t b) { - return vmaxvq (a, b); + return vmaxvq (1, b); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxv.u32" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c index 3aae785040c..d44a6d3bb02 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c @@ -1,9 +1,16 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmaxv.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint8_t foo (uint8_t a, uint8x16_t b) { @@ -11,18 +18,28 @@ foo (uint8_t a, uint8x16_t b) } +/* +**foo1: +** ... +** vmaxv.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint8_t foo1 (uint8_t a, uint8x16_t b) { return vmaxvq (a, b); } - +/* +**foo2: +** ... +** vmaxv.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +** ... +*/ uint8_t -foo2 (uint16_t a, uint8x16_t b) +foo2 (uint8x16_t b) { - return vmaxvq (a, b); + return vmaxvq (1, b); } -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -/* { dg-final { scan-assembler-times "vmaxv.u8" 3 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file -- 2.25.1