From: liuhongt <hongtao.liu@intel.com>
To: gcc-patches@gcc.gnu.org
Cc: crazylht@gmail.com, hjl.tools@gmail.com, ubizjak@gmail.com
Subject: [PATCH] [x86] Improve ix86_expand_fast_convert_bf_to_sf with new extendbfsf2_1.
Date: Fri, 2 Dec 2022 12:26:05 +0800 [thread overview]
Message-ID: <20221202042606.551350-1-hongtao.liu@intel.com> (raw)
After supporting extendbfsf2_1, ix86_expand_fast_convert_bf_to_sf can
be improved with pslld either.
CONST_INT_P is not handled since constant shift can be optimized off.
Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
Ok for trunk?
gcc/ChangeLog:
* config/i386/i386-expand.cc
(ix86_expand_fast_convert_bf_to_sf): Optimized with
extendbfsf2_1 for non-CONST_INT_P operand.
gcc/testsuite/ChangeLog:
* gcc.target/i386/cbranchbf4.c: New test.
---
gcc/config/i386/i386-expand.cc | 13 ++++++-------
gcc/testsuite/gcc.target/i386/cbranchbf4.c | 15 +++++++++++++++
2 files changed, 21 insertions(+), 7 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/cbranchbf4.c
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index d26e7e41445..0bc80c4b178 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -24155,14 +24155,13 @@ ix86_expand_fast_convert_bf_to_sf (rtx val)
/* FLOAT_EXTEND simplification will fail if VAL is a sNaN. */
ret = gen_reg_rtx (SImode);
emit_move_insn (ret, GEN_INT (INTVAL (op) & 0xffff));
+ emit_insn (gen_ashlsi3 (ret, ret, GEN_INT (16)));
+ return gen_lowpart (SFmode, ret);
}
- else
- {
- ret = gen_reg_rtx (SImode);
- emit_insn (gen_zero_extendhisi2 (ret, op));
- }
- emit_insn (gen_ashlsi3 (ret, ret, GEN_INT (16)));
- return gen_lowpart (SFmode, ret);
+
+ ret = gen_reg_rtx (SFmode);
+ emit_insn (gen_extendbfsf2_1 (ret, force_reg (BFmode, val)));
+ return ret;
}
#include "gt-i386-expand.h"
diff --git a/gcc/testsuite/gcc.target/i386/cbranchbf4.c b/gcc/testsuite/gcc.target/i386/cbranchbf4.c
new file mode 100644
index 00000000000..8241a0c2165
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cbranchbf4.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-fexcess-precision=16 -O -msse2 -mfpmath=sse" } */
+/* { dg-final { scan-assembler-times "pslld" 4 } } */
+
+char
+foo (__bf16 a, __bf16 b)
+{
+ return a > b;
+}
+
+float
+foo1 (__bf16 a, __bf16 b, float c, float d)
+{
+ return a > b ? c : d;
+}
--
2.27.0
next reply other threads:[~2022-12-02 4:26 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-02 4:26 liuhongt [this message]
2022-12-02 6:56 ` Uros Bizjak
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