From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtpbgjp3.qq.com (smtpbgjp3.qq.com [54.92.39.34]) by sourceware.org (Postfix) with ESMTPS id AA5D73837588 for ; Wed, 14 Dec 2022 07:47:07 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org AA5D73837588 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp64t1671004022t6bb9jlf Received: from rios-cad5.localdomain ( [58.60.1.11]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 14 Dec 2022 15:47:00 +0800 (CST) X-QQ-SSF: 01400000000000D0L000000A0000000 X-QQ-FEAT: CR3LFp2JE4k3rUlJAu11AzrXWSLr0NPkRUvnBrKtcwThatVSFrX78gL9eqY89 Cmo7/cMqbsouuSCY1oQhEO91hHFcL/JyhsBI1RLZ1HZlnG+FTGRMqbMFBwcllXIFjYlgxBE VUK2PcRVbKpDpWmxpqRmvPL3uDynhXXf8OSDrnCppySA7hpkezpusYlhwdVn1d/40jklMZY eUjTOAJQU531CIWQ1IRQcz0CC+do3zF6BIrwNVkUwtE5MSF3kfN/MayY/fHCcomzMINzUQ6 183yHUNILg8lGoK0qMazAdrL7FDiMxzzZRkpGPg/y5KU3KYPkZB5Kz/DKU2+JPDqaAG3h8S A2Fnc2NfQq9W4+HahWJqR3lm/IGtWCRVrZeQqAWqRU5/E5j+qSAN0l5/IlTnkzqXKYBlqrw dIKMxSiJ57M= X-QQ-GoodBg: 2 From: juzhe.zhong@rivai.ai To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, Ju-Zhe Zhong Subject: [PATCH] RISC-V: Add VSETVL PASS VLMAX testcases. Date: Wed, 14 Dec 2022 15:46:56 +0800 Message-Id: <20221214074656.217538-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvr:qybglogicsvr7 X-Spam-Status: No, score=-13.0 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: Ju-Zhe Zhong gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/rvv.exp: Adjust to enable tests for VSETVL PASS. * gcc.target/riscv/rvv/vsetvl/dump-1.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-2.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-4.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_call-1.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_call-2.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_call-3.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_call-4.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-1.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-2.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-10.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-11.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-2.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-8.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-9.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-15.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-16.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-17.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-18.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-19.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-20.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-21.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-22.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-23.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-24.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-25.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-26.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-27.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-28.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-11.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-3.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c: New test. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c: New test. --- gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 2 + .../gcc.target/riscv/rvv/vsetvl/dump-1.c | 33 + .../riscv/rvv/vsetvl/vlmax_back_prop-1.c | 36 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-10.c | 59 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-11.c | 63 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-12.c | 64 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-13.c | 64 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-14.c | 58 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-15.c | 143 +++++ .../riscv/rvv/vsetvl/vlmax_back_prop-16.c | 54 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-17.c | 59 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-18.c | 58 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-19.c | 48 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-2.c | 50 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-20.c | 59 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-21.c | 50 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-22.c | 58 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-23.c | 41 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-24.c | 41 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-25.c | 96 +++ .../riscv/rvv/vsetvl/vlmax_back_prop-26.c | 89 +++ .../riscv/rvv/vsetvl/vlmax_back_prop-27.c | 51 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-28.c | 54 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-29.c | 54 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-3.c | 47 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-30.c | 44 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-31.c | 46 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-32.c | 46 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-33.c | 45 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-34.c | 45 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-35.c | 38 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-36.c | 47 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-37.c | 41 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-38.c | 73 +++ .../riscv/rvv/vsetvl/vlmax_back_prop-39.c | 20 + .../riscv/rvv/vsetvl/vlmax_back_prop-4.c | 104 ++++ .../riscv/rvv/vsetvl/vlmax_back_prop-40.c | 22 + .../riscv/rvv/vsetvl/vlmax_back_prop-41.c | 26 + .../riscv/rvv/vsetvl/vlmax_back_prop-42.c | 26 + .../riscv/rvv/vsetvl/vlmax_back_prop-43.c | 27 + .../riscv/rvv/vsetvl/vlmax_back_prop-44.c | 28 + .../riscv/rvv/vsetvl/vlmax_back_prop-45.c | 34 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-46.c | 32 + .../riscv/rvv/vsetvl/vlmax_back_prop-5.c | 48 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-6.c | 155 +++++ .../riscv/rvv/vsetvl/vlmax_back_prop-7.c | 43 ++ .../riscv/rvv/vsetvl/vlmax_back_prop-8.c | 149 +++++ .../riscv/rvv/vsetvl/vlmax_back_prop-9.c | 44 ++ .../riscv/rvv/vsetvl/vlmax_bb_prop-1.c | 182 ++++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-10.c | 230 +++++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-11.c | 43 ++ .../riscv/rvv/vsetvl/vlmax_bb_prop-12.c | 266 ++++++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-13.c | 221 +++++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-14.c | 221 +++++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-15.c | 41 ++ .../riscv/rvv/vsetvl/vlmax_bb_prop-16.c | 257 ++++++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-17.c | 177 ++++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-18.c | 177 ++++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-19.c | 34 ++ .../riscv/rvv/vsetvl/vlmax_bb_prop-2.c | 182 ++++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-20.c | 203 +++++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-21.c | 155 +++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-22.c | 155 +++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-23.c | 30 + .../riscv/rvv/vsetvl/vlmax_bb_prop-24.c | 180 ++++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-25.c | 572 ++++++++++++++++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-26.c | 492 +++++++++++++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-27.c | 491 +++++++++++++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-28.c | 86 +++ .../riscv/rvv/vsetvl/vlmax_bb_prop-3.c | 35 ++ .../riscv/rvv/vsetvl/vlmax_bb_prop-4.c | 210 +++++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-5.c | 167 +++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-6.c | 167 +++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-7.c | 32 + .../riscv/rvv/vsetvl/vlmax_bb_prop-8.c | 194 ++++++ .../riscv/rvv/vsetvl/vlmax_bb_prop-9.c | 230 +++++++ .../riscv/rvv/vsetvl/vlmax_call-1.c | 239 ++++++++ .../riscv/rvv/vsetvl/vlmax_call-2.c | 207 +++++++ .../riscv/rvv/vsetvl/vlmax_call-3.c | 207 +++++++ .../riscv/rvv/vsetvl/vlmax_call-4.c | 39 ++ .../riscv/rvv/vsetvl/vlmax_complex_loop-1.c | 52 ++ .../riscv/rvv/vsetvl/vlmax_complex_loop-2.c | 56 ++ .../riscv/rvv/vsetvl/vlmax_conflict-1.c | 23 + .../riscv/rvv/vsetvl/vlmax_conflict-10.c | 27 + .../riscv/rvv/vsetvl/vlmax_conflict-11.c | 24 + .../riscv/rvv/vsetvl/vlmax_conflict-12.c | 39 ++ .../riscv/rvv/vsetvl/vlmax_conflict-2.c | 23 + .../riscv/rvv/vsetvl/vlmax_conflict-3.c | 30 + .../riscv/rvv/vsetvl/vlmax_conflict-4.c | 29 + .../riscv/rvv/vsetvl/vlmax_conflict-5.c | 32 + .../riscv/rvv/vsetvl/vlmax_conflict-6.c | 26 + .../riscv/rvv/vsetvl/vlmax_conflict-7.c | 26 + .../riscv/rvv/vsetvl/vlmax_conflict-8.c | 27 + .../riscv/rvv/vsetvl/vlmax_conflict-9.c | 27 + .../riscv/rvv/vsetvl/vlmax_miss_default-1.c | 32 + .../riscv/rvv/vsetvl/vlmax_miss_default-10.c | 32 + .../riscv/rvv/vsetvl/vlmax_miss_default-11.c | 32 + .../riscv/rvv/vsetvl/vlmax_miss_default-12.c | 32 + .../riscv/rvv/vsetvl/vlmax_miss_default-13.c | 32 + .../riscv/rvv/vsetvl/vlmax_miss_default-14.c | 189 ++++++ .../riscv/rvv/vsetvl/vlmax_miss_default-15.c | 38 ++ .../riscv/rvv/vsetvl/vlmax_miss_default-16.c | 38 ++ .../riscv/rvv/vsetvl/vlmax_miss_default-17.c | 38 ++ .../riscv/rvv/vsetvl/vlmax_miss_default-18.c | 38 ++ .../riscv/rvv/vsetvl/vlmax_miss_default-19.c | 38 ++ .../riscv/rvv/vsetvl/vlmax_miss_default-2.c | 32 + .../riscv/rvv/vsetvl/vlmax_miss_default-20.c | 38 ++ .../riscv/rvv/vsetvl/vlmax_miss_default-21.c | 38 ++ .../riscv/rvv/vsetvl/vlmax_miss_default-22.c | 38 ++ .../riscv/rvv/vsetvl/vlmax_miss_default-23.c | 38 ++ .../riscv/rvv/vsetvl/vlmax_miss_default-24.c | 38 ++ .../riscv/rvv/vsetvl/vlmax_miss_default-25.c | 38 ++ .../riscv/rvv/vsetvl/vlmax_miss_default-26.c | 38 ++ .../riscv/rvv/vsetvl/vlmax_miss_default-27.c | 38 ++ .../riscv/rvv/vsetvl/vlmax_miss_default-28.c | 231 +++++++ .../riscv/rvv/vsetvl/vlmax_miss_default-3.c | 32 + .../riscv/rvv/vsetvl/vlmax_miss_default-4.c | 32 + .../riscv/rvv/vsetvl/vlmax_miss_default-5.c | 32 + .../riscv/rvv/vsetvl/vlmax_miss_default-6.c | 32 + .../riscv/rvv/vsetvl/vlmax_miss_default-7.c | 32 + .../riscv/rvv/vsetvl/vlmax_miss_default-8.c | 32 + .../riscv/rvv/vsetvl/vlmax_miss_default-9.c | 32 + .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c | 37 ++ .../riscv/rvv/vsetvl/vlmax_phi-10.c | 37 ++ .../riscv/rvv/vsetvl/vlmax_phi-11.c | 37 ++ .../riscv/rvv/vsetvl/vlmax_phi-12.c | 37 ++ .../riscv/rvv/vsetvl/vlmax_phi-13.c | 37 ++ .../riscv/rvv/vsetvl/vlmax_phi-14.c | 217 +++++++ .../riscv/rvv/vsetvl/vlmax_phi-15.c | 40 ++ .../riscv/rvv/vsetvl/vlmax_phi-16.c | 40 ++ .../riscv/rvv/vsetvl/vlmax_phi-17.c | 40 ++ .../riscv/rvv/vsetvl/vlmax_phi-18.c | 40 ++ .../riscv/rvv/vsetvl/vlmax_phi-19.c | 40 ++ .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c | 37 ++ .../riscv/rvv/vsetvl/vlmax_phi-20.c | 40 ++ .../riscv/rvv/vsetvl/vlmax_phi-21.c | 40 ++ .../riscv/rvv/vsetvl/vlmax_phi-22.c | 40 ++ .../riscv/rvv/vsetvl/vlmax_phi-23.c | 40 ++ .../riscv/rvv/vsetvl/vlmax_phi-24.c | 40 ++ .../riscv/rvv/vsetvl/vlmax_phi-25.c | 40 ++ .../riscv/rvv/vsetvl/vlmax_phi-26.c | 40 ++ .../riscv/rvv/vsetvl/vlmax_phi-27.c | 40 ++ .../riscv/rvv/vsetvl/vlmax_phi-28.c | 237 ++++++++ .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c | 37 ++ .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c | 37 ++ .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c | 37 ++ .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c | 37 ++ .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c | 37 ++ .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c | 37 ++ .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c | 37 ++ .../riscv/rvv/vsetvl/vlmax_single_block-1.c | 154 +++++ .../riscv/rvv/vsetvl/vlmax_single_block-10.c | 143 +++++ .../riscv/rvv/vsetvl/vlmax_single_block-11.c | 34 ++ .../riscv/rvv/vsetvl/vlmax_single_block-12.c | 92 +++ .../riscv/rvv/vsetvl/vlmax_single_block-13.c | 89 +++ .../riscv/rvv/vsetvl/vlmax_single_block-14.c | 16 + .../riscv/rvv/vsetvl/vlmax_single_block-15.c | 42 ++ .../riscv/rvv/vsetvl/vlmax_single_block-16.c | 147 +++++ .../riscv/rvv/vsetvl/vlmax_single_block-17.c | 32 + .../riscv/rvv/vsetvl/vlmax_single_block-18.c | 32 + .../riscv/rvv/vsetvl/vlmax_single_block-19.c | 105 ++++ .../riscv/rvv/vsetvl/vlmax_single_block-2.c | 70 +++ .../riscv/rvv/vsetvl/vlmax_single_block-3.c | 70 +++ .../riscv/rvv/vsetvl/vlmax_single_block-4.c | 49 ++ .../riscv/rvv/vsetvl/vlmax_single_block-5.c | 49 ++ .../riscv/rvv/vsetvl/vlmax_single_block-6.c | 28 + .../riscv/rvv/vsetvl/vlmax_single_block-7.c | 28 + .../riscv/rvv/vsetvl/vlmax_single_block-8.c | 28 + .../riscv/rvv/vsetvl/vlmax_single_block-9.c | 147 +++++ .../riscv/rvv/vsetvl/vlmax_single_vtype-1.c | 86 +++ .../riscv/rvv/vsetvl/vlmax_single_vtype-2.c | 42 ++ .../riscv/rvv/vsetvl/vlmax_single_vtype-3.c | 38 ++ .../riscv/rvv/vsetvl/vlmax_single_vtype-4.c | 31 + .../riscv/rvv/vsetvl/vlmax_single_vtype-5.c | 31 + .../riscv/rvv/vsetvl/vlmax_single_vtype-6.c | 18 + .../riscv/rvv/vsetvl/vlmax_single_vtype-7.c | 18 + .../riscv/rvv/vsetvl/vlmax_single_vtype-8.c | 18 + .../riscv/rvv/vsetvl/vlmax_switch_vtype-1.c | 26 + .../riscv/rvv/vsetvl/vlmax_switch_vtype-10.c | 47 ++ .../riscv/rvv/vsetvl/vlmax_switch_vtype-11.c | 55 ++ .../riscv/rvv/vsetvl/vlmax_switch_vtype-12.c | 55 ++ .../riscv/rvv/vsetvl/vlmax_switch_vtype-13.c | 17 + .../riscv/rvv/vsetvl/vlmax_switch_vtype-14.c | 39 ++ .../riscv/rvv/vsetvl/vlmax_switch_vtype-15.c | 52 ++ .../riscv/rvv/vsetvl/vlmax_switch_vtype-16.c | 60 ++ .../riscv/rvv/vsetvl/vlmax_switch_vtype-2.c | 26 + .../riscv/rvv/vsetvl/vlmax_switch_vtype-3.c | 25 + .../riscv/rvv/vsetvl/vlmax_switch_vtype-4.c | 20 + .../riscv/rvv/vsetvl/vlmax_switch_vtype-5.c | 20 + .../riscv/rvv/vsetvl/vlmax_switch_vtype-6.c | 33 + .../riscv/rvv/vsetvl/vlmax_switch_vtype-7.c | 43 ++ .../riscv/rvv/vsetvl/vlmax_switch_vtype-8.c | 45 ++ .../riscv/rvv/vsetvl/vlmax_switch_vtype-9.c | 45 ++ 193 files changed, 14207 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/dump-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-10.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-11.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-9.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-15.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-17.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-18.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-19.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-20.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-21.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-22.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-23.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-24.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-25.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-26.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-27.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-28.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-11.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp index 25e09f41d73..2ed29e22606 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp +++ b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp @@ -42,6 +42,8 @@ dg-init set CFLAGS "$DEFAULT_CFLAGS -march=$gcc_march -O3" dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/base/*.\[cS\]]] \ "" $CFLAGS +gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/vsetvl/*.\[cS\]]] \ + "" $CFLAGS # All done. dg-finish diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/dump-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/dump-1.c new file mode 100644 index 00000000000..fb4edb459a0 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/dump-1.c @@ -0,0 +1,33 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fdump-rtl-vsetvl-details" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, void * restrict in2, void * restrict out2, int n, int cond) +{ + for (int i = 0; i < n; i++) + { + vuint16mf4_t v2; + *(vuint16mf4_t*)(out + i + 1000) = v2; + vbool32_t v4; + *(vbool32_t*)(out + i + 3000) = v4; + vbool16_t v5; + *(vbool16_t*)(out + i + 4000) = v5; + vbool8_t v6; + *(vbool8_t*)(out + i + 5000) = v6; + vbool4_t v7; + *(vbool4_t*)(out + i + 6000) = v7; + vbool2_t v8; + *(vbool2_t*)(out + i + 7000) = v8; + vbool1_t v9; + *(vbool1_t*)(out + i + 8000) = v9; + vuint32mf2_t v10; + *(vuint32mf2_t*)(out + i + 100000) = v10; + } + + for (int i = 0; i < n; i++) + { + vint8mf8_t v1 = *(vint8mf8_t*)(in + i + 100000); + *(vint8mf8_t*)(out + i + 10) = v1; + } +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c new file mode 100644 index 00000000000..47645ee7110 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c @@ -0,0 +1,36 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c new file mode 100644 index 00000000000..d36df955a43 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c @@ -0,0 +1,59 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond, int cond2, int cond3) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) + { + if (cond2 == 11) + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 2; + } + } + else if (cond2 == 111) + { + if (cond3 == 300) + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + out[i]; + } + } + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c new file mode 100644 index 00000000000..fa818aa3b1c --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c @@ -0,0 +1,63 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond, int cond2, int cond3) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + i); + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200 + i); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300 + i); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400 + i); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500 + i); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) + { + if (cond2 == 11) + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 2; + } + } + else if (cond2 == 111) + { + if (cond3 == 300) + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + out[i]; + } + } else { + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 2000 + i); + *(vfloat32mf2_t*)(out + i + 4000) = v; + } + } + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c new file mode 100644 index 00000000000..324e38d3fc6 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c @@ -0,0 +1,64 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond, int cond2, int cond3) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + i); + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200 + i); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300 + i); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400 + i); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500 + i); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) + { + if (cond2 == 11) + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 2; + } + } + else if (cond2 == 111) + { + if (cond3 == 300) + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + out[i]; + } + } else { + for (int i = 0; i < n; i++) { + vint8mf2_t v = *(vint8mf2_t*)(in + 2000 + i); + *(vint8mf2_t*)(out + i + 4000) = v; + } + } + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c new file mode 100644 index 00000000000..23d21557d03 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c @@ -0,0 +1,64 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond, int cond2, int cond3) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + i); + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200 + i); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300 + i); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400 + i); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500 + i); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) + { + if (cond2 == 11) + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 2; + } + } + else if (cond2 == 111) + { + if (cond3 == 300) + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + out[i]; + } + } else { + for (int i = 0; i < n; i++) { + vint8mf2_t v = *(vint8mf2_t*)(in + 2000 + i); + *(vint8mf2_t*)(out + i + 4000) = v; + } + } + } + } + + for (int i = 0; i < n; i++) { + vint16m1_t v; + *(vint16m1_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c new file mode 100644 index 00000000000..da48ce2f1f3 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c @@ -0,0 +1,58 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 333); + *(vint8mf8_t*)(out + i + 333) = v; + } + } else if (cond == 1){ + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 444); + *(vint32mf2_t*)(out + i + 444) = v; + } + } else if (cond == 2) { + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 555); + *(vint64m1_t*)(out + i + 555) = v; + } + } else { + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 666); + *(vfloat64m1_t*)(out + i + 666) = v; + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c new file mode 100644 index 00000000000..7dd931c9df8 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c @@ -0,0 +1,143 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 333); + *(vint8mf8_t*)(out + i + 333) = v; + } + } else if (cond == 1){ + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 444); + *(vint32mf2_t*)(out + i + 444) = v; + } + } else if (cond == 2) { + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 555); + *(vint64m1_t*)(out + i + 555) = v; + } + } else { + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 666); + *(vfloat64m1_t*)(out + i + 666) = v; + } + } + + if (cond == 0) { + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 333); + *(vint8mf8_t*)(out + i + 333) = v; + } + } else if (cond == 1){ + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 444); + *(vint32mf2_t*)(out + i + 444) = v; + } + } else if (cond == 2) { + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 555); + *(vint64m1_t*)(out + i + 555) = v; + } + } else { + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 666); + *(vfloat64m1_t*)(out + i + 666) = v; + } + } + + if (cond == 0) { + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 333); + *(vint8mf8_t*)(out + i + 333) = v; + } + } else if (cond == 1){ + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 444); + *(vint32mf2_t*)(out + i + 444) = v; + } + } else if (cond == 2) { + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 555); + *(vint64m1_t*)(out + i + 555) = v; + } + } else { + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 666); + *(vfloat64m1_t*)(out + i + 666) = v; + } + } + if (cond == 0) { + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 333); + *(vint8mf8_t*)(out + i + 333) = v; + } + } else if (cond == 1){ + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 444); + *(vint32mf2_t*)(out + i + 444) = v; + } + } else if (cond == 2) { + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 555); + *(vint64m1_t*)(out + i + 555) = v; + } + } else { + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 666); + *(vfloat64m1_t*)(out + i + 666) = v; + } + } + if (cond == 0) { + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 333); + *(vint8mf8_t*)(out + i + 333) = v; + } + } else if (cond == 1){ + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 444); + *(vint32mf2_t*)(out + i + 444) = v; + } + } else if (cond == 2) { + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 555); + *(vint64m1_t*)(out + i + 555) = v; + } + } else { + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 666); + *(vfloat64m1_t*)(out + i + 666) = v; + } + } + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c new file mode 100644 index 00000000000..84abe55a2b0 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c @@ -0,0 +1,54 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + 771); + *(vint8mf8_t*)(out + 771) = v; + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71); + *(vint32mf2_t*)(out + 71) = v2; + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17); + *(vfloat32mf2_t*)(out + 17) = v3; + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117); + *(vuint32mf2_t*)(out + 117) = v4; + } else { + vfloat32mf2_t v0 = *(vfloat32mf2_t*)(in + 1123); + *(vfloat32mf2_t*)(out + 1123) = v0; + vint8mf8_t v = *(vint8mf8_t*)(in + 333); + *(vint8mf8_t*)(out + 333) = v; + vbool64_t v2 = *(vbool64_t*)(in + 91); + *(vbool64_t*)(out + 91) = v2; + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c new file mode 100644 index 00000000000..dce21cc8dbc --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c @@ -0,0 +1,59 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++){ + vint8mf8_t v = *(vint8mf8_t*)(in + 771 + i); + *(vint8mf8_t*)(out + 771 + i) = v; + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71 + i); + *(vint32mf2_t*)(out + 71 + i) = v2; + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17 + i); + *(vfloat32mf2_t*)(out + 17 + i) = v3; + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117 + i); + *(vuint32mf2_t*)(out + 117 + i) = v4; + } + } else { + for (int i = 0; i < n; i++){ + vfloat32mf2_t v0 = *(vfloat32mf2_t*)(in + 1123 + i); + *(vfloat32mf2_t*)(out + 1123 + i) = v0; + vint8mf8_t v = *(vint8mf8_t*)(in + 333 + i); + *(vint8mf8_t*)(out + 333 + i) = v; + vbool64_t v2 = *(vbool64_t*)(in + 91 + i); + *(vbool64_t*)(out + 91 + i) = v2; + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c new file mode 100644 index 00000000000..18c44d6479d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c @@ -0,0 +1,58 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++){ + vint8mf8_t v = *(vint8mf8_t*)(in + 771 + i); + *(vint8mf8_t*)(out + 771 + i) = v; + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71 + i); + *(vint32mf2_t*)(out + 71 + i) = v2; + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17 + i); + *(vfloat32mf2_t*)(out + 17 + i) = v3; + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117 + i); + *(vuint32mf2_t*)(out + 117 + i) = v4; + } + } else { + vfloat32mf2_t v0 = *(vfloat32mf2_t*)(in + 1123); + *(vfloat32mf2_t*)(out + 1123) = v0; + vint8mf8_t v = *(vint8mf8_t*)(in + 333); + *(vint8mf8_t*)(out + 333) = v; + vbool64_t v2 = *(vbool64_t*)(in + 91); + *(vbool64_t*)(out + 91) = v2; + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c new file mode 100644 index 00000000000..0c6a572671a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c @@ -0,0 +1,48 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + 771); + *(vint8mf8_t*)(out + 771) = v; + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71); + *(vint32mf2_t*)(out + 71) = v2; + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17); + *(vfloat32mf2_t*)(out + 17) = v3; + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117); + *(vuint32mf2_t*)(out + 117) = v4; + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c new file mode 100644 index 00000000000..3e7d8f4030f --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c @@ -0,0 +1,50 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] + 2; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] + out[i]; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] * 2; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] * out[i]; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] * out[i] + 100; + } + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c new file mode 100644 index 00000000000..dce21cc8dbc --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c @@ -0,0 +1,59 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++){ + vint8mf8_t v = *(vint8mf8_t*)(in + 771 + i); + *(vint8mf8_t*)(out + 771 + i) = v; + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71 + i); + *(vint32mf2_t*)(out + 71 + i) = v2; + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17 + i); + *(vfloat32mf2_t*)(out + 17 + i) = v3; + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117 + i); + *(vuint32mf2_t*)(out + 117 + i) = v4; + } + } else { + for (int i = 0; i < n; i++){ + vfloat32mf2_t v0 = *(vfloat32mf2_t*)(in + 1123 + i); + *(vfloat32mf2_t*)(out + 1123 + i) = v0; + vint8mf8_t v = *(vint8mf8_t*)(in + 333 + i); + *(vint8mf8_t*)(out + 333 + i) = v; + vbool64_t v2 = *(vbool64_t*)(in + 91 + i); + *(vbool64_t*)(out + 91 + i) = v2; + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c new file mode 100644 index 00000000000..7c2435ab726 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c @@ -0,0 +1,50 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++){ + vint8mf8_t v = *(vint8mf8_t*)(in + 771 + i); + *(vint8mf8_t*)(out + 771 + i) = v; + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71 + i); + *(vint32mf2_t*)(out + 71 + i) = v2; + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17 + i); + *(vfloat32mf2_t*)(out + 17 + i) = v3; + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117 + i); + *(vuint32mf2_t*)(out + 117 + i) = v4; + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c new file mode 100644 index 00000000000..222e0c6cbee --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c @@ -0,0 +1,58 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++){ + vint8mf8_t v = *(vint8mf8_t*)(in + 771 + i); + *(vint8mf8_t*)(out + 771 + i) = v; + vint32mf2_t v2 = *(vint32mf2_t*)(in + 71 + i); + *(vint32mf2_t*)(out + 71 + i) = v2; + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 17 + i); + *(vfloat32mf2_t*)(out + 17 + i) = v3; + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 117 + i); + *(vuint32mf2_t*)(out + 117 + i) = v4; + } + } else { + vfloat32mf2_t v0 = *(vfloat32mf2_t*)(in + 1123); + *(vfloat32mf2_t*)(out + 1123) = v0; + vint8mf8_t v = *(vint8mf8_t*)(in + 333); + *(vint8mf8_t*)(out + 333) = v; + vbool64_t v2 = *(vbool64_t*)(in + 91); + *(vbool64_t*)(out + 91) = v2; + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c new file mode 100644 index 00000000000..1dd55cdbb0d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c @@ -0,0 +1,41 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + vint32mf2_t v; + *(vint32mf2_t*)(out + 7000) = v; + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c new file mode 100644 index 00000000000..931bba5389d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c @@ -0,0 +1,41 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + vint32mf2_t v; + *(vint32mf2_t*)(out + 7000) = v; + + for (int i = 0; i < n; i++) { + vbool64_t v; + *(vbool64_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c new file mode 100644 index 00000000000..93015e0c5f5 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c @@ -0,0 +1,96 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + 100); + *(vint8mf8_t*)(out + 100) = v; + for (int i = 0; i < n; i++) + { + vint16mf4_t v2; + *(vint16mf4_t*)(out + i + 100) = v2; + } + } else if (cond == 1) { + vint8mf8_t v = *(vint8mf8_t*)(in + 200); + *(vint8mf8_t*)(out + 200) = v; + for (int i = 0; i < n; i++) + { + vint32mf2_t v2; + *(vint32mf2_t*)(out + i + 200) = v2; + } + } else if (cond == 2) { + vint8mf8_t v = *(vint8mf8_t*)(in + 300); + *(vint8mf8_t*)(out + 300) = v; + for (int i = 0; i < n; i++) + { + vint8mf8_t v2; + *(vint8mf8_t*)(out + i + 300) = v2; + } + } else if (cond == 3) { + vint8mf8_t v = *(vint8mf8_t*)(in + 400); + *(vint8mf8_t*)(out + 400) = v; + for (int i = 0; i < n; i++) + { + vint64m1_t v2; + *(vint64m1_t*)(out + i + 400) = v2; + } + } else if (cond == 4) { + vint8mf8_t v = *(vint8mf8_t*)(in + 500); + *(vint8mf8_t*)(out + 500) = v; + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v2; + *(vfloat32mf2_t*)(out + i + 500) = v2; + } + } else if (cond == 5) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 600); + *(vuint8mf8_t*)(out + 600) = v; + for (int i = 0; i < n; i++) + { + vuint16mf4_t v2; + *(vuint16mf4_t*)(out + i + 600) = v2; + } + } else if (cond == 6) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 700); + *(vuint8mf8_t*)(out + 700) = v; + for (int i = 0; i < n; i++) + { + vuint32mf2_t v2; + *(vuint32mf2_t*)(out + i + 700) = v2; + } + } else if (cond == 7) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 800); + *(vuint8mf8_t*)(out + 800) = v; + for (int i = 0; i < n; i++) + { + vuint8mf8_t v2; + *(vuint8mf8_t*)(out + i + 800) = v2; + } + } else if (cond == 8) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 900); + *(vuint8mf8_t*)(out + 900) = v; + for (int i = 0; i < n; i++) + { + vuint64m1_t v2; + *(vuint64m1_t*)(out + i + 900) = v2; + } + } else { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 1000); + *(vuint8mf8_t*)(out + 1000) = v; + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v2; + *(vfloat32mf2_t*)(out + i + 1000) = v2; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 10 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 20 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c new file mode 100644 index 00000000000..adb831d3ee1 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c @@ -0,0 +1,89 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + 100); + *(vint8mf8_t*)(out + 100) = v; + for (int i = 0; i < n; i++) + { + vint16mf4_t v2; + *(vint16mf4_t*)(out + i + 100) = v2; + } + } else if (cond == 1) { + vint8mf8_t v = *(vint8mf8_t*)(in + 200); + *(vint8mf8_t*)(out + 200) = v; + for (int i = 0; i < n; i++) + { + vint32mf2_t v2; + *(vint32mf2_t*)(out + i + 200) = v2; + } + } else if (cond == 2) { + vint8mf8_t v = *(vint8mf8_t*)(in + 300); + *(vint8mf8_t*)(out + 300) = v; + for (int i = 0; i < n; i++) + { + vint8mf8_t v2; + *(vint8mf8_t*)(out + i + 300) = v2; + } + } else if (cond == 3) { + vint8mf8_t v = *(vint8mf8_t*)(in + 400); + *(vint8mf8_t*)(out + 400) = v; + for (int i = 0; i < n; i++) + { + vint64m1_t v2; + *(vint64m1_t*)(out + i + 400) = v2; + } + } else if (cond == 4) { + vint8mf8_t v = *(vint8mf8_t*)(in + 500); + *(vint8mf8_t*)(out + 500) = v; + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v2; + *(vfloat32mf2_t*)(out + i + 500) = v2; + } + } else if (cond == 5) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 600); + *(vuint8mf8_t*)(out + 600) = v; + for (int i = 0; i < n; i++) + { + vuint16mf4_t v2; + *(vuint16mf4_t*)(out + i + 600) = v2; + } + } else if (cond == 6) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 700); + *(vuint8mf8_t*)(out + 700) = v; + for (int i = 0; i < n; i++) + { + vuint32mf2_t v2; + *(vuint32mf2_t*)(out + i + 700) = v2; + } + } else if (cond == 7) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 800); + *(vuint8mf8_t*)(out + 800) = v; + for (int i = 0; i < n; i++) + { + vuint8mf8_t v2; + *(vuint8mf8_t*)(out + i + 800) = v2; + } + } else if (cond == 8) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 900); + *(vuint8mf8_t*)(out + 900) = v; + for (int i = 0; i < n; i++) + { + vuint64m1_t v2; + *(vuint64m1_t*)(out + i + 900) = v2; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 8 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 17 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c new file mode 100644 index 00000000000..16a5f2d98fb --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c @@ -0,0 +1,51 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, void * restrict in2, void * restrict out2, int n, int cond) +{ + if (cond == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + 100); + *(vint8mf8_t*)(out + 100) = v; + for (int i = 0; i < n; i++) + { + vint16mf4_t v2; + *(vint16mf4_t*)(out + i + 100) = v2; + } + } else { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 1000); + *(vuint8mf8_t*)(out + 1000) = v; + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v2; + *(vfloat32mf2_t*)(out + i + 1000) = v2; + vbool64_t v3; + *(vbool64_t*)(out + i + 2000) = v3; + vbool32_t v4; + *(vbool32_t*)(out + i + 3000) = v4; + vbool16_t v5; + *(vbool16_t*)(out + i + 4000) = v5; + vbool8_t v6; + *(vbool8_t*)(out + i + 5000) = v6; + vbool4_t v7; + *(vbool4_t*)(out + i + 6000) = v7; + vbool2_t v8; + *(vbool2_t*)(out + i + 7000) = v8; + vbool1_t v9; + *(vbool1_t*)(out + i + 8000) = v9; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c new file mode 100644 index 00000000000..366b5cf4925 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c @@ -0,0 +1,54 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, void * restrict in2, void * restrict out2, int n, int cond) +{ + if (cond == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + 100); + *(vint8mf8_t*)(out + 100) = v; + for (int i = 0; i < n; i++) + { + vint16mf4_t v2; + *(vint16mf4_t*)(out + i + 100) = v2; + } + } else { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 1000); + *(vuint8mf8_t*)(out + 1000) = v; + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v2; + *(vfloat32mf2_t*)(out + i + 1000) = v2; + vbool64_t v3; + *(vbool64_t*)(out + i + 2000) = v3; + vbool32_t v4; + *(vbool32_t*)(out + i + 3000) = v4; + vbool16_t v5; + *(vbool16_t*)(out + i + 4000) = v5; + vbool8_t v6; + *(vbool8_t*)(out + i + 5000) = v6; + vbool4_t v7; + *(vbool4_t*)(out + i + 6000) = v7; + vbool2_t v8; + *(vbool2_t*)(out + i + 7000) = v8; + vbool1_t v9; + *(vbool1_t*)(out + i + 8000) = v9; + vuint32mf2_t v10; + *(vuint32mf2_t*)(out + i + 100000) = v10; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 10 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c new file mode 100644 index 00000000000..cbd7a8b1a6b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c @@ -0,0 +1,54 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, void * restrict in2, void * restrict out2, int n, int cond) +{ + if (cond == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + 100); + *(vint8mf8_t*)(out + 100) = v; + for (int i = 0; i < n; i++) + { + vint16mf4_t v2; + *(vint16mf4_t*)(out + i + 100) = v2; + } + } else { + vuint8mf8_t v; + *(vuint8mf8_t*)(out + 1000) = v; + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v2; + *(vfloat32mf2_t*)(out + i + 1000) = v2; + vbool64_t v3; + *(vbool64_t*)(out + i + 2000) = v3; + vbool32_t v4; + *(vbool32_t*)(out + i + 3000) = v4; + vbool16_t v5; + *(vbool16_t*)(out + i + 4000) = v5; + vbool8_t v6; + *(vbool8_t*)(out + i + 5000) = v6; + vbool4_t v7; + *(vbool4_t*)(out + i + 6000) = v7; + vbool2_t v8; + *(vbool2_t*)(out + i + 7000) = v8; + vbool1_t v9; + *(vbool1_t*)(out + i + 8000) = v9; + vuint32mf2_t v10; + *(vuint32mf2_t*)(out + i + 100000) = v10; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 11 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c new file mode 100644 index 00000000000..f6ac96fe900 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c @@ -0,0 +1,47 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 2; + } + } else { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 3; + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c new file mode 100644 index 00000000000..3d800a1daef --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c @@ -0,0 +1,44 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, void * restrict in2, void * restrict out2, int n, int cond) +{ + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v2 = *(vfloat32mf2_t*)(in + i + 1000); + *(vfloat32mf2_t*)(out + i + 1000) = v2; + vbool32_t v4; + *(vbool32_t*)(out + i + 3000) = v4; + vbool16_t v5; + *(vbool16_t*)(out + i + 4000) = v5; + vbool8_t v6; + *(vbool8_t*)(out + i + 5000) = v6; + vbool4_t v7; + *(vbool4_t*)(out + i + 6000) = v7; + vbool2_t v8; + *(vbool2_t*)(out + i + 7000) = v8; + vbool1_t v9; + *(vbool1_t*)(out + i + 8000) = v9; + vuint32mf2_t v10 = *(vuint32mf2_t*)(in + i + 100000); + *(vuint32mf2_t*)(out + i + 100000) = v10; + } + + for (int i = 0; i < n; i++) + { + vint8mf8_t v1; + *(vint8mf8_t*)(out + i + 10) = v1; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c new file mode 100644 index 00000000000..ad954f7c51c --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c @@ -0,0 +1,46 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, void * restrict in2, void * restrict out2, int n, int cond) +{ + for (int i = 0; i < n; i++) + { + vuint16mf4_t v2 = *(vuint16mf4_t*)(in + i + 1000); + *(vuint16mf4_t*)(out + i + 1000) = v2; + vbool32_t v4; + *(vbool32_t*)(out + i + 3000) = v4; + vbool16_t v5; + *(vbool16_t*)(out + i + 4000) = v5; + vbool8_t v6; + *(vbool8_t*)(out + i + 5000) = v6; + vbool4_t v7; + *(vbool4_t*)(out + i + 6000) = v7; + vbool2_t v8; + *(vbool2_t*)(out + i + 7000) = v8; + vbool1_t v9; + *(vbool1_t*)(out + i + 8000) = v9; + vuint32mf2_t v10 = *(vuint32mf2_t*)(in + i + 100000); + *(vuint32mf2_t*)(out + i + 100000) = v10; + } + + for (int i = 0; i < n; i++) + { + vint8mf8_t v1; + *(vint8mf8_t*)(out + i + 10) = v1; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c new file mode 100644 index 00000000000..aa4dac4e000 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c @@ -0,0 +1,46 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, void * restrict in2, void * restrict out2, int n, int cond) +{ + for (int i = 0; i < n; i++) + { + vuint16mf4_t v2 = *(vuint16mf4_t*)(in + i + 1000); + *(vuint16mf4_t*)(out + i + 1000) = v2; + vbool32_t v4; + *(vbool32_t*)(out + i + 3000) = v4; + vbool16_t v5; + *(vbool16_t*)(out + i + 4000) = v5; + vbool8_t v6; + *(vbool8_t*)(out + i + 5000) = v6; + vbool4_t v7; + *(vbool4_t*)(out + i + 6000) = v7; + vbool2_t v8; + *(vbool2_t*)(out + i + 7000) = v8; + vbool1_t v9; + *(vbool1_t*)(out + i + 8000) = v9; + vuint32mf2_t v10; + *(vuint32mf2_t*)(out + i + 100000) = v10; + } + + for (int i = 0; i < n; i++) + { + vint8mf8_t v1 = *(vint8mf8_t*)(in + i + 100000); + *(vint8mf8_t*)(out + i + 10) = v1; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]:+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli} 8 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c new file mode 100644 index 00000000000..9cd9fa3c787 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c @@ -0,0 +1,45 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, void * restrict in2, void * restrict out2, int n, int cond) +{ + for (int i = 0; i < n; i++) + { + vuint16mf4_t v2; + *(vuint16mf4_t*)(out + i + 1000) = v2; + vbool32_t v4; + *(vbool32_t*)(out + i + 3000) = v4; + vbool16_t v5; + *(vbool16_t*)(out + i + 4000) = v5; + vbool8_t v6; + *(vbool8_t*)(out + i + 5000) = v6; + vbool4_t v7; + *(vbool4_t*)(out + i + 6000) = v7; + vbool2_t v8; + *(vbool2_t*)(out + i + 7000) = v8; + vbool1_t v9; + *(vbool1_t*)(out + i + 8000) = v9; + vuint32mf2_t v10; + *(vuint32mf2_t*)(out + i + 100000) = v10; + } + + for (int i = 0; i < n; i++) + { + vint8mf8_t v1 = *(vint8mf8_t*)(in + i + 100000); + *(vint8mf8_t*)(out + i + 10) = v1; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli} 8 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c new file mode 100644 index 00000000000..ce4efe215c9 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c @@ -0,0 +1,45 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int32_t * restrict in2, int32_t * restrict out2, int n, int cond) +{ + if (cond == 0) + { + for (int i = 0; i < n; i++) + { + out2[i] = out[i] + in[i]; + } + } + else if (cond == 1) + { + for (int i = 0; i < n; i++) + { + out2[i] = out[i] + in[i]; + } + for (int i = 0; i < n; i++) + { + out[i] = out2[i] / in[i]; + } + for (int i = 0; i < n; i++) + { + out2[i] = out[i] * in[i]; + } + } + else + { + for (int i = 0; i < n; i++) + { + out[i] = in[i] + 4; + } + } + for (int i = 0; i < n; i++) + { + vint8mf8_t v1; + *(vint8mf8_t*)(out + i + 10) = v1; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c new file mode 100644 index 00000000000..defbd23c2d3 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int32_t * restrict in2, int32_t * restrict out2, int n, int cond) +{ + if (cond == 0) + { + for (int i = 0; i < n; i++) + { + out2[i] = out[i] + in[i]; + } + } + else if (cond == 1) + { + for (int i = 0; i < n; i++) + { + out2[i] = out[i] + in[i]; + } + for (int i = 0; i < n; i++) + { + out[i] = out2[i] / in[i]; + } + for (int i = 0; i < n; i++) + { + out2[i] = out[i] * in[i]; + } + } + for (int i = 0; i < n; i++) + { + vint8mf8_t v1; + *(vint8mf8_t*)(out + i + 10) = v1; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c new file mode 100644 index 00000000000..466c95c4e91 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c @@ -0,0 +1,47 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int32_t * restrict in2, int32_t * restrict out2, int n, int cond) +{ + if (cond == 0) + { + for (int i = 0; i < n; i++) + { + out2[i] = out[i] + in[i]; + } + } + else if (cond == 1) + { + for (int i = 0; i < n; i++) + { + out2[i] = out[i] + in[i]; + } + for (int i = 0; i < n; i++) + { + out[i] = out2[i] / in[i]; + } + for (int i = 0; i < n; i++) + { + out2[i] = out[i] * in[i]; + } + } + else + { + for (int i = 0; i < n; i++) + { + vint32mf2_t v1 = *(vint32mf2_t*)in2; + *(vint32mf2_t*)(out + i + 10) = v1; + } + } + for (int i = 0; i < n; i++) + { + vint8mf8_t v1; + *(vint8mf8_t*)(out + i + 10) = v1; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]+:} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c new file mode 100644 index 00000000000..85f37ac8852 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c @@ -0,0 +1,41 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void fn3 (void); + +void f (int32_t * restrict in, int32_t * restrict out, int32_t * restrict in2, int32_t * restrict out2, int n, int cond) +{ + if (cond == 0) + { + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v1 = *(vfloat32mf2_t*)(in + 1000); + *(vfloat32mf2_t*)(out + i + 1000) = v1; + } + for (int i = 0; i < n; i++) + { + vint32mf2_t v1 = *(vint32mf2_t*)in; + *(vint32mf2_t*)(out + i + 10) = v1; + } + for (int i = 0; i < n; i++) + { + vint16mf4_t v1 = *(vint16mf4_t*)(in + 100); + *(vint16mf4_t*)(out + i + 100) = v1; + } + } + else + { + fn3 (); + } + for (int i = 0; i < n; i++) + { + vint8mf8_t v1; + *(vint8mf8_t*)(out + i + 10) = v1; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c new file mode 100644 index 00000000000..9b8e038b794 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c @@ -0,0 +1,73 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int32_t * restrict in2, int32_t * restrict out2, int n, int cond, int cond2) +{ + if (cond == 0) + { + if (cond2) { + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v1 = *(vfloat32mf2_t*)(in + 1000); + *(vfloat32mf2_t*)(out + i + 1000) = v1; + } + for (int i = 0; i < n; i++) + { + vint32mf2_t v1 = *(vint32mf2_t*)in; + *(vint32mf2_t*)(out + i + 10) = v1; + } + for (int i = 0; i < n; i++) + { + vint16mf4_t v1 = *(vint16mf4_t*)(in + 100); + *(vint16mf4_t*)(out + i + 100) = v1; + } + } else { + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v1 = *(vfloat32mf2_t*)(in + 2000); + *(vfloat32mf2_t*)(out + i + 2000) = v1; + } + for (int i = 0; i < n; i++) + { + vint32mf2_t v1 = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 200) = v1; + } + for (int i = 0; i < n; i++) + { + vint16mf4_t v1 = *(vint16mf4_t*)(in + 300); + *(vint16mf4_t*)(out + i + 300) = v1; + } + } + } + else + { + for (int i = 0; i < n; i++) + { + vint16mf4_t v1 = *(vint16mf4_t*)(in + 30000); + *(vint16mf4_t*)(out + i + 30000) = v1; + } + for (int i = 0; i < n; i++) + { + vint32mf2_t v1 = *(vint32mf2_t*)(in + 40000); + *(vint32mf2_t*)(out + i + 40000) = v1; + } + for (int i = 0; i < n; i++) + { + vuint32mf2_t v1 = *(vuint32mf2_t*)(in + 50000); + *(vuint32mf2_t*)(out + i + 50000) = v1; + } + } + for (int i = 0; i < n; i++) + { + vint8mf8_t v1; + *(vint8mf8_t*)(out + i + 10) = v1; + } +} + + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c new file mode 100644 index 00000000000..2827bb2188e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo5_3 (int32_t * restrict in, int32_t * restrict out, size_t n, int cond) +{ + vint8mf2_t v; + for (size_t i = 0; i < n; i++) + { + if (i % 2 == 0) { + v = *(vint8mf2_t*)(in + i); + } else { + *(vint8mf2_t*)(out + i) = v; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+j\s+\.L[0-9]+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c new file mode 100644 index 00000000000..b2a42a24980 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c @@ -0,0 +1,104 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 2; + } + } else if (cond == 1){ + for (int i = 0; i < n; i++) { + out[i] = out[i] + 3; + } + } else if (cond == 2) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 5; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] + 6; + } + } else if (cond == 4) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 8; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] + 9; + } + } else if (cond == 5) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 10; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] + 11; + } + } else if (cond == 6) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 12; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] + 13; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] * out[i]; + } + } else if (cond == 7) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 15; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] + 16; + } + for (int i = 0; i < n; i++) { + out[i] = out[i] + out[i]; + } + } else if (cond == 8) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 101; + } + } else if (cond == 9) { + for (int i = 0; i < n; i++) { + out[i] = out[i] * 101; + } + } else if (cond == 10) { + for (int i = 0; i < n; i++) { + out[i] = out[i] >> 3; + } + } else { + for (int i = 0; i < n; i++) { + out[i] = out[i] << 1; + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c new file mode 100644 index 00000000000..4042497b486 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo5_4 (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, int cond) +{ + vint8mf2_t v; + for (size_t i = 0; i < n; i++) + { + for (size_t j = 0; j < m; j += 1) { + if (j % 2 == 0) { + v = *(vint8mf2_t*)(in + i + j); + } else { + *(vint8mf2_t*)(out + i + j) = v; + } + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c new file mode 100644 index 00000000000..0e831f53ad8 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo5_5 (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, int cond) +{ + vint8mf2_t v; + for (size_t i = 0; i < n; i++) + { + if (i % 2) { + for (size_t j = 0; j < m; j += 1) { + if (j % 2 == 0) { + v = *(vint8mf2_t*)(in + i + j); + } else { + *(vint8mf2_t*)(out + i + j) = v; + } + } + } else { + *(vint8mf2_t*)(out + i) = v; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c new file mode 100644 index 00000000000..98b045ed632 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo5_6 (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, int cond) +{ + vint8mf2_t v; + for (size_t i = 0; i < n; i++) + { + if (i % 2) { + for (size_t j = 0; j < m; j += 1) { + if (j % 2 == 0) { + v = *(vint8mf2_t*)(in + i + j); + } else { + *(vint8mf2_t*)(out + i + j) = v; + } + } + } else { + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c new file mode 100644 index 00000000000..047369e7734 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo5_3 (int32_t * restrict in, int32_t * restrict out, size_t n, int cond) +{ + for (size_t i = 0; i < n; i++) + { + if (i % 16 == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + i + 100); + *(vint8mf8_t*)(out + i + 100) = v; + } else if (i % 8 == 0) { + vint16mf4_t v = *(vint16mf4_t*)(in + i + 200); + *(vint16mf4_t*)(out + i + 200) = v; + } else if (i % 4 == 0) { + vint32mf2_t v = *(vint32mf2_t*)(in + i + 300); + *(vint32mf2_t*)(out + i + 300) = v; + } else { + vbool64_t v = *(vbool64_t*)(in + i + 400); + *(vbool64_t*)(out + i + 400) = v; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c new file mode 100644 index 00000000000..05e9810609e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo5_4 (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, int cond) +{ + for (size_t i = 0; i < n; i++) + { + for (size_t j = 0; j < m; j += 1) { + if (i % 16 == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + i + 100 + j); + *(vint8mf8_t*)(out + i + 100 + j) = v; + } else if (i % 8 == 0) { + vint16mf4_t v = *(vint16mf4_t*)(in + i + 200 + j); + *(vint16mf4_t*)(out + i + 200 + j) = v; + } else if (i % 4 == 0) { + vint32mf2_t v = *(vint32mf2_t*)(in + i + 300 + j); + *(vint32mf2_t*)(out + i + 300 + j) = v; + } else { + vbool64_t v = *(vbool64_t*)(in + i + 400 + j); + *(vbool64_t*)(out + i + 400 + j) = v; + } + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c new file mode 100644 index 00000000000..521bedc3d74 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c @@ -0,0 +1,34 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo5_5 (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, int cond) +{ + for (size_t i = 0; i < n; i++) + { + if (i % 2) { + for (size_t j = 0; j < m; j += 1) { + if (i % 16 == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + i + 100 + j); + *(vint8mf8_t*)(out + i + 100 + j) = v; + } else if (i % 8 == 0) { + vint16mf4_t v = *(vint16mf4_t*)(in + i + 200 + j); + *(vint16mf4_t*)(out + i + 200 + j) = v; + } else if (i % 4 == 0) { + vint32mf2_t v = *(vint32mf2_t*)(in + i + 300 + j); + *(vint32mf2_t*)(out + i + 300 + j) = v; + } else { + vbool64_t v = *(vbool64_t*)(in + i + 400 + j); + *(vbool64_t*)(out + i + 400 + j) = v; + } + } + } else { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 88888); + *(vfloat32mf2_t*)(out + 88888) = v; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+j\s+\.L[0-9]+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c new file mode 100644 index 00000000000..c70f3cf3581 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo5_6 (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, int cond) +{ + for (size_t i = 0; i < n; i++) + { + if (i % 2) { + for (size_t j = 0; j < m; j += 1) { + if (i % 16 == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + i + 100 + j); + *(vint8mf8_t*)(out + i + 100 + j) = v; + } else if (i % 8 == 0) { + vint16mf4_t v = *(vint16mf4_t*)(in + i + 200 + j); + *(vint16mf4_t*)(out + i + 200 + j) = v; + } else if (i % 4 == 0) { + vint32mf2_t v = *(vint32mf2_t*)(in + i + 300 + j); + *(vint32mf2_t*)(out + i + 300 + j) = v; + } else { + vbool64_t v = *(vbool64_t*)(in + i + 400 + j); + *(vbool64_t*)(out + i + 400 + j) = v; + } + } + } else { + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c new file mode 100644 index 00000000000..b38e362b880 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c @@ -0,0 +1,48 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + switch (cond) + { + case 0: + for (int i = 0; i < n; i++) { + out[i] = out[i] + 2; + } + break; + + default: + for (int i = 0; i < n; i++) { + out[i] = out[i] + 3; + } + break; + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c new file mode 100644 index 00000000000..34ffb29b649 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c @@ -0,0 +1,155 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + switch (cond) + { + case 0: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 2; + } + } + break; + case 1: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 3; + } + } + break; + case 2: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 5; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 6; + } + } + break; + case 4: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 8; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 9; + } + } + break; + case 5: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 10; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 11; + } + } + break; + case 6: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 12; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 13; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] * out[i]; + } + } + break; + case 7: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 15; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 16; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + out[i]; + } + } + break; + case 8: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 101; + } + } + break; + case 9: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] * 101; + } + } + break; + case 10: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] >> 3; + } + } + break; + default: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] << 1; + } + } + break; + } + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c new file mode 100644 index 00000000000..241c8d306af --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c @@ -0,0 +1,43 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 2; + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c new file mode 100644 index 00000000000..1ef570ff695 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c @@ -0,0 +1,149 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + switch (cond) + { + case 0: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 2; + } + } + break; + case 1: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 3; + } + } + break; + case 2: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 5; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 6; + } + } + break; + case 4: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 8; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 9; + } + } + break; + case 5: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 10; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 11; + } + } + break; + case 6: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 12; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 13; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] * out[i]; + } + } + break; + case 7: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 15; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 16; + } + for (int i = 0; i < n; i++) + { + out[i] = out[i] + out[i]; + } + } + break; + case 8: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] + 101; + } + } + break; + case 9: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] * 101; + } + } + break; + case 10: + { + for (int i = 0; i < n; i++) + { + out[i] = out[i] >> 3; + } + } + break; + default: + break; + } + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c new file mode 100644 index 00000000000..d0642c78a1c --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c @@ -0,0 +1,44 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*)in; + *(vint8mf8_t*)(out + i + 200) = v; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v = *(vint64m1_t*)(in + 300); + *(vint64m1_t*)(out + i + 400) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + i + 500) = v; + } + for (int i = 0; i < n; i++) { + vfloat64m1_t v = *(vfloat64m1_t*)(in + 500); + *(vfloat64m1_t*)(out + i + 600) = v; + } + + if (cond == 0) { + for (int i = 0; i < n; i++) { + out[i] = out[i] + 2; + } + } + + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c new file mode 100644 index 00000000000..3e27a8abf10 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c @@ -0,0 +1,182 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + 500); + *(vint8mf8_t*)(out + 500) = v; + } else if (n == 1) { + vint8mf8_t v = *(vint8mf8_t*)(in + 600); + *(vint8mf8_t*)(out + 600) = v; + } else { + vint8mf8_t v = *(vint8mf8_t*)(in + 700); + *(vint8mf8_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 900 + i); + *(vint8mf8_t*)(out + 900 + i) = v; + } +} + +void f2 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint8mf4_t v = *(vint8mf4_t*)(in + 500); + *(vint8mf4_t*)(out + 500) = v; + } else if (n == 1) { + vint8mf4_t v = *(vint8mf4_t*)(in + 600); + *(vint8mf4_t*)(out + 600) = v; + } else { + vint8mf4_t v = *(vint8mf4_t*)(in + 700); + *(vint8mf4_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf4_t v = *(vint8mf4_t*)(in + 900 + i); + *(vint8mf4_t*)(out + 900 + i) = v; + } +} + +void f3 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint8mf2_t v = *(vint8mf2_t*)(in + 500); + *(vint8mf2_t*)(out + 500) = v; + } else if (n == 1) { + vint8mf2_t v = *(vint8mf2_t*)(in + 600); + *(vint8mf2_t*)(out + 600) = v; + } else { + vint8mf2_t v = *(vint8mf2_t*)(in + 700); + *(vint8mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf2_t v = *(vint8mf2_t*)(in + 900 + i); + *(vint8mf2_t*)(out + 900 + i) = v; + } +} + +void f4 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint16mf4_t v = *(vint16mf4_t*)(in + 500); + *(vint16mf4_t*)(out + 500) = v; + } else if (n == 1) { + vint16mf4_t v = *(vint16mf4_t*)(in + 600); + *(vint16mf4_t*)(out + 600) = v; + } else { + vint16mf4_t v = *(vint16mf4_t*)(in + 700); + *(vint16mf4_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf4_t v = *(vint16mf4_t*)(in + 900 + i); + *(vint16mf4_t*)(out + 900 + i) = v; + } +} + +void f5 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint16mf2_t v = *(vint16mf2_t*)(in + 500); + *(vint16mf2_t*)(out + 500) = v; + } else if (n == 1) { + vint16mf2_t v = *(vint16mf2_t*)(in + 600); + *(vint16mf2_t*)(out + 600) = v; + } else { + vint16mf2_t v = *(vint16mf2_t*)(in + 700); + *(vint16mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf2_t v = *(vint16mf2_t*)(in + 900 + i); + *(vint16mf2_t*)(out + 900 + i) = v; + } +} + +void f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint32mf2_t v = *(vint32mf2_t*)(in + 500); + *(vint32mf2_t*)(out + 500) = v; + } else if (n == 1) { + vint32mf2_t v = *(vint32mf2_t*)(in + 600); + *(vint32mf2_t*)(out + 600) = v; + } else { + vint32mf2_t v = *(vint32mf2_t*)(in + 700); + *(vint32mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 900 + i); + *(vint32mf2_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c new file mode 100644 index 00000000000..51d3fcf7613 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c @@ -0,0 +1,230 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vint8mf8_t v = *(vint8mf8_t*)(in + 500); + *(vint8mf8_t*)(out + 500) = v; + break; + } + case 1:{ + vint8mf8_t v = *(vint8mf8_t*)(in + 500); + *(vint8mf8_t*)(out + 500) = v; + break; + } + default:{ + vint8mf8_t v = *(vint8mf8_t*)(in + 700); + *(vint8mf8_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 900 + i); + *(vint8mf8_t*)(out + 900 + i) = v; + } +} + +void f2 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vint8mf4_t v = *(vint8mf4_t*)(in + 500); + *(vint8mf4_t*)(out + 500) = v; + break; + } + case 1:{ + vint8mf4_t v = *(vint8mf4_t*)(in + 500); + *(vint8mf4_t*)(out + 500) = v; + break; + } + default:{ + vint8mf4_t v = *(vint8mf4_t*)(in + 700); + *(vint8mf4_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf4_t v = *(vint8mf4_t*)(in + 900 + i); + *(vint8mf4_t*)(out + 900 + i) = v; + } +} + +void f3 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vint8mf2_t v = *(vint8mf2_t*)(in + 500); + *(vint8mf2_t*)(out + 500) = v; + break; + } + case 1:{ + vint8mf2_t v = *(vint8mf2_t*)(in + 500); + *(vint8mf2_t*)(out + 500) = v; + break; + } + default:{ + vint8mf2_t v = *(vint8mf2_t*)(in + 700); + *(vint8mf2_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf2_t v = *(vint8mf2_t*)(in + 900 + i); + *(vint8mf2_t*)(out + 900 + i) = v; + } +} + +void f4 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vint16mf4_t v = *(vint16mf4_t*)(in + 500); + *(vint16mf4_t*)(out + 500) = v; + break; + } + case 1:{ + vint16mf4_t v = *(vint16mf4_t*)(in + 500); + *(vint16mf4_t*)(out + 500) = v; + break; + } + default:{ + vint16mf4_t v = *(vint16mf4_t*)(in + 700); + *(vint16mf4_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf4_t v = *(vint16mf4_t*)(in + 900 + i); + *(vint16mf4_t*)(out + 900 + i) = v; + } +} + +void f5 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vint16mf2_t v = *(vint16mf2_t*)(in + 500); + *(vint16mf2_t*)(out + 500) = v; + break; + } + case 1:{ + vint16mf2_t v = *(vint16mf2_t*)(in + 500); + *(vint16mf2_t*)(out + 500) = v; + break; + } + default:{ + vint16mf2_t v = *(vint16mf2_t*)(in + 700); + *(vint16mf2_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf2_t v = *(vint16mf2_t*)(in + 900 + i); + *(vint16mf2_t*)(out + 900 + i) = v; + } +} + +void f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vuint32mf2_t v = *(vuint32mf2_t*)(in + 500); + *(vuint32mf2_t*)(out + 500) = v; + break; + } + case 1:{ + vuint32mf2_t v = *(vuint32mf2_t*)(in + 500); + *(vuint32mf2_t*)(out + 500) = v; + break; + } + default:{ + vuint32mf2_t v = *(vuint32mf2_t*)(in + 700); + *(vuint32mf2_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 900 + i); + *(vuint32mf2_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9][0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c new file mode 100644 index 00000000000..3c2badd7793 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c @@ -0,0 +1,43 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 500); + *(vfloat32mf2_t*)(out + 500) = v; + break; + } + case 1:{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 500); + *(vfloat32mf2_t*)(out + 500) = v; + break; + } + default:{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 700); + *(vfloat32mf2_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 900 + i); + *(vfloat32mf2_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c new file mode 100644 index 00000000000..6ace4c4ef18 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c @@ -0,0 +1,266 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vbool64_t v = *(vbool64_t*)(in + 500); + *(vbool64_t*)(out + 500) = v; + break; + } + case 1:{ + vbool64_t v = *(vbool64_t*)(in + 500); + *(vbool64_t*)(out + 500) = v; + break; + } + default:{ + vbool64_t v = *(vbool64_t*)(in + 700); + *(vbool64_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool64_t v = *(vbool64_t*)(in + 900 + i); + *(vbool64_t*)(out + 900 + i) = v; + } +} + +void f2 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vbool32_t v = *(vbool32_t*)(in + 500); + *(vbool32_t*)(out + 500) = v; + break; + } + case 1:{ + vbool32_t v = *(vbool32_t*)(in + 500); + *(vbool32_t*)(out + 500) = v; + break; + } + default:{ + vbool32_t v = *(vbool32_t*)(in + 700); + *(vbool32_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool32_t v = *(vbool32_t*)(in + 900 + i); + *(vbool32_t*)(out + 900 + i) = v; + } +} + +void f3 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vbool16_t v = *(vbool16_t*)(in + 500); + *(vbool16_t*)(out + 500) = v; + break; + } + case 1:{ + vbool16_t v = *(vbool16_t*)(in + 500); + *(vbool16_t*)(out + 500) = v; + break; + } + default:{ + vbool16_t v = *(vbool16_t*)(in + 700); + *(vbool16_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool16_t v = *(vbool16_t*)(in + 900 + i); + *(vbool16_t*)(out + 900 + i) = v; + } +} + +void f4 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vbool8_t v = *(vbool8_t*)(in + 500); + *(vbool8_t*)(out + 500) = v; + break; + } + case 1:{ + vbool8_t v = *(vbool8_t*)(in + 500); + *(vbool8_t*)(out + 500) = v; + break; + } + default:{ + vbool8_t v = *(vbool8_t*)(in + 700); + *(vbool8_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool8_t v = *(vbool8_t*)(in + 900 + i); + *(vbool8_t*)(out + 900 + i) = v; + } +} + +void f5 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vbool4_t v = *(vbool4_t*)(in + 500); + *(vbool4_t*)(out + 500) = v; + break; + } + case 1:{ + vbool4_t v = *(vbool4_t*)(in + 500); + *(vbool4_t*)(out + 500) = v; + break; + } + default:{ + vbool4_t v = *(vbool4_t*)(in + 700); + *(vbool4_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool4_t v = *(vbool4_t*)(in + 900 + i); + *(vbool4_t*)(out + 900 + i) = v; + } +} + +void f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vbool2_t v = *(vbool2_t*)(in + 500); + *(vbool2_t*)(out + 500) = v; + break; + } + case 1:{ + vbool2_t v = *(vbool2_t*)(in + 500); + *(vbool2_t*)(out + 500) = v; + break; + } + default:{ + vbool2_t v = *(vbool2_t*)(in + 700); + *(vbool2_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool2_t v = *(vbool2_t*)(in + 900 + i); + *(vbool2_t*)(out + 900 + i) = v; + } +} + +void f7 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vbool1_t v = *(vbool1_t*)(in + 500); + *(vbool1_t*)(out + 500) = v; + break; + } + case 1:{ + vbool1_t v = *(vbool1_t*)(in + 500); + *(vbool1_t*)(out + 500) = v; + break; + } + default:{ + vbool1_t v = *(vbool1_t*)(in + 700); + *(vbool1_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool1_t v = *(vbool1_t*)(in + 900 + i); + *(vbool1_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" no-opts "-O1" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c new file mode 100644 index 00000000000..8ce380bea07 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c @@ -0,0 +1,221 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vint8mf8_t v = *(vint8mf8_t*)(in + 500); + *(vint8mf8_t*)(out + 500) = v; + break; + } + case 1:{ + vint8mf8_t v = *(vint8mf8_t*)(in + 500); + *(vint8mf8_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 900 + i); + *(vint8mf8_t*)(out + 900 + i) = v; + } +} + +void f2 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vint8mf4_t v = *(vint8mf4_t*)(in + 500); + *(vint8mf4_t*)(out + 500) = v; + break; + } + case 1:{ + vint8mf4_t v = *(vint8mf4_t*)(in + 500); + *(vint8mf4_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf4_t v = *(vint8mf4_t*)(in + 900 + i); + *(vint8mf4_t*)(out + 900 + i) = v; + } +} + +void f3 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vint8mf2_t v = *(vint8mf2_t*)(in + 500); + *(vint8mf2_t*)(out + 500) = v; + break; + } + case 1:{ + vint8mf2_t v = *(vint8mf2_t*)(in + 500); + *(vint8mf2_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf2_t v = *(vint8mf2_t*)(in + 900 + i); + *(vint8mf2_t*)(out + 900 + i) = v; + } +} + +void f4 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vint16mf4_t v = *(vint16mf4_t*)(in + 500); + *(vint16mf4_t*)(out + 500) = v; + break; + } + case 1:{ + vint16mf4_t v = *(vint16mf4_t*)(in + 500); + *(vint16mf4_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf4_t v = *(vint16mf4_t*)(in + 900 + i); + *(vint16mf4_t*)(out + 900 + i) = v; + } +} + +void f5 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vint16mf2_t v = *(vint16mf2_t*)(in + 500); + *(vint16mf2_t*)(out + 500) = v; + break; + } + case 1:{ + vint16mf2_t v = *(vint16mf2_t*)(in + 500); + *(vint16mf2_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf2_t v = *(vint16mf2_t*)(in + 900 + i); + *(vint16mf2_t*)(out + 900 + i) = v; + } +} + +void f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vint32mf2_t v = *(vint32mf2_t*)(in + 500); + *(vint32mf2_t*)(out + 500) = v; + break; + } + case 1:{ + vint32mf2_t v = *(vint32mf2_t*)(in + 500); + *(vint32mf2_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 900 + i); + *(vint32mf2_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c new file mode 100644 index 00000000000..a43aad71808 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c @@ -0,0 +1,221 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vuint8mf8_t v = *(vuint8mf8_t*)(in + 500); + *(vuint8mf8_t*)(out + 500) = v; + break; + } + case 1:{ + vuint8mf8_t v = *(vuint8mf8_t*)(in + 500); + *(vuint8mf8_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 900 + i); + *(vuint8mf8_t*)(out + 900 + i) = v; + } +} + +void f2 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vuint8mf4_t v = *(vuint8mf4_t*)(in + 500); + *(vuint8mf4_t*)(out + 500) = v; + break; + } + case 1:{ + vuint8mf4_t v = *(vuint8mf4_t*)(in + 500); + *(vuint8mf4_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 900 + i); + *(vuint8mf4_t*)(out + 900 + i) = v; + } +} + +void f3 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vuint8mf2_t v = *(vuint8mf2_t*)(in + 500); + *(vuint8mf2_t*)(out + 500) = v; + break; + } + case 1:{ + vuint8mf2_t v = *(vuint8mf2_t*)(in + 500); + *(vuint8mf2_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 900 + i); + *(vuint8mf2_t*)(out + 900 + i) = v; + } +} + +void f4 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vuint16mf4_t v = *(vuint16mf4_t*)(in + 500); + *(vuint16mf4_t*)(out + 500) = v; + break; + } + case 1:{ + vuint16mf4_t v = *(vuint16mf4_t*)(in + 500); + *(vuint16mf4_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 900 + i); + *(vuint16mf4_t*)(out + 900 + i) = v; + } +} + +void f5 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vuint16mf2_t v = *(vuint16mf2_t*)(in + 500); + *(vuint16mf2_t*)(out + 500) = v; + break; + } + case 1:{ + vuint16mf2_t v = *(vuint16mf2_t*)(in + 500); + *(vuint16mf2_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 900 + i); + *(vuint16mf2_t*)(out + 900 + i) = v; + } +} + +void f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vuint32mf2_t v = *(vuint32mf2_t*)(in + 500); + *(vuint32mf2_t*)(out + 500) = v; + break; + } + case 1:{ + vuint32mf2_t v = *(vuint32mf2_t*)(in + 500); + *(vuint32mf2_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 900 + i); + *(vuint32mf2_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c new file mode 100644 index 00000000000..6938cf80723 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c @@ -0,0 +1,41 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 500); + *(vfloat32mf2_t*)(out + 500) = v; + break; + } + case 1:{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 500); + *(vfloat32mf2_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 900 + i); + *(vfloat32mf2_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c new file mode 100644 index 00000000000..10901a0b205 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c @@ -0,0 +1,257 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vbool64_t v = *(vbool64_t*)(in + 500); + *(vbool64_t*)(out + 500) = v; + break; + } + case 1:{ + vbool64_t v = *(vbool64_t*)(in + 500); + *(vbool64_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool64_t v = *(vbool64_t*)(in + 900 + i); + *(vbool64_t*)(out + 900 + i) = v; + } +} + +void f2 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vbool32_t v = *(vbool32_t*)(in + 500); + *(vbool32_t*)(out + 500) = v; + break; + } + case 1:{ + vbool32_t v = *(vbool32_t*)(in + 500); + *(vbool32_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool32_t v = *(vbool32_t*)(in + 900 + i); + *(vbool32_t*)(out + 900 + i) = v; + } +} + +void f3 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vbool16_t v = *(vbool16_t*)(in + 500); + *(vbool16_t*)(out + 500) = v; + break; + } + case 1:{ + vbool16_t v = *(vbool16_t*)(in + 500); + *(vbool16_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool16_t v = *(vbool16_t*)(in + 900 + i); + *(vbool16_t*)(out + 900 + i) = v; + } +} + +void f4 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vbool8_t v = *(vbool8_t*)(in + 500); + *(vbool8_t*)(out + 500) = v; + break; + } + case 1:{ + vbool8_t v = *(vbool8_t*)(in + 500); + *(vbool8_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool8_t v = *(vbool8_t*)(in + 900 + i); + *(vbool8_t*)(out + 900 + i) = v; + } +} + +void f5 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vbool4_t v = *(vbool4_t*)(in + 500); + *(vbool4_t*)(out + 500) = v; + break; + } + case 1:{ + vbool4_t v = *(vbool4_t*)(in + 500); + *(vbool4_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool4_t v = *(vbool4_t*)(in + 900 + i); + *(vbool4_t*)(out + 900 + i) = v; + } +} + +void f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vbool2_t v = *(vbool2_t*)(in + 500); + *(vbool2_t*)(out + 500) = v; + break; + } + case 1:{ + vbool2_t v = *(vbool2_t*)(in + 500); + *(vbool2_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool2_t v = *(vbool2_t*)(in + 900 + i); + *(vbool2_t*)(out + 900 + i) = v; + } +} + +void f7 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vbool1_t v = *(vbool1_t*)(in + 500); + *(vbool1_t*)(out + 500) = v; + break; + } + case 1:{ + vbool1_t v = *(vbool1_t*)(in + 500); + *(vbool1_t*)(out + 500) = v; + break; + } + default:{ + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool1_t v = *(vbool1_t*)(in + 900 + i); + *(vbool1_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+\.L[0-9][0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c new file mode 100644 index 00000000000..01345617fab --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c @@ -0,0 +1,177 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint8mf8_t v = *(vint8mf8_t*)(in + 100); + *(vint8mf8_t*)(out + 100) = v; + } + else + { + vint8mf8_t v = *(vint8mf8_t*)(in + 200); + *(vint8mf8_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vint8mf8_t v = *(vint8mf8_t*)(in + i); + *(vint8mf8_t*)(out + i) = v; + } +} + +void f2 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint8mf4_t v = *(vint8mf4_t*)(in + 100); + *(vint8mf4_t*)(out + 100) = v; + } + else + { + vint8mf4_t v = *(vint8mf4_t*)(in + 200); + *(vint8mf4_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vint8mf4_t v = *(vint8mf4_t*)(in + i); + *(vint8mf4_t*)(out + i) = v; + } +} + +void f3 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint8mf2_t v = *(vint8mf2_t*)(in + 100); + *(vint8mf2_t*)(out + 100) = v; + } + else + { + vint8mf2_t v = *(vint8mf2_t*)(in + 200); + *(vint8mf2_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vint8mf2_t v = *(vint8mf2_t*)(in + i); + *(vint8mf2_t*)(out + i) = v; + } +} + +void f4 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint16mf4_t v = *(vint16mf4_t*)(in + 100); + *(vint16mf4_t*)(out + 100) = v; + } + else + { + vint16mf4_t v = *(vint16mf4_t*)(in + 200); + *(vint16mf4_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vint16mf4_t v = *(vint16mf4_t*)(in + i); + *(vint16mf4_t*)(out + i) = v; + } +} + +void f5 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint16mf2_t v = *(vint16mf2_t*)(in + 100); + *(vint16mf2_t*)(out + 100) = v; + } + else + { + vint16mf2_t v = *(vint16mf2_t*)(in + 200); + *(vint16mf2_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vint16mf2_t v = *(vint16mf2_t*)(in + i); + *(vint16mf2_t*)(out + i) = v; + } +} + +void f6 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint32mf2_t v = *(vint32mf2_t*)(in + 100); + *(vint32mf2_t*)(out + 100) = v; + } + else + { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vint32mf2_t v = *(vint32mf2_t*)(in + i); + *(vint32mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c new file mode 100644 index 00000000000..c296670e2d5 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c @@ -0,0 +1,177 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 100); + *(vuint8mf8_t*)(out + 100) = v; + } + else + { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 200); + *(vuint8mf8_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vuint8mf8_t v = *(vuint8mf8_t*)(in + i); + *(vuint8mf8_t*)(out + i) = v; + } +} + +void f2 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 100); + *(vuint8mf4_t*)(out + 100) = v; + } + else + { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 200); + *(vuint8mf4_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vuint8mf4_t v = *(vuint8mf4_t*)(in + i); + *(vuint8mf4_t*)(out + i) = v; + } +} + +void f3 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 100); + *(vuint8mf2_t*)(out + 100) = v; + } + else + { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 200); + *(vuint8mf2_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vuint8mf2_t v = *(vuint8mf2_t*)(in + i); + *(vuint8mf2_t*)(out + i) = v; + } +} + +void f4 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 100); + *(vuint16mf4_t*)(out + 100) = v; + } + else + { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 200); + *(vuint16mf4_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vuint16mf4_t v = *(vuint16mf4_t*)(in + i); + *(vuint16mf4_t*)(out + i) = v; + } +} + +void f5 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 100); + *(vuint16mf2_t*)(out + 100) = v; + } + else + { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 200); + *(vuint16mf2_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vuint16mf2_t v = *(vuint16mf2_t*)(in + i); + *(vuint16mf2_t*)(out + i) = v; + } +} + +void f6 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 100); + *(vuint32mf2_t*)(out + 100) = v; + } + else + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 200); + *(vuint32mf2_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + i); + *(vuint32mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c new file mode 100644 index 00000000000..d87b2381daf --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c @@ -0,0 +1,34 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f6 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 100); + *(vfloat32mf2_t*)(out + 100) = v; + } + else + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 200); + *(vfloat32mf2_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + i); + *(vfloat32mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-2.c new file mode 100644 index 00000000000..ce94f4a12b2 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-2.c @@ -0,0 +1,182 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 500); + *(vuint8mf8_t*)(out + 500) = v; + } else if (n == 1) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 600); + *(vuint8mf8_t*)(out + 600) = v; + } else { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 700); + *(vuint8mf8_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 900 + i); + *(vuint8mf8_t*)(out + 900 + i) = v; + } +} + +void f2 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 500); + *(vuint8mf4_t*)(out + 500) = v; + } else if (n == 1) { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 600); + *(vuint8mf4_t*)(out + 600) = v; + } else { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 700); + *(vuint8mf4_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 900 + i); + *(vuint8mf4_t*)(out + 900 + i) = v; + } +} + +void f3 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 500); + *(vuint8mf2_t*)(out + 500) = v; + } else if (n == 1) { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 600); + *(vuint8mf2_t*)(out + 600) = v; + } else { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 700); + *(vuint8mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 900 + i); + *(vuint8mf2_t*)(out + 900 + i) = v; + } +} + +void f4 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 500); + *(vuint16mf4_t*)(out + 500) = v; + } else if (n == 1) { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 600); + *(vuint16mf4_t*)(out + 600) = v; + } else { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 700); + *(vuint16mf4_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 900 + i); + *(vuint16mf4_t*)(out + 900 + i) = v; + } +} + +void f5 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 500); + *(vuint16mf2_t*)(out + 500) = v; + } else if (n == 1) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 600); + *(vuint16mf2_t*)(out + 600) = v; + } else { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 700); + *(vuint16mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 900 + i); + *(vuint16mf2_t*)(out + 900 + i) = v; + } +} + +void f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 500); + *(vuint32mf2_t*)(out + 500) = v; + } else if (n == 1) { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 600); + *(vuint32mf2_t*)(out + 600) = v; + } else { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 700); + *(vuint32mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 900 + i); + *(vuint32mf2_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" no-opts "-O1" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c new file mode 100644 index 00000000000..273a2853282 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c @@ -0,0 +1,203 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool64_t v = *(vbool64_t*)(in + 100); + *(vbool64_t*)(out + 100) = v; + } + else + { + vbool64_t v = *(vbool64_t*)(in + 200); + *(vbool64_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vbool64_t v = *(vbool64_t*)(in + i); + *(vbool64_t*)(out + i) = v; + } +} + +void f2 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool32_t v = *(vbool32_t*)(in + 100); + *(vbool32_t*)(out + 100) = v; + } + else + { + vbool32_t v = *(vbool32_t*)(in + 200); + *(vbool32_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vbool32_t v = *(vbool32_t*)(in + i); + *(vbool32_t*)(out + i) = v; + } +} + +void f3 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool16_t v = *(vbool16_t*)(in + 100); + *(vbool16_t*)(out + 100) = v; + } + else + { + vbool16_t v = *(vbool16_t*)(in + 200); + *(vbool16_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vbool16_t v = *(vbool16_t*)(in + i); + *(vbool16_t*)(out + i) = v; + } +} + +void f4 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool8_t v = *(vbool8_t*)(in + 100); + *(vbool8_t*)(out + 100) = v; + } + else + { + vbool8_t v = *(vbool8_t*)(in + 200); + *(vbool8_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vbool8_t v = *(vbool8_t*)(in + i); + *(vbool8_t*)(out + i) = v; + } +} + +void f5 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool4_t v = *(vbool4_t*)(in + 100); + *(vbool4_t*)(out + 100) = v; + } + else + { + vbool4_t v = *(vbool4_t*)(in + 200); + *(vbool4_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vbool4_t v = *(vbool4_t*)(in + i); + *(vbool4_t*)(out + i) = v; + } +} + +void f6 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool2_t v = *(vbool2_t*)(in + 100); + *(vbool2_t*)(out + 100) = v; + } + else + { + vbool2_t v = *(vbool2_t*)(in + 200); + *(vbool2_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vbool2_t v = *(vbool2_t*)(in + i); + *(vbool2_t*)(out + i) = v; + } +} + +void f7 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool1_t v = *(vbool1_t*)(in + 100); + *(vbool1_t*)(out + 100) = v; + } + else + { + vbool1_t v = *(vbool1_t*)(in + 200); + *(vbool1_t*)(out + 200) = v; + if (cond == 2) + { + out[1000] = 8000; + } + else + { + out[2000] = 9000; + } + } + for (int i = 0; i < n; i++) + { + vbool1_t v = *(vbool1_t*)(in + i); + *(vbool1_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 6 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c new file mode 100644 index 00000000000..25ae317364b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c @@ -0,0 +1,155 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint8mf8_t v = *(vint8mf8_t*)(in + 100); + *(vint8mf8_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vint8mf8_t v = *(vint8mf8_t*)(in + 200); + *(vint8mf8_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vint8mf8_t v = *(vint8mf8_t*)(in + i); + *(vint8mf8_t*)(out + i) = v; + } +} + +void f2 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint8mf4_t v = *(vint8mf4_t*)(in + 100); + *(vint8mf4_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vint8mf4_t v = *(vint8mf4_t*)(in + 200); + *(vint8mf4_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vint8mf4_t v = *(vint8mf4_t*)(in + i); + *(vint8mf4_t*)(out + i) = v; + } +} + +void f3 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint8mf2_t v = *(vint8mf2_t*)(in + 100); + *(vint8mf2_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vint8mf2_t v = *(vint8mf2_t*)(in + 200); + *(vint8mf2_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vint8mf2_t v = *(vint8mf2_t*)(in + i); + *(vint8mf2_t*)(out + i) = v; + } +} + +void f4 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint16mf4_t v = *(vint16mf4_t*)(in + 100); + *(vint16mf4_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vint16mf4_t v = *(vint16mf4_t*)(in + 200); + *(vint16mf4_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vint16mf4_t v = *(vint16mf4_t*)(in + i); + *(vint16mf4_t*)(out + i) = v; + } +} + +void f5 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint16mf2_t v = *(vint16mf2_t*)(in + 100); + *(vint16mf2_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vint16mf2_t v = *(vint16mf2_t*)(in + 200); + *(vint16mf2_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vint16mf2_t v = *(vint16mf2_t*)(in + i); + *(vint16mf2_t*)(out + i) = v; + } +} + +void f6 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint32mf2_t v = *(vint32mf2_t*)(in + 100); + *(vint32mf2_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vint32mf2_t v = *(vint32mf2_t*)(in + i); + *(vint32mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c new file mode 100644 index 00000000000..ecf68f24b4d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c @@ -0,0 +1,155 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 100); + *(vuint8mf8_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 200); + *(vuint8mf8_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vuint8mf8_t v = *(vuint8mf8_t*)(in + i); + *(vuint8mf8_t*)(out + i) = v; + } +} + +void f2 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 100); + *(vuint8mf4_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 200); + *(vuint8mf4_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vuint8mf4_t v = *(vuint8mf4_t*)(in + i); + *(vuint8mf4_t*)(out + i) = v; + } +} + +void f3 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 100); + *(vuint8mf2_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 200); + *(vuint8mf2_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vuint8mf2_t v = *(vuint8mf2_t*)(in + i); + *(vuint8mf2_t*)(out + i) = v; + } +} + +void f4 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 100); + *(vuint16mf4_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 200); + *(vuint16mf4_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vuint16mf4_t v = *(vuint16mf4_t*)(in + i); + *(vuint16mf4_t*)(out + i) = v; + } +} + +void f5 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 100); + *(vuint16mf2_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 200); + *(vuint16mf2_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vuint16mf2_t v = *(vuint16mf2_t*)(in + i); + *(vuint16mf2_t*)(out + i) = v; + } +} + +void f6 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 100); + *(vuint32mf2_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 200); + *(vuint32mf2_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + i); + *(vuint32mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c new file mode 100644 index 00000000000..87ae0f59684 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 100); + *(vuint32mf2_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 200); + *(vuint32mf2_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + i); + *(vuint32mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c new file mode 100644 index 00000000000..b87c64bcef1 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c @@ -0,0 +1,180 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool64_t v = *(vbool64_t*)(in + 100); + *(vbool64_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vbool64_t v = *(vbool64_t*)(in + 200); + *(vbool64_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vbool64_t v = *(vbool64_t*)(in + i); + *(vbool64_t*)(out + i) = v; + } +} + +void f2 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool32_t v = *(vbool32_t*)(in + 100); + *(vbool32_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vbool32_t v = *(vbool32_t*)(in + 200); + *(vbool32_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vbool32_t v = *(vbool32_t*)(in + i); + *(vbool32_t*)(out + i) = v; + } +} + +void f3 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool16_t v = *(vbool16_t*)(in + 100); + *(vbool16_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vbool16_t v = *(vbool16_t*)(in + 200); + *(vbool16_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vbool16_t v = *(vbool16_t*)(in + i); + *(vbool16_t*)(out + i) = v; + } +} + +void f4 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool8_t v = *(vbool8_t*)(in + 100); + *(vbool8_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vbool8_t v = *(vbool8_t*)(in + 200); + *(vbool8_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vbool8_t v = *(vbool8_t*)(in + i); + *(vbool8_t*)(out + i) = v; + } +} + +void f5 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool4_t v = *(vbool4_t*)(in + 100); + *(vbool4_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vbool4_t v = *(vbool4_t*)(in + 200); + *(vbool4_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vbool4_t v = *(vbool4_t*)(in + i); + *(vbool4_t*)(out + i) = v; + } +} + +void f6 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool2_t v = *(vbool2_t*)(in + 100); + *(vbool2_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vbool2_t v = *(vbool2_t*)(in + 200); + *(vbool2_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vbool2_t v = *(vbool2_t*)(in + i); + *(vbool2_t*)(out + i) = v; + } +} + +void f7 (int * restrict in, int * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool1_t v = *(vbool1_t*)(in + 100); + *(vbool1_t*)(out + 100) = v; + } + else + { + if (cond == 2) + { + vbool1_t v = *(vbool1_t*)(in + 200); + *(vbool1_t*)(out + 200) = v; + out[1000] = 8000; + } + } + for (int i = 0; i < n; i++) + { + vbool1_t v = *(vbool1_t*)(in + i); + *(vbool1_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c new file mode 100644 index 00000000000..a3ed7d82a19 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c @@ -0,0 +1,572 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool64_t v = *(vbool64_t*)(in + 500); + *(vbool64_t*)(out + 500) = v; + } else if (n == 1) { + vbool64_t v = *(vbool64_t*)(in + 600); + *(vbool64_t*)(out + 600) = v; + } else { + vbool64_t v = *(vbool64_t*)(in + 700); + *(vbool64_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool64_t v = *(vbool64_t*)(in + 900 + i); + *(vbool64_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vbool64_t v = *(vbool64_t*)(in + 500); + *(vbool64_t*)(out + 500) = v; + } else if (n == 1) { + vbool64_t v = *(vbool64_t*)(in + 600); + *(vbool64_t*)(out + 600) = v; + } else { + vbool64_t v = *(vbool64_t*)(in + 700); + *(vbool64_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool64_t v = *(vbool64_t*)(in + 900 + i); + *(vbool64_t*)(out + 900 + i) = v; + } +} + +void f2 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool32_t v = *(vbool32_t*)(in + 500); + *(vbool32_t*)(out + 500) = v; + } else if (n == 1) { + vbool32_t v = *(vbool32_t*)(in + 600); + *(vbool32_t*)(out + 600) = v; + } else { + vbool32_t v = *(vbool32_t*)(in + 700); + *(vbool32_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool32_t v = *(vbool32_t*)(in + 900 + i); + *(vbool32_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vbool32_t v = *(vbool32_t*)(in + 500); + *(vbool32_t*)(out + 500) = v; + } else if (n == 1) { + vbool32_t v = *(vbool32_t*)(in + 600); + *(vbool32_t*)(out + 600) = v; + } else { + vbool32_t v = *(vbool32_t*)(in + 700); + *(vbool32_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool32_t v = *(vbool32_t*)(in + 900 + i); + *(vbool32_t*)(out + 900 + i) = v; + } +} + +void f3 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool16_t v = *(vbool16_t*)(in + 500); + *(vbool16_t*)(out + 500) = v; + } else if (n == 1) { + vbool16_t v = *(vbool16_t*)(in + 600); + *(vbool16_t*)(out + 600) = v; + } else { + vbool16_t v = *(vbool16_t*)(in + 700); + *(vbool16_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool16_t v = *(vbool16_t*)(in + 900 + i); + *(vbool16_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vbool16_t v = *(vbool16_t*)(in + 500); + *(vbool16_t*)(out + 500) = v; + } else if (n == 1) { + vbool16_t v = *(vbool16_t*)(in + 600); + *(vbool16_t*)(out + 600) = v; + } else { + vbool16_t v = *(vbool16_t*)(in + 700); + *(vbool16_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool16_t v = *(vbool16_t*)(in + 900 + i); + *(vbool16_t*)(out + 900 + i) = v; + } +} + +void f4 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool8_t v = *(vbool8_t*)(in + 500); + *(vbool8_t*)(out + 500) = v; + } else if (n == 1) { + vbool8_t v = *(vbool8_t*)(in + 600); + *(vbool8_t*)(out + 600) = v; + } else { + vbool8_t v = *(vbool8_t*)(in + 700); + *(vbool8_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool8_t v = *(vbool8_t*)(in + 900 + i); + *(vbool8_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vbool8_t v = *(vbool8_t*)(in + 500); + *(vbool8_t*)(out + 500) = v; + } else if (n == 1) { + vbool8_t v = *(vbool8_t*)(in + 600); + *(vbool8_t*)(out + 600) = v; + } else { + vbool8_t v = *(vbool8_t*)(in + 700); + *(vbool8_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool8_t v = *(vbool8_t*)(in + 900 + i); + *(vbool8_t*)(out + 900 + i) = v; + } +} + +void f5 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool4_t v = *(vbool4_t*)(in + 500); + *(vbool4_t*)(out + 500) = v; + } else if (n == 1) { + vbool4_t v = *(vbool4_t*)(in + 600); + *(vbool4_t*)(out + 600) = v; + } else { + vbool4_t v = *(vbool4_t*)(in + 700); + *(vbool4_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool4_t v = *(vbool4_t*)(in + 900 + i); + *(vbool4_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vbool4_t v = *(vbool4_t*)(in + 500); + *(vbool4_t*)(out + 500) = v; + } else if (n == 1) { + vbool4_t v = *(vbool4_t*)(in + 600); + *(vbool4_t*)(out + 600) = v; + } else { + vbool4_t v = *(vbool4_t*)(in + 700); + *(vbool4_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool4_t v = *(vbool4_t*)(in + 900 + i); + *(vbool4_t*)(out + 900 + i) = v; + } +} + +void f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool2_t v = *(vbool2_t*)(in + 500); + *(vbool2_t*)(out + 500) = v; + } else if (n == 1) { + vbool2_t v = *(vbool2_t*)(in + 600); + *(vbool2_t*)(out + 600) = v; + } else { + vbool2_t v = *(vbool2_t*)(in + 700); + *(vbool2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool2_t v = *(vbool2_t*)(in + 900 + i); + *(vbool2_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vbool2_t v = *(vbool2_t*)(in + 500); + *(vbool2_t*)(out + 500) = v; + } else if (n == 1) { + vbool2_t v = *(vbool2_t*)(in + 600); + *(vbool2_t*)(out + 600) = v; + } else { + vbool2_t v = *(vbool2_t*)(in + 700); + *(vbool2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool2_t v = *(vbool2_t*)(in + 900 + i); + *(vbool2_t*)(out + 900 + i) = v; + } +} + +void f7 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool1_t v = *(vbool1_t*)(in + 500); + *(vbool1_t*)(out + 500) = v; + } else if (n == 1) { + vbool1_t v = *(vbool1_t*)(in + 600); + *(vbool1_t*)(out + 600) = v; + } else { + vbool1_t v = *(vbool1_t*)(in + 700); + *(vbool1_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool1_t v = *(vbool1_t*)(in + 900 + i); + *(vbool1_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vbool1_t v = *(vbool1_t*)(in + 500); + *(vbool1_t*)(out + 500) = v; + } else if (n == 1) { + vbool1_t v = *(vbool1_t*)(in + 600); + *(vbool1_t*)(out + 600) = v; + } else { + vbool1_t v = *(vbool1_t*)(in + 700); + *(vbool1_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool1_t v = *(vbool1_t*)(in + 900 + i); + *(vbool1_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c new file mode 100644 index 00000000000..ae6fa93bdfb --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c @@ -0,0 +1,492 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + 500); + *(vint8mf8_t*)(out + 500) = v; + } else if (n == 1) { + vint8mf8_t v = *(vint8mf8_t*)(in + 600); + *(vint8mf8_t*)(out + 600) = v; + } else { + vint8mf8_t v = *(vint8mf8_t*)(in + 700); + *(vint8mf8_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 900 + i); + *(vint8mf8_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + 500); + *(vint8mf8_t*)(out + 500) = v; + } else if (n == 1) { + vint8mf8_t v = *(vint8mf8_t*)(in + 600); + *(vint8mf8_t*)(out + 600) = v; + } else { + vint8mf8_t v = *(vint8mf8_t*)(in + 700); + *(vint8mf8_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 900 + i); + *(vint8mf8_t*)(out + 900 + i) = v; + } +} + +void f2 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint8mf4_t v = *(vint8mf4_t*)(in + 500); + *(vint8mf4_t*)(out + 500) = v; + } else if (n == 1) { + vint8mf4_t v = *(vint8mf4_t*)(in + 600); + *(vint8mf4_t*)(out + 600) = v; + } else { + vint8mf4_t v = *(vint8mf4_t*)(in + 700); + *(vint8mf4_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf4_t v = *(vint8mf4_t*)(in + 900 + i); + *(vint8mf4_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vint8mf4_t v = *(vint8mf4_t*)(in + 500); + *(vint8mf4_t*)(out + 500) = v; + } else if (n == 1) { + vint8mf4_t v = *(vint8mf4_t*)(in + 600); + *(vint8mf4_t*)(out + 600) = v; + } else { + vint8mf4_t v = *(vint8mf4_t*)(in + 700); + *(vint8mf4_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf4_t v = *(vint8mf4_t*)(in + 900 + i); + *(vint8mf4_t*)(out + 900 + i) = v; + } +} + +void f3 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint8mf2_t v = *(vint8mf2_t*)(in + 500); + *(vint8mf2_t*)(out + 500) = v; + } else if (n == 1) { + vint8mf2_t v = *(vint8mf2_t*)(in + 600); + *(vint8mf2_t*)(out + 600) = v; + } else { + vint8mf2_t v = *(vint8mf2_t*)(in + 700); + *(vint8mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf2_t v = *(vint8mf2_t*)(in + 900 + i); + *(vint8mf2_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vint8mf2_t v = *(vint8mf2_t*)(in + 500); + *(vint8mf2_t*)(out + 500) = v; + } else if (n == 1) { + vint8mf2_t v = *(vint8mf2_t*)(in + 600); + *(vint8mf2_t*)(out + 600) = v; + } else { + vint8mf2_t v = *(vint8mf2_t*)(in + 700); + *(vint8mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf2_t v = *(vint8mf2_t*)(in + 900 + i); + *(vint8mf2_t*)(out + 900 + i) = v; + } +} + +void f4 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint16mf4_t v = *(vint16mf4_t*)(in + 500); + *(vint16mf4_t*)(out + 500) = v; + } else if (n == 1) { + vint16mf4_t v = *(vint16mf4_t*)(in + 600); + *(vint16mf4_t*)(out + 600) = v; + } else { + vint16mf4_t v = *(vint16mf4_t*)(in + 700); + *(vint16mf4_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf4_t v = *(vint16mf4_t*)(in + 900 + i); + *(vint16mf4_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vint16mf4_t v = *(vint16mf4_t*)(in + 500); + *(vint16mf4_t*)(out + 500) = v; + } else if (n == 1) { + vint16mf4_t v = *(vint16mf4_t*)(in + 600); + *(vint16mf4_t*)(out + 600) = v; + } else { + vint16mf4_t v = *(vint16mf4_t*)(in + 700); + *(vint16mf4_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf4_t v = *(vint16mf4_t*)(in + 900 + i); + *(vint16mf4_t*)(out + 900 + i) = v; + } +} + +void f5 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint16mf2_t v = *(vint16mf2_t*)(in + 500); + *(vint16mf2_t*)(out + 500) = v; + } else if (n == 1) { + vint16mf2_t v = *(vint16mf2_t*)(in + 600); + *(vint16mf2_t*)(out + 600) = v; + } else { + vint16mf2_t v = *(vint16mf2_t*)(in + 700); + *(vint16mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf2_t v = *(vint16mf2_t*)(in + 900 + i); + *(vint16mf2_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vint16mf2_t v = *(vint16mf2_t*)(in + 500); + *(vint16mf2_t*)(out + 500) = v; + } else if (n == 1) { + vint16mf2_t v = *(vint16mf2_t*)(in + 600); + *(vint16mf2_t*)(out + 600) = v; + } else { + vint16mf2_t v = *(vint16mf2_t*)(in + 700); + *(vint16mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf2_t v = *(vint16mf2_t*)(in + 900 + i); + *(vint16mf2_t*)(out + 900 + i) = v; + } +} + +void f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint32mf2_t v = *(vint32mf2_t*)(in + 500); + *(vint32mf2_t*)(out + 500) = v; + } else if (n == 1) { + vint32mf2_t v = *(vint32mf2_t*)(in + 600); + *(vint32mf2_t*)(out + 600) = v; + } else { + vint32mf2_t v = *(vint32mf2_t*)(in + 700); + *(vint32mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 900 + i); + *(vint32mf2_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vint32mf2_t v = *(vint32mf2_t*)(in + 500); + *(vint32mf2_t*)(out + 500) = v; + } else if (n == 1) { + vint32mf2_t v = *(vint32mf2_t*)(in + 600); + *(vint32mf2_t*)(out + 600) = v; + } else { + vint32mf2_t v = *(vint32mf2_t*)(in + 700); + *(vint32mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 900 + i); + *(vint32mf2_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c new file mode 100644 index 00000000000..e0495653047 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c @@ -0,0 +1,491 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 500); + *(vuint8mf8_t*)(out + 500) = v; + } else if (n == 1) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 600); + *(vuint8mf8_t*)(out + 600) = v; + } else { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 700); + *(vuint8mf8_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 900 + i); + *(vuint8mf8_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 500); + *(vuint8mf8_t*)(out + 500) = v; + } else if (n == 1) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 600); + *(vuint8mf8_t*)(out + 600) = v; + } else { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 700); + *(vuint8mf8_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 900 + i); + *(vuint8mf8_t*)(out + 900 + i) = v; + } +} + +void f2 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 500); + *(vuint8mf4_t*)(out + 500) = v; + } else if (n == 1) { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 600); + *(vuint8mf4_t*)(out + 600) = v; + } else { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 700); + *(vuint8mf4_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 900 + i); + *(vuint8mf4_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 500); + *(vuint8mf4_t*)(out + 500) = v; + } else if (n == 1) { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 600); + *(vuint8mf4_t*)(out + 600) = v; + } else { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 700); + *(vuint8mf4_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 900 + i); + *(vuint8mf4_t*)(out + 900 + i) = v; + } +} + +void f3 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 500); + *(vuint8mf2_t*)(out + 500) = v; + } else if (n == 1) { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 600); + *(vuint8mf2_t*)(out + 600) = v; + } else { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 700); + *(vuint8mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 900 + i); + *(vuint8mf2_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 500); + *(vuint8mf2_t*)(out + 500) = v; + } else if (n == 1) { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 600); + *(vuint8mf2_t*)(out + 600) = v; + } else { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 700); + *(vuint8mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 900 + i); + *(vuint8mf2_t*)(out + 900 + i) = v; + } +} + +void f4 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 500); + *(vuint16mf4_t*)(out + 500) = v; + } else if (n == 1) { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 600); + *(vuint16mf4_t*)(out + 600) = v; + } else { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 700); + *(vuint16mf4_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 900 + i); + *(vuint16mf4_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 500); + *(vuint16mf4_t*)(out + 500) = v; + } else if (n == 1) { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 600); + *(vuint16mf4_t*)(out + 600) = v; + } else { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 700); + *(vuint16mf4_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 900 + i); + *(vuint16mf4_t*)(out + 900 + i) = v; + } +} + +void f5 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 500); + *(vuint16mf2_t*)(out + 500) = v; + } else if (n == 1) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 600); + *(vuint16mf2_t*)(out + 600) = v; + } else { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 700); + *(vuint16mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 900 + i); + *(vuint16mf2_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 500); + *(vuint16mf2_t*)(out + 500) = v; + } else if (n == 1) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 600); + *(vuint16mf2_t*)(out + 600) = v; + } else { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 700); + *(vuint16mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 900 + i); + *(vuint16mf2_t*)(out + 900 + i) = v; + } +} + +void f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 500); + *(vuint32mf2_t*)(out + 500) = v; + } else if (n == 1) { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 600); + *(vuint32mf2_t*)(out + 600) = v; + } else { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 700); + *(vuint32mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 900 + i); + *(vuint32mf2_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 500); + *(vuint32mf2_t*)(out + 500) = v; + } else if (n == 1) { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 600); + *(vuint32mf2_t*)(out + 600) = v; + } else { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 700); + *(vuint32mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 900 + i); + *(vuint32mf2_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c new file mode 100644 index 00000000000..c64572ec911 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c @@ -0,0 +1,86 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 500); + *(vfloat32mf2_t*)(out + 500) = v; + } else if (n == 1) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 600); + *(vfloat32mf2_t*)(out + 600) = v; + } else { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 700); + *(vfloat32mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 900 + i); + *(vfloat32mf2_t*)(out + 900 + i) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + if (n == 0) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 500); + *(vfloat32mf2_t*)(out + 500) = v; + } else if (n == 1) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 600); + *(vfloat32mf2_t*)(out + 600) = v; + } else { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 700); + *(vfloat32mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 900 + i); + *(vfloat32mf2_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c new file mode 100644 index 00000000000..b52cae3bb51 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c @@ -0,0 +1,35 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 500); + *(vfloat32mf2_t*)(out + 500) = v; + } else if (n == 1) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 600); + *(vfloat32mf2_t*)(out + 600) = v; + } else { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 700); + *(vfloat32mf2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 900 + i); + *(vfloat32mf2_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-4.c new file mode 100644 index 00000000000..c61d38e1476 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-4.c @@ -0,0 +1,210 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool64_t v = *(vbool64_t*)(in + 500); + *(vbool64_t*)(out + 500) = v; + } else if (n == 1) { + vbool64_t v = *(vbool64_t*)(in + 600); + *(vbool64_t*)(out + 600) = v; + } else { + vbool64_t v = *(vbool64_t*)(in + 700); + *(vbool64_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool64_t v = *(vbool64_t*)(in + 900 + i); + *(vbool64_t*)(out + 900 + i) = v; + } +} + +void f2 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool32_t v = *(vbool32_t*)(in + 500); + *(vbool32_t*)(out + 500) = v; + } else if (n == 1) { + vbool32_t v = *(vbool32_t*)(in + 600); + *(vbool32_t*)(out + 600) = v; + } else { + vbool32_t v = *(vbool32_t*)(in + 700); + *(vbool32_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool32_t v = *(vbool32_t*)(in + 900 + i); + *(vbool32_t*)(out + 900 + i) = v; + } +} + +void f3 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool16_t v = *(vbool16_t*)(in + 500); + *(vbool16_t*)(out + 500) = v; + } else if (n == 1) { + vbool16_t v = *(vbool16_t*)(in + 600); + *(vbool16_t*)(out + 600) = v; + } else { + vbool16_t v = *(vbool16_t*)(in + 700); + *(vbool16_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool16_t v = *(vbool16_t*)(in + 900 + i); + *(vbool16_t*)(out + 900 + i) = v; + } +} + +void f4 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool8_t v = *(vbool8_t*)(in + 500); + *(vbool8_t*)(out + 500) = v; + } else if (n == 1) { + vbool8_t v = *(vbool8_t*)(in + 600); + *(vbool8_t*)(out + 600) = v; + } else { + vbool8_t v = *(vbool8_t*)(in + 700); + *(vbool8_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool8_t v = *(vbool8_t*)(in + 900 + i); + *(vbool8_t*)(out + 900 + i) = v; + } +} + +void f5 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool4_t v = *(vbool4_t*)(in + 500); + *(vbool4_t*)(out + 500) = v; + } else if (n == 1) { + vbool4_t v = *(vbool4_t*)(in + 600); + *(vbool4_t*)(out + 600) = v; + } else { + vbool4_t v = *(vbool4_t*)(in + 700); + *(vbool4_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool4_t v = *(vbool4_t*)(in + 900 + i); + *(vbool4_t*)(out + 900 + i) = v; + } +} + +void f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool2_t v = *(vbool2_t*)(in + 500); + *(vbool2_t*)(out + 500) = v; + } else if (n == 1) { + vbool2_t v = *(vbool2_t*)(in + 600); + *(vbool2_t*)(out + 600) = v; + } else { + vbool2_t v = *(vbool2_t*)(in + 700); + *(vbool2_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool2_t v = *(vbool2_t*)(in + 900 + i); + *(vbool2_t*)(out + 900 + i) = v; + } +} + +void f7 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool1_t v = *(vbool1_t*)(in + 500); + *(vbool1_t*)(out + 500) = v; + } else if (n == 1) { + vbool1_t v = *(vbool1_t*)(in + 600); + *(vbool1_t*)(out + 600) = v; + } else { + vbool1_t v = *(vbool1_t*)(in + 700); + *(vbool1_t*)(out + 700) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool1_t v = *(vbool1_t*)(in + 900 + i); + *(vbool1_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 6 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O2" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c new file mode 100644 index 00000000000..f59b4eeacb1 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c @@ -0,0 +1,167 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + 500); + *(vint8mf8_t*)(out + 500) = v; + } else if (n == 1) { + vint8mf8_t v = *(vint8mf8_t*)(in + 600); + *(vint8mf8_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 900 + i); + *(vint8mf8_t*)(out + 900 + i) = v; + } +} + +void f2 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint8mf4_t v = *(vint8mf4_t*)(in + 500); + *(vint8mf4_t*)(out + 500) = v; + } else if (n == 1) { + vint8mf4_t v = *(vint8mf4_t*)(in + 600); + *(vint8mf4_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf4_t v = *(vint8mf4_t*)(in + 900 + i); + *(vint8mf4_t*)(out + 900 + i) = v; + } +} + +void f3 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint8mf2_t v = *(vint8mf2_t*)(in + 500); + *(vint8mf2_t*)(out + 500) = v; + } else if (n == 1) { + vint8mf2_t v = *(vint8mf2_t*)(in + 600); + *(vint8mf2_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf2_t v = *(vint8mf2_t*)(in + 900 + i); + *(vint8mf2_t*)(out + 900 + i) = v; + } +} + +void f4 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint16mf4_t v = *(vint16mf4_t*)(in + 500); + *(vint16mf4_t*)(out + 500) = v; + } else if (n == 1) { + vint16mf4_t v = *(vint16mf4_t*)(in + 600); + *(vint16mf4_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf4_t v = *(vint16mf4_t*)(in + 900 + i); + *(vint16mf4_t*)(out + 900 + i) = v; + } +} + +void f5 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint16mf2_t v = *(vint16mf2_t*)(in + 500); + *(vint16mf2_t*)(out + 500) = v; + } else if (n == 1) { + vint16mf2_t v = *(vint16mf2_t*)(in + 600); + *(vint16mf2_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf2_t v = *(vint16mf2_t*)(in + 900 + i); + *(vint16mf2_t*)(out + 900 + i) = v; + } +} + +void f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint32mf2_t v = *(vint32mf2_t*)(in + 500); + *(vint32mf2_t*)(out + 500) = v; + } else if (n == 1) { + vint32mf2_t v = *(vint32mf2_t*)(in + 600); + *(vint32mf2_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 900 + i); + *(vint32mf2_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c new file mode 100644 index 00000000000..ac9ae26184a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c @@ -0,0 +1,167 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + 500); + *(vint8mf8_t*)(out + 500) = v; + } else if (n == 1) { + vint8mf8_t v = *(vint8mf8_t*)(in + 600); + *(vint8mf8_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 900 + i); + *(vint8mf8_t*)(out + 900 + i) = v; + } +} + +void f2 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint8mf4_t v = *(vint8mf4_t*)(in + 500); + *(vint8mf4_t*)(out + 500) = v; + } else if (n == 1) { + vint8mf4_t v = *(vint8mf4_t*)(in + 600); + *(vint8mf4_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf4_t v = *(vint8mf4_t*)(in + 900 + i); + *(vint8mf4_t*)(out + 900 + i) = v; + } +} + +void f3 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint8mf2_t v = *(vint8mf2_t*)(in + 500); + *(vint8mf2_t*)(out + 500) = v; + } else if (n == 1) { + vint8mf2_t v = *(vint8mf2_t*)(in + 600); + *(vint8mf2_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf2_t v = *(vint8mf2_t*)(in + 900 + i); + *(vint8mf2_t*)(out + 900 + i) = v; + } +} + +void f4 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint16mf4_t v = *(vint16mf4_t*)(in + 500); + *(vint16mf4_t*)(out + 500) = v; + } else if (n == 1) { + vint16mf4_t v = *(vint16mf4_t*)(in + 600); + *(vint16mf4_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf4_t v = *(vint16mf4_t*)(in + 900 + i); + *(vint16mf4_t*)(out + 900 + i) = v; + } +} + +void f5 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vint16mf2_t v = *(vint16mf2_t*)(in + 500); + *(vint16mf2_t*)(out + 500) = v; + } else if (n == 1) { + vint16mf2_t v = *(vint16mf2_t*)(in + 600); + *(vint16mf2_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf2_t v = *(vint16mf2_t*)(in + 900 + i); + *(vint16mf2_t*)(out + 900 + i) = v; + } +} + +void f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 500); + *(vuint32mf2_t*)(out + 500) = v; + } else if (n == 1) { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 600); + *(vuint32mf2_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 900 + i); + *(vuint32mf2_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c new file mode 100644 index 00000000000..832404d49cd --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 500); + *(vfloat32mf2_t*)(out + 500) = v; + } else if (n == 1) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 600); + *(vfloat32mf2_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 900 + i); + *(vfloat32mf2_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c new file mode 100644 index 00000000000..6f29253b3b7 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c @@ -0,0 +1,194 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool64_t v = *(vbool64_t*)(in + 500); + *(vbool64_t*)(out + 500) = v; + } else if (n == 1) { + vbool64_t v = *(vbool64_t*)(in + 600); + *(vbool64_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool64_t v = *(vbool64_t*)(in + 900 + i); + *(vbool64_t*)(out + 900 + i) = v; + } +} + +void f2 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool32_t v = *(vbool32_t*)(in + 500); + *(vbool32_t*)(out + 500) = v; + } else if (n == 1) { + vbool32_t v = *(vbool32_t*)(in + 600); + *(vbool32_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool32_t v = *(vbool32_t*)(in + 900 + i); + *(vbool32_t*)(out + 900 + i) = v; + } +} + +void f3 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool16_t v = *(vbool16_t*)(in + 500); + *(vbool16_t*)(out + 500) = v; + } else if (n == 1) { + vbool16_t v = *(vbool16_t*)(in + 600); + *(vbool16_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool16_t v = *(vbool16_t*)(in + 900 + i); + *(vbool16_t*)(out + 900 + i) = v; + } +} + +void f4 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool8_t v = *(vbool8_t*)(in + 500); + *(vbool8_t*)(out + 500) = v; + } else if (n == 1) { + vbool8_t v = *(vbool8_t*)(in + 600); + *(vbool8_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool8_t v = *(vbool8_t*)(in + 900 + i); + *(vbool8_t*)(out + 900 + i) = v; + } +} + +void f5 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool4_t v = *(vbool4_t*)(in + 500); + *(vbool4_t*)(out + 500) = v; + } else if (n == 1) { + vbool4_t v = *(vbool4_t*)(in + 600); + *(vbool4_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool4_t v = *(vbool4_t*)(in + 900 + i); + *(vbool4_t*)(out + 900 + i) = v; + } +} + +void f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool2_t v = *(vbool2_t*)(in + 500); + *(vbool2_t*)(out + 500) = v; + } else if (n == 1) { + vbool2_t v = *(vbool2_t*)(in + 600); + *(vbool2_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool2_t v = *(vbool2_t*)(in + 900 + i); + *(vbool2_t*)(out + 900 + i) = v; + } +} + +void f7 (int8_t * restrict in, int8_t * restrict out, int n) +{ + if (n == 0) { + vbool1_t v = *(vbool1_t*)(in + 500); + *(vbool1_t*)(out + 500) = v; + } else if (n == 1) { + vbool1_t v = *(vbool1_t*)(in + 600); + *(vbool1_t*)(out + 600) = v; + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool1_t v = *(vbool1_t*)(in + 900 + i); + *(vbool1_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+\.L[0-9][0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c new file mode 100644 index 00000000000..7b0924de69e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c @@ -0,0 +1,230 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vint8mf8_t v = *(vint8mf8_t*)(in + 500); + *(vint8mf8_t*)(out + 500) = v; + break; + } + case 1:{ + vint8mf8_t v = *(vint8mf8_t*)(in + 500); + *(vint8mf8_t*)(out + 500) = v; + break; + } + default:{ + vint8mf8_t v = *(vint8mf8_t*)(in + 700); + *(vint8mf8_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 900 + i); + *(vint8mf8_t*)(out + 900 + i) = v; + } +} + +void f2 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vint8mf4_t v = *(vint8mf4_t*)(in + 500); + *(vint8mf4_t*)(out + 500) = v; + break; + } + case 1:{ + vint8mf4_t v = *(vint8mf4_t*)(in + 500); + *(vint8mf4_t*)(out + 500) = v; + break; + } + default:{ + vint8mf4_t v = *(vint8mf4_t*)(in + 700); + *(vint8mf4_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf4_t v = *(vint8mf4_t*)(in + 900 + i); + *(vint8mf4_t*)(out + 900 + i) = v; + } +} + +void f3 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vint8mf2_t v = *(vint8mf2_t*)(in + 500); + *(vint8mf2_t*)(out + 500) = v; + break; + } + case 1:{ + vint8mf2_t v = *(vint8mf2_t*)(in + 500); + *(vint8mf2_t*)(out + 500) = v; + break; + } + default:{ + vint8mf2_t v = *(vint8mf2_t*)(in + 700); + *(vint8mf2_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf2_t v = *(vint8mf2_t*)(in + 900 + i); + *(vint8mf2_t*)(out + 900 + i) = v; + } +} + +void f4 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vint16mf4_t v = *(vint16mf4_t*)(in + 500); + *(vint16mf4_t*)(out + 500) = v; + break; + } + case 1:{ + vint16mf4_t v = *(vint16mf4_t*)(in + 500); + *(vint16mf4_t*)(out + 500) = v; + break; + } + default:{ + vint16mf4_t v = *(vint16mf4_t*)(in + 700); + *(vint16mf4_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf4_t v = *(vint16mf4_t*)(in + 900 + i); + *(vint16mf4_t*)(out + 900 + i) = v; + } +} + +void f5 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vint16mf2_t v = *(vint16mf2_t*)(in + 500); + *(vint16mf2_t*)(out + 500) = v; + break; + } + case 1:{ + vint16mf2_t v = *(vint16mf2_t*)(in + 500); + *(vint16mf2_t*)(out + 500) = v; + break; + } + default:{ + vint16mf2_t v = *(vint16mf2_t*)(in + 700); + *(vint16mf2_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf2_t v = *(vint16mf2_t*)(in + 900 + i); + *(vint16mf2_t*)(out + 900 + i) = v; + } +} + +void f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + switch (n) + { + case 0:{ + vint32mf2_t v = *(vint32mf2_t*)(in + 500); + *(vint32mf2_t*)(out + 500) = v; + break; + } + case 1:{ + vint32mf2_t v = *(vint32mf2_t*)(in + 500); + *(vint32mf2_t*)(out + 500) = v; + break; + } + default:{ + vint32mf2_t v = *(vint32mf2_t*)(in + 700); + *(vint32mf2_t*)(out + 700) = v; + break; + } + } + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 900 + i); + *(vint32mf2_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ +/* { dg-final { scan-assembler-times {add\ta[0-7],a[0-7],a[0-7]\s+\.L[0-9][0-9][0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-O1" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-1.c new file mode 100644 index 00000000000..ca501e0e1a1 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-1.c @@ -0,0 +1,239 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void fn3 (void); + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vbool64_t v = *(vbool64_t*)(in + 900 + i); + *(vbool64_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool64_t v = *(vbool64_t*)(in + 900 + i); + *(vbool64_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool64_t v = *(vbool64_t*)(in + 900 + i); + *(vbool64_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vbool64_t v = *(vbool64_t*)(in + 900 + i); + *(vbool64_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vbool64_t v = *(vbool64_t*)(in + 900 + i); + *(vbool64_t*)(out + 900 + i) = v; + } + +} + +int f2 (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vbool32_t v = *(vbool32_t*)(in + 900 + i); + *(vbool32_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool32_t v = *(vbool32_t*)(in + 900 + i); + *(vbool32_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool32_t v = *(vbool32_t*)(in + 900 + i); + *(vbool32_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vbool32_t v = *(vbool32_t*)(in + 900 + i); + *(vbool32_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vbool32_t v = *(vbool32_t*)(in + 900 + i); + *(vbool32_t*)(out + 900 + i) = v; + } + +} + +int f3 (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vbool16_t v = *(vbool16_t*)(in + 900 + i); + *(vbool16_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool16_t v = *(vbool16_t*)(in + 900 + i); + *(vbool16_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool16_t v = *(vbool16_t*)(in + 900 + i); + *(vbool16_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vbool16_t v = *(vbool16_t*)(in + 900 + i); + *(vbool16_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vbool16_t v = *(vbool16_t*)(in + 900 + i); + *(vbool16_t*)(out + 900 + i) = v; + } + +} + +int f4 (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vbool8_t v = *(vbool8_t*)(in + 900 + i); + *(vbool8_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool8_t v = *(vbool8_t*)(in + 900 + i); + *(vbool8_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool8_t v = *(vbool8_t*)(in + 900 + i); + *(vbool8_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vbool8_t v = *(vbool8_t*)(in + 900 + i); + *(vbool8_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vbool8_t v = *(vbool8_t*)(in + 900 + i); + *(vbool8_t*)(out + 900 + i) = v; + } + +} + +int f5 (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vbool4_t v = *(vbool4_t*)(in + 900 + i); + *(vbool4_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool4_t v = *(vbool4_t*)(in + 900 + i); + *(vbool4_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool4_t v = *(vbool4_t*)(in + 900 + i); + *(vbool4_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vbool4_t v = *(vbool4_t*)(in + 900 + i); + *(vbool4_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vbool4_t v = *(vbool4_t*)(in + 900 + i); + *(vbool4_t*)(out + 900 + i) = v; + } + +} + +int f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vbool2_t v = *(vbool2_t*)(in + 900 + i); + *(vbool2_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool2_t v = *(vbool2_t*)(in + 900 + i); + *(vbool2_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool2_t v = *(vbool2_t*)(in + 900 + i); + *(vbool2_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vbool2_t v = *(vbool2_t*)(in + 900 + i); + *(vbool2_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vbool2_t v = *(vbool2_t*)(in + 900 + i); + *(vbool2_t*)(out + 900 + i) = v; + } + +} + +int f7 (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vbool1_t v = *(vbool1_t*)(in + 900 + i); + *(vbool1_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool1_t v = *(vbool1_t*)(in + 900 + i); + *(vbool1_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vbool1_t v = *(vbool1_t*)(in + 900 + i); + *(vbool1_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vbool1_t v = *(vbool1_t*)(in + 900 + i); + *(vbool1_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vbool1_t v = *(vbool1_t*)(in + 900 + i); + *(vbool1_t*)(out + 900 + i) = v; + } + +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+\.L[0-9][0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-2.c new file mode 100644 index 00000000000..69cc50f0219 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-2.c @@ -0,0 +1,207 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void fn3 (void); + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 900 + i); + *(vint8mf8_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 900 + i); + *(vint8mf8_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 900 + i); + *(vint8mf8_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 900 + i); + *(vint8mf8_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf8_t v = *(vint8mf8_t*)(in + 900 + i); + *(vint8mf8_t*)(out + 900 + i) = v; + } + +} + +void f2 (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf4_t v = *(vint8mf4_t*)(in + 900 + i); + *(vint8mf4_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf4_t v = *(vint8mf4_t*)(in + 900 + i); + *(vint8mf4_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf4_t v = *(vint8mf4_t*)(in + 900 + i); + *(vint8mf4_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf4_t v = *(vint8mf4_t*)(in + 900 + i); + *(vint8mf4_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf4_t v = *(vint8mf4_t*)(in + 900 + i); + *(vint8mf4_t*)(out + 900 + i) = v; + } + +} + +void f3 (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf2_t v = *(vint8mf2_t*)(in + 900 + i); + *(vint8mf2_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf2_t v = *(vint8mf2_t*)(in + 900 + i); + *(vint8mf2_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf2_t v = *(vint8mf2_t*)(in + 900 + i); + *(vint8mf2_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf2_t v = *(vint8mf2_t*)(in + 900 + i); + *(vint8mf2_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vint8mf2_t v = *(vint8mf2_t*)(in + 900 + i); + *(vint8mf2_t*)(out + 900 + i) = v; + } + +} + +void f4 (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf4_t v = *(vint16mf4_t*)(in + 900 + i); + *(vint16mf4_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf4_t v = *(vint16mf4_t*)(in + 900 + i); + *(vint16mf4_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf4_t v = *(vint16mf4_t*)(in + 900 + i); + *(vint16mf4_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf4_t v = *(vint16mf4_t*)(in + 900 + i); + *(vint16mf4_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf4_t v = *(vint16mf4_t*)(in + 900 + i); + *(vint16mf4_t*)(out + 900 + i) = v; + } + +} + +void f5 (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf2_t v = *(vint16mf2_t*)(in + 900 + i); + *(vint16mf2_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf2_t v = *(vint16mf2_t*)(in + 900 + i); + *(vint16mf2_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf2_t v = *(vint16mf2_t*)(in + 900 + i); + *(vint16mf2_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf2_t v = *(vint16mf2_t*)(in + 900 + i); + *(vint16mf2_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vint16mf2_t v = *(vint16mf2_t*)(in + 900 + i); + *(vint16mf2_t*)(out + 900 + i) = v; + } + +} + +void f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 900 + i); + *(vint32mf2_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 900 + i); + *(vint32mf2_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 900 + i); + *(vint32mf2_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 900 + i); + *(vint32mf2_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vint32mf2_t v = *(vint32mf2_t*)(in + 900 + i); + *(vint32mf2_t*)(out + 900 + i) = v; + } + +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-3.c new file mode 100644 index 00000000000..3a350486cee --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-3.c @@ -0,0 +1,207 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void fn3 (void); + +void f (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 900 + i); + *(vuint8mf8_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 900 + i); + *(vuint8mf8_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 900 + i); + *(vuint8mf8_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 900 + i); + *(vuint8mf8_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 900 + i); + *(vuint8mf8_t*)(out + 900 + i) = v; + } + +} + +void f2 (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 900 + i); + *(vuint8mf4_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 900 + i); + *(vuint8mf4_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 900 + i); + *(vuint8mf4_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 900 + i); + *(vuint8mf4_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 900 + i); + *(vuint8mf4_t*)(out + 900 + i) = v; + } + +} + +void f3 (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 900 + i); + *(vuint8mf2_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 900 + i); + *(vuint8mf2_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 900 + i); + *(vuint8mf2_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 900 + i); + *(vuint8mf2_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 900 + i); + *(vuint8mf2_t*)(out + 900 + i) = v; + } + +} + +void f4 (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 900 + i); + *(vuint16mf4_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 900 + i); + *(vuint16mf4_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 900 + i); + *(vuint16mf4_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 900 + i); + *(vuint16mf4_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 900 + i); + *(vuint16mf4_t*)(out + 900 + i) = v; + } + +} + +void f5 (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 900 + i); + *(vuint16mf2_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 900 + i); + *(vuint16mf2_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 900 + i); + *(vuint16mf2_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 900 + i); + *(vuint16mf2_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 900 + i); + *(vuint16mf2_t*)(out + 900 + i) = v; + } + +} + +void f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 900 + i); + *(vuint32mf2_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 900 + i); + *(vuint32mf2_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 900 + i); + *(vuint32mf2_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 900 + i); + *(vuint32mf2_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 900 + i); + *(vuint32mf2_t*)(out + 900 + i) = v; + } + +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-4.c new file mode 100644 index 00000000000..178036f780b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-4.c @@ -0,0 +1,39 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void fn3 (void); + +void f6 (int8_t * restrict in, int8_t * restrict out, int n) +{ + for (int i = 0 ; i < n * n * n * n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 900 + i); + *(vfloat32mf2_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 900 + i); + *(vfloat32mf2_t*)(out + 900 + i) = v; + } + fn3 (); + + for (int i = 0 ; i < n * n * n * n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 900 + i); + *(vfloat32mf2_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 900 + i); + *(vfloat32mf2_t*)(out + 900 + i) = v; + } + fn3 (); + for (int i = 0 ; i < n * n * n * n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 900 + i); + *(vfloat32mf2_t*)(out + 900 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-1.c new file mode 100644 index 00000000000..c5962e5a385 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-1.c @@ -0,0 +1,52 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, int cond) +{ + for (size_t i = 0; i < n; i++) + { + if (i % 2) { + + if (cond) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + i + 2000); + *(vfloat32mf2_t*)out = v; + } else { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + i + 3000); + *(vfloat32mf2_t*)out = v; + } + + for (size_t j = 0; j < m; j += 1) { + if (j % 2 == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + i + j + 100); + *(vint8mf8_t*)out = v; + } else { + vint8mf8_t v = *(vint8mf8_t*)(in + i + j + 200); + *(vint8mf8_t*)out = v; + } + } + + if (cond) { + vuint16mf4_t v = *(vuint16mf4_t*)(in + i + 7000); + *(vuint16mf4_t*)out = v; + } else { + vuint16mf4_t v = *(vuint16mf4_t*)(in + i + 8000); + *(vuint16mf4_t*)out = v; + } + } else { + if (cond) { + vint8mf8_t v = *(vint8mf8_t*)(in + i + 4000); + *(vint8mf8_t*)out = v; + } else { + vint8mf8_t v = *(vint8mf8_t*)(in + i + 5000); + *(vint8mf8_t*)out = v; + } + + vbool64_t v = *(vbool64_t*)(in + i + 300); + *(vbool64_t*)out = v; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-2.c new file mode 100644 index 00000000000..9ec4879dade --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-2.c @@ -0,0 +1,56 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, int cond) +{ + for (size_t i = 0; i < n; i++) + { + if (i % 2) { + + if (cond) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + i + 2000); + *(vfloat32mf2_t*)(out + i + 2000) = v; + } else { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + i + 3000); + *(vfloat32mf2_t*)(out + i + 3000) = v; + } + + for (size_t j = 0; j < m; j += 1) { + if (j % 2 == 0) { + vint8mf8_t v = *(vint8mf8_t*)(in + i + j + 100); + *(vint8mf8_t*)(out + i + j + 100) = v; + } else { + vint8mf8_t v = *(vint8mf8_t*)(in + i + j + 200); + *(vint8mf8_t*)(out + i + j + 200) = v; + } + } + + if (cond) { + vuint16mf4_t v = *(vuint16mf4_t*)(in + i + 7000); + *(vuint16mf4_t*)(out + i + 7000) = v; + } else { + vuint16mf4_t v = *(vuint16mf4_t*)(in + i + 8000); + *(vuint16mf4_t*)(out + i + 8000) = v; + } + } else { + if (cond) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + i + 4000); + *(vuint16mf2_t*)(out + i + 4000) = v; + } else { + vuint16mf2_t v = *(vuint16mf2_t*)(in + i + 5000); + *(vuint16mf2_t*)(out + i + 5000) = v; + } + + vbool1_t v = *(vbool1_t*)(in + i + 300); + *(vbool1_t*)(out + i + 300) = v; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli} 5 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-not {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c new file mode 100644 index 00000000000..dff5437da72 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t cond, size_t cond2) +{ + for (size_t i = 0; i < n; i++) + { + if (i != cond) { + vint8mf8_t v = *(vint8mf8_t*)(in + i + 100); + *(vint8mf8_t*)(out + i + 100) = v; + } else { + vbool1_t v = *(vbool1_t*)(in + i + 400); + *(vbool1_t*)(out + i + 400) = v; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {\.L[0-9]+:\s+vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+j\s+\.L[0-9]+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-10.c new file mode 100644 index 00000000000..697b093f69f --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-10.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, size_t cond, size_t cond2) +{ + for (size_t i = 0; i < n; i++) + { + if (i != cond) { + vbool16_t v = *(vbool16_t*)(in + i + 400); + *(vbool16_t*)(out + i + 400) = v; + for (int j = 0; j < m; j++) { + vuint8mf2_t v = *(vuint8mf2_t*)(in + i + 100 + j); + *(vuint8mf2_t*)(out + i + 100 + j) = v; + } + } else if (i == cond2) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + i + 200); + *(vuint16mf2_t*)(out + i + 200) = v; + } else { + vint8mf8_t v = *(vint8mf8_t*)(in + i + 100); + *(vint8mf8_t*)(out + i + 100) = v; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli} 5 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-11.c new file mode 100644 index 00000000000..6ad2dc3f237 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-11.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, size_t cond, size_t cond2) +{ + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*) (in + i + 1); + *(vint8mf8_t*) (out + i + 1) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v = *(vfloat32mf2_t*) (in + i + 2); + *(vfloat32mf2_t*) (out + i + 2) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v; + *(vfloat32mf2_t*) (out + i + 3) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c new file mode 100644 index 00000000000..c01f4b4acae --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c @@ -0,0 +1,39 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f2 (int32_t * restrict in, int32_t * restrict in2, int32_t * restrict out, int32_t * restrict out2, size_t n, size_t m, size_t cond, size_t cond2) +{ + for (int i = 0; i < n; i++){ + out2[i] = in2[i] + out[i]; + } + for (int i = 0; i < n; i++){ + out[i] = in[i] & out2[i]; + } + for (int i = 0; i < n; i++){ + out2[i] = out[i] * out2[i]; + } + for (size_t i = 0; i < n; i++) + { + if (i > cond) { + if (cond2) { + for (int j = 0; j < m; j++) { + vint8mf8_t v2 = *(vint8mf8_t*)(in2 + i + 100 + j); + *(vint8mf8_t*)(out2 + i + 100 + j) = v2; + } + } else { + for (int j = 0; j < m; j++) { + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in2 + i + 300 + j); + *(vfloat32mf2_t*)(out2 + i + 100 + j) = v3; + } + } + } else { + vbool64_t v = *(vbool64_t*)(in + i + 400); + *(vbool64_t*)(out + i + 400) = v; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-2.c new file mode 100644 index 00000000000..d14f9ba34a1 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-2.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t cond, size_t cond2) +{ + for (size_t i = 0; i < n; i++) + { + if (i == cond) { + vint8mf8_t v = *(vint8mf8_t*)(in + i + 100); + *(vint8mf8_t*)(out + i + 100) = v; + } else { + vbool1_t v = *(vbool1_t*)(in + i + 400); + *(vbool1_t*)(out + i + 400) = v; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+\.L[0-9]+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+j\s+\.L[0-9]+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c new file mode 100644 index 00000000000..1ba0234788a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f2 (int32_t * restrict in, int32_t * restrict in2, int32_t * restrict out, int32_t * restrict out2, size_t n, size_t m, size_t cond, size_t cond2) +{ + for (size_t i = 0; i < n; i++) + { + if (i > cond) { + if (cond2) { + for (int j = 0; j < m; j++) { + vint8mf8_t v2 = *(vint8mf8_t*)(in2 + i + 100 + j); + *(vint8mf8_t*)(out2 + i + 100 + j) = v2; + } + } else { + for (int j = 0; j < m; j++) { + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in2 + i + 300 + j); + *(vfloat32mf2_t*)(out2 + i + 100 + j) = v3; + } + } + } else { + vbool64_t v = *(vbool64_t*)(in + i + 400); + *(vbool64_t*)(out + i + 400) = v; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c new file mode 100644 index 00000000000..c86af9d3907 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t cond, size_t cond2) +{ + for (size_t i = 0; i < n; i++) + { + if (i == cond) { + vint8mf8_t v = *(vint8mf8_t*)(in + i + 100); + *(vint8mf8_t*)(out + i + 100) = v; + } else if (i == cond2) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + i + 200); + *(vfloat32mf2_t*)(out + i + 200) = v; + } else { + vbool1_t v = *(vbool1_t*)(in + i + 400); + *(vbool1_t*)(out + i + 400) = v; + } + } +} + + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+\.L[0-9]:+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 5 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c new file mode 100644 index 00000000000..34c40d46466 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t cond, size_t cond2) +{ + for (size_t i = 0; i < n; i++) + { + if (i == cond) { + vint8mf8_t v = *(vint8mf8_t*)(in + i + 100); + *(vint8mf8_t*)(out + i + 100) = v; + } else if (i == cond2) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + i + 200); + *(vfloat32mf2_t*)(out + i + 200) = v; + } else if (i == (cond2 - 1)) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + i + 300); + *(vuint16mf2_t*)(out + i + 300) = v; + } else { + vbool1_t v = *(vbool1_t*)(in + i + 400); + *(vbool1_t*)(out + i + 400) = v; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+\.L[0-9]:+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 7 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c new file mode 100644 index 00000000000..a009aadeecd --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * in, int32_t * out, int n, int cond) +{ + if (cond) { + vint32mf2_t v = *(vint32mf2_t*) (in + 100); + *(vint32mf2_t*) (out + 100) = v; + } else { + vint16mf2_t v = *(vint16mf2_t*) (in + 200); + *(vint16mf2_t*) (out + 200) = v; + } + + for (int i = 0; i < n; i++) { + vint8mf8_t v = *(vint8mf8_t*) (in + 300 + i); + *(vint8mf8_t*) (out + 300 + i) = v; + } +} + +/* { dg-final { scan-assembler-times {\.L[0-9]+:\s+vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]+:} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {\.L[0-9]+:\s+vle8\.v} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c new file mode 100644 index 00000000000..12ec25d5264 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t cond, size_t cond2) +{ + for (size_t i = 0; i < n; i++) + { + if (i != cond) { + vbool1_t v = *(vbool1_t*)(in + i + 400); + *(vbool1_t*)(out + i + 400) = v; + } else if (i == cond2) { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + i + 200); + *(vfloat32mf2_t*)(out + i + 200) = v; + } else { + vint8mf8_t v = *(vint8mf8_t*)(in + i + 100); + *(vint8mf8_t*)(out + i + 100) = v; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {j\s+\.L[0-9]+\s+\.L[0-9]+:\s+vlm\.v} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-8.c new file mode 100644 index 00000000000..a7c9829c646 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-8.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t cond, size_t cond2) +{ + for (size_t i = 0; i < n; i++) + { + if (i != cond) { + vbool1_t v = *(vbool1_t*)(in + i + 400); + *(vbool1_t*)(out + i + 400) = v; + } else if (i == cond2) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + i + 200); + *(vuint16mf2_t*)(out + i + 200) = v; + } else { + vint8mf8_t v = *(vint8mf8_t*)(in + i + 100); + *(vint8mf8_t*)(out + i + 100) = v; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli} 5 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {j\s+\.L[0-9]+\s+\.L[0-9]+:\s+vlm\.v} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-9.c new file mode 100644 index 00000000000..bd6d552b22e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-9.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, size_t cond, size_t cond2) +{ + for (size_t i = 0; i < n; i++) + { + if (i != cond) { + vbool1_t v = *(vbool1_t*)(in + i + 400); + *(vbool1_t*)(out + i + 400) = v; + for (int j = 0; j < m; j++) { + vint32mf2_t v = *(vint32mf2_t*)(in + i + 100 + j); + *(vint32mf2_t*)(out + i + 100 + j) = v; + } + } else if (i == cond2) { + vuint16mf2_t v = *(vuint16mf2_t*)(in + i + 200); + *(vuint16mf2_t*)(out + i + 200) = v; + } else { + vint8mf8_t v = *(vint8mf8_t*)(in + i + 100); + *(vint8mf8_t*)(out + i + 100) = v; + } + } +} + +/* { dg-final { scan-assembler-times {vsetvli} 7 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c new file mode 100644 index 00000000000..d801428004e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint8mf8_t v = *(vint8mf8_t*)(in + 100); + *(vint8mf8_t*)(out + 100) = v; + } + else if (cond == 2) + { + vint8mf8_t v = *(vint8mf8_t*)(in + 200); + *(vint8mf8_t*)(out + 200) = v; + } + else if (cond == 3) + { + vint8mf8_t v = *(vint8mf8_t*)(in + 300); + *(vint8mf8_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vint8mf8_t v = *(vint8mf8_t*)(in + i); + *(vint8mf8_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c new file mode 100644 index 00000000000..d96e9b2d7ab --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 100); + *(vuint16mf2_t*)(out + 100) = v; + } + else if (cond == 2) + { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 200); + *(vuint16mf2_t*)(out + 200) = v; + } + else if (cond == 3) + { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 300); + *(vuint16mf2_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vuint16mf2_t v = *(vuint16mf2_t*)(in + i); + *(vuint16mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c new file mode 100644 index 00000000000..de967f78bc6 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint32mf2_t v = *(vint32mf2_t*)(in + 100); + *(vint32mf2_t*)(out + 100) = v; + } + else if (cond == 2) + { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + 200) = v; + } + else if (cond == 3) + { + vint32mf2_t v = *(vint32mf2_t*)(in + 300); + *(vint32mf2_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vint32mf2_t v = *(vint32mf2_t*)(in + i); + *(vint32mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c new file mode 100644 index 00000000000..8342edb353a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 100); + *(vuint32mf2_t*)(out + 100) = v; + } + else if (cond == 2) + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 200); + *(vuint32mf2_t*)(out + 200) = v; + } + else if (cond == 3) + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 300); + *(vuint32mf2_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + i); + *(vuint32mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c new file mode 100644 index 00000000000..82cd0d36913 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 100); + *(vfloat32mf2_t*)(out + 100) = v; + } + else if (cond == 2) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 200); + *(vfloat32mf2_t*)(out + 200) = v; + } + else if (cond == 3) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 300); + *(vfloat32mf2_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + i); + *(vfloat32mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c new file mode 100644 index 00000000000..5e08b23178b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c @@ -0,0 +1,189 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool64_t v = *(vbool64_t*)(in + 100); + *(vbool64_t*)(out + 100) = v; + } + else if (cond == 2) + { + vbool64_t v = *(vbool64_t*)(in + 200); + *(vbool64_t*)(out + 200) = v; + } + else if (cond == 3) + { + vbool64_t v = *(vbool64_t*)(in + 300); + *(vbool64_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vbool64_t v = *(vbool64_t*)(in + i); + *(vbool64_t*)(out + i) = v; + } +} + +void f2 (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool32_t v = *(vbool32_t*)(in + 100); + *(vbool32_t*)(out + 100) = v; + } + else if (cond == 2) + { + vbool32_t v = *(vbool32_t*)(in + 200); + *(vbool32_t*)(out + 200) = v; + } + else if (cond == 3) + { + vbool32_t v = *(vbool32_t*)(in + 300); + *(vbool32_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vbool32_t v = *(vbool32_t*)(in + i); + *(vbool32_t*)(out + i) = v; + } +} + +void f3 (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool16_t v = *(vbool16_t*)(in + 100); + *(vbool16_t*)(out + 100) = v; + } + else if (cond == 2) + { + vbool16_t v = *(vbool16_t*)(in + 200); + *(vbool16_t*)(out + 200) = v; + } + else if (cond == 3) + { + vbool16_t v = *(vbool16_t*)(in + 300); + *(vbool16_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vbool16_t v = *(vbool16_t*)(in + i); + *(vbool16_t*)(out + i) = v; + } +} + +void f4 (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool8_t v = *(vbool8_t*)(in + 100); + *(vbool8_t*)(out + 100) = v; + } + else if (cond == 2) + { + vbool8_t v = *(vbool8_t*)(in + 200); + *(vbool8_t*)(out + 200) = v; + } + else if (cond == 3) + { + vbool8_t v = *(vbool8_t*)(in + 300); + *(vbool8_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vbool8_t v = *(vbool8_t*)(in + i); + *(vbool8_t*)(out + i) = v; + } +} + +void f5 (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool4_t v = *(vbool4_t*)(in + 100); + *(vbool4_t*)(out + 100) = v; + } + else if (cond == 2) + { + vbool4_t v = *(vbool4_t*)(in + 200); + *(vbool4_t*)(out + 200) = v; + } + else if (cond == 3) + { + vbool4_t v = *(vbool4_t*)(in + 300); + *(vbool4_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vbool4_t v = *(vbool4_t*)(in + i); + *(vbool4_t*)(out + i) = v; + } +} + +void f6 (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool2_t v = *(vbool2_t*)(in + 100); + *(vbool2_t*)(out + 100) = v; + } + else if (cond == 2) + { + vbool2_t v = *(vbool2_t*)(in + 200); + *(vbool2_t*)(out + 200) = v; + } + else if (cond == 3) + { + vbool2_t v = *(vbool2_t*)(in + 300); + *(vbool2_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vbool2_t v = *(vbool2_t*)(in + i); + *(vbool2_t*)(out + i) = v; + } +} + +void f7 (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool1_t v = *(vbool1_t*)(in + 100); + *(vbool1_t*)(out + 100) = v; + } + else if (cond == 2) + { + vbool1_t v = *(vbool1_t*)(in + 200); + *(vbool1_t*)(out + 200) = v; + } + else if (cond == 3) + { + vbool1_t v = *(vbool1_t*)(in + 300); + *(vbool1_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vbool1_t v = *(vbool1_t*)(in + i); + *(vbool1_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]+\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]+\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]+\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+\.L[0-9]+\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+\.L[0-9]+\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+\.L[0-9]+\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+\.L[0-9]+\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-15.c new file mode 100644 index 00000000000..267d1bd5cf6 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-15.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vint8mf8_t v = *(vint8mf8_t*)(in + 100); + *(vint8mf8_t*)(out + 100) = v; + break; + } + case 2:{ + vint8mf8_t v = *(vint8mf8_t*)(in + 200); + *(vint8mf8_t*)(out + 100) = v; + break; + } + case 3:{ + vint8mf8_t v = *(vint8mf8_t*)(in + 300); + *(vint8mf8_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vint8mf8_t v = *(vint8mf8_t*)(in + i); + *(vint8mf8_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-16.c new file mode 100644 index 00000000000..3e6c51ad9af --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-16.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vuint8mf8_t v = *(vuint8mf8_t*)(in + 100); + *(vuint8mf8_t*)(out + 100) = v; + break; + } + case 2:{ + vuint8mf8_t v = *(vuint8mf8_t*)(in + 200); + *(vuint8mf8_t*)(out + 100) = v; + break; + } + case 3:{ + vuint8mf8_t v = *(vuint8mf8_t*)(in + 300); + *(vuint8mf8_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vuint8mf8_t v = *(vuint8mf8_t*)(in + i); + *(vuint8mf8_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-17.c new file mode 100644 index 00000000000..ae2caedff27 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-17.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vint8mf4_t v = *(vint8mf4_t*)(in + 100); + *(vint8mf4_t*)(out + 100) = v; + break; + } + case 2:{ + vint8mf4_t v = *(vint8mf4_t*)(in + 200); + *(vint8mf4_t*)(out + 100) = v; + break; + } + case 3:{ + vint8mf4_t v = *(vint8mf4_t*)(in + 300); + *(vint8mf4_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vint8mf4_t v = *(vint8mf4_t*)(in + i); + *(vint8mf4_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-18.c new file mode 100644 index 00000000000..2378b4006c0 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-18.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vuint8mf4_t v = *(vuint8mf4_t*)(in + 100); + *(vuint8mf4_t*)(out + 100) = v; + break; + } + case 2:{ + vuint8mf4_t v = *(vuint8mf4_t*)(in + 200); + *(vuint8mf4_t*)(out + 100) = v; + break; + } + case 3:{ + vuint8mf4_t v = *(vuint8mf4_t*)(in + 300); + *(vuint8mf4_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vuint8mf4_t v = *(vuint8mf4_t*)(in + i); + *(vuint8mf4_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-19.c new file mode 100644 index 00000000000..1de8fc461dc --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-19.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vint8mf2_t v = *(vint8mf2_t*)(in + 100); + *(vint8mf2_t*)(out + 100) = v; + break; + } + case 2:{ + vint8mf2_t v = *(vint8mf2_t*)(in + 200); + *(vint8mf2_t*)(out + 100) = v; + break; + } + case 3:{ + vint8mf2_t v = *(vint8mf2_t*)(in + 300); + *(vint8mf2_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vint8mf2_t v = *(vint8mf2_t*)(in + i); + *(vint8mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c new file mode 100644 index 00000000000..6c77a94ae63 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 100); + *(vuint8mf8_t*)(out + 100) = v; + } + else if (cond == 2) + { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 200); + *(vuint8mf8_t*)(out + 200) = v; + } + else if (cond == 3) + { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 300); + *(vuint8mf8_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vuint8mf8_t v = *(vuint8mf8_t*)(in + i); + *(vuint8mf8_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-20.c new file mode 100644 index 00000000000..41100cb04a3 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-20.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vuint8mf2_t v = *(vuint8mf2_t*)(in + 100); + *(vuint8mf2_t*)(out + 100) = v; + break; + } + case 2:{ + vuint8mf2_t v = *(vuint8mf2_t*)(in + 200); + *(vuint8mf2_t*)(out + 100) = v; + break; + } + case 3:{ + vuint8mf2_t v = *(vuint8mf2_t*)(in + 300); + *(vuint8mf2_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vuint8mf2_t v = *(vuint8mf2_t*)(in + i); + *(vuint8mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-21.c new file mode 100644 index 00000000000..070899e6e49 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-21.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vint16mf4_t v = *(vint16mf4_t*)(in + 100); + *(vint16mf4_t*)(out + 100) = v; + break; + } + case 2:{ + vint16mf4_t v = *(vint16mf4_t*)(in + 200); + *(vint16mf4_t*)(out + 100) = v; + break; + } + case 3:{ + vint16mf4_t v = *(vint16mf4_t*)(in + 300); + *(vint16mf4_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vint16mf4_t v = *(vint16mf4_t*)(in + i); + *(vint16mf4_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-22.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-22.c new file mode 100644 index 00000000000..1e96191a9fc --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-22.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vuint16mf4_t v = *(vuint16mf4_t*)(in + 100); + *(vuint16mf4_t*)(out + 100) = v; + break; + } + case 2:{ + vuint16mf4_t v = *(vuint16mf4_t*)(in + 200); + *(vuint16mf4_t*)(out + 100) = v; + break; + } + case 3:{ + vuint16mf4_t v = *(vuint16mf4_t*)(in + 300); + *(vuint16mf4_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vuint16mf4_t v = *(vuint16mf4_t*)(in + i); + *(vuint16mf4_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-23.c new file mode 100644 index 00000000000..fa6420822f2 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-23.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vint16mf2_t v = *(vint16mf2_t*)(in + 100); + *(vint16mf2_t*)(out + 100) = v; + break; + } + case 2:{ + vint16mf2_t v = *(vint16mf2_t*)(in + 200); + *(vint16mf2_t*)(out + 100) = v; + break; + } + case 3:{ + vint16mf2_t v = *(vint16mf2_t*)(in + 300); + *(vint16mf2_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vint16mf2_t v = *(vint16mf2_t*)(in + i); + *(vint16mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-24.c new file mode 100644 index 00000000000..d0352fccacf --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-24.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vuint16mf2_t v = *(vuint16mf2_t*)(in + 100); + *(vuint16mf2_t*)(out + 100) = v; + break; + } + case 2:{ + vuint16mf2_t v = *(vuint16mf2_t*)(in + 200); + *(vuint16mf2_t*)(out + 100) = v; + break; + } + case 3:{ + vuint16mf2_t v = *(vuint16mf2_t*)(in + 300); + *(vuint16mf2_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vuint16mf2_t v = *(vuint16mf2_t*)(in + i); + *(vuint16mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-25.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-25.c new file mode 100644 index 00000000000..ad76c24d294 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-25.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vint32mf2_t v = *(vint32mf2_t*)(in + 100); + *(vint32mf2_t*)(out + 100) = v; + break; + } + case 2:{ + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + 100) = v; + break; + } + case 3:{ + vint32mf2_t v = *(vint32mf2_t*)(in + 300); + *(vint32mf2_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vint32mf2_t v = *(vint32mf2_t*)(in + i); + *(vint32mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-26.c new file mode 100644 index 00000000000..71a3f4a06f6 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-26.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vuint32mf2_t v = *(vuint32mf2_t*)(in + 100); + *(vuint32mf2_t*)(out + 100) = v; + break; + } + case 2:{ + vuint32mf2_t v = *(vuint32mf2_t*)(in + 200); + *(vuint32mf2_t*)(out + 100) = v; + break; + } + case 3:{ + vuint32mf2_t v = *(vuint32mf2_t*)(in + 300); + *(vuint32mf2_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + i); + *(vuint32mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-27.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-27.c new file mode 100644 index 00000000000..613a028089b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-27.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 100); + *(vfloat32mf2_t*)(out + 100) = v; + break; + } + case 2:{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 200); + *(vfloat32mf2_t*)(out + 100) = v; + break; + } + case 3:{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 300); + *(vfloat32mf2_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + i); + *(vfloat32mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-28.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-28.c new file mode 100644 index 00000000000..6a2011b0290 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-28.c @@ -0,0 +1,231 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vbool64_t v = *(vbool64_t*)(in + 100); + *(vbool64_t*)(out + 100) = v; + break; + } + case 2:{ + vbool64_t v = *(vbool64_t*)(in + 200); + *(vbool64_t*)(out + 100) = v; + break; + } + case 3:{ + vbool64_t v = *(vbool64_t*)(in + 300); + *(vbool64_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vbool64_t v = *(vbool64_t*)(in + i); + *(vbool64_t*)(out + i) = v; + } +} + +void f2 (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vbool32_t v = *(vbool32_t*)(in + 100); + *(vbool32_t*)(out + 100) = v; + break; + } + case 2:{ + vbool32_t v = *(vbool32_t*)(in + 200); + *(vbool32_t*)(out + 100) = v; + break; + } + case 3:{ + vbool32_t v = *(vbool32_t*)(in + 300); + *(vbool32_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vbool32_t v = *(vbool32_t*)(in + i); + *(vbool32_t*)(out + i) = v; + } +} + +void f3 (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vbool16_t v = *(vbool16_t*)(in + 100); + *(vbool16_t*)(out + 100) = v; + break; + } + case 2:{ + vbool16_t v = *(vbool16_t*)(in + 200); + *(vbool16_t*)(out + 100) = v; + break; + } + case 3:{ + vbool16_t v = *(vbool16_t*)(in + 300); + *(vbool16_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vbool16_t v = *(vbool16_t*)(in + i); + *(vbool16_t*)(out + i) = v; + } +} + +void f4 (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vbool8_t v = *(vbool8_t*)(in + 100); + *(vbool8_t*)(out + 100) = v; + break; + } + case 2:{ + vbool8_t v = *(vbool8_t*)(in + 200); + *(vbool8_t*)(out + 100) = v; + break; + } + case 3:{ + vbool8_t v = *(vbool8_t*)(in + 300); + *(vbool8_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vbool8_t v = *(vbool8_t*)(in + i); + *(vbool8_t*)(out + i) = v; + } +} + +void f5 (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vbool4_t v = *(vbool4_t*)(in + 100); + *(vbool4_t*)(out + 100) = v; + break; + } + case 2:{ + vbool4_t v = *(vbool4_t*)(in + 200); + *(vbool4_t*)(out + 100) = v; + break; + } + case 3:{ + vbool4_t v = *(vbool4_t*)(in + 300); + *(vbool4_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vbool4_t v = *(vbool4_t*)(in + i); + *(vbool4_t*)(out + i) = v; + } +} + +void f6 (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vbool2_t v = *(vbool2_t*)(in + 100); + *(vbool2_t*)(out + 100) = v; + break; + } + case 2:{ + vbool2_t v = *(vbool2_t*)(in + 200); + *(vbool2_t*)(out + 100) = v; + break; + } + case 3:{ + vbool2_t v = *(vbool2_t*)(in + 300); + *(vbool2_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vbool2_t v = *(vbool2_t*)(in + i); + *(vbool2_t*)(out + i) = v; + } +} + +void f7 (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vbool1_t v = *(vbool1_t*)(in + 100); + *(vbool1_t*)(out + 100) = v; + break; + } + case 2:{ + vbool1_t v = *(vbool1_t*)(in + 200); + *(vbool1_t*)(out + 100) = v; + break; + } + case 3:{ + vbool1_t v = *(vbool1_t*)(in + 300); + *(vbool1_t*)(out + 100) = v; + break; + } + default:{ + break; + } + } + for (int i = 0; i < n; i++) + { + vbool1_t v = *(vbool1_t*)(in + i); + *(vbool1_t*)(out + i) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]+\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]+\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]+\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+\.L[0-9]+\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+\.L[0-9]+\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+\.L[0-9]+\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+\.L[0-9]+\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c new file mode 100644 index 00000000000..a03f36ab1c5 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint8mf4_t v = *(vint8mf4_t*)(in + 100); + *(vint8mf4_t*)(out + 100) = v; + } + else if (cond == 2) + { + vint8mf4_t v = *(vint8mf4_t*)(in + 200); + *(vint8mf4_t*)(out + 200) = v; + } + else if (cond == 3) + { + vint8mf4_t v = *(vint8mf4_t*)(in + 300); + *(vint8mf4_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vint8mf4_t v = *(vint8mf4_t*)(in + i); + *(vint8mf4_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c new file mode 100644 index 00000000000..ab16ef2e148 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 100); + *(vuint8mf4_t*)(out + 100) = v; + } + else if (cond == 2) + { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 200); + *(vuint8mf4_t*)(out + 200) = v; + } + else if (cond == 3) + { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 300); + *(vuint8mf4_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vuint8mf4_t v = *(vuint8mf4_t*)(in + i); + *(vuint8mf4_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c new file mode 100644 index 00000000000..7722b9eef1f --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint8mf2_t v = *(vint8mf2_t*)(in + 100); + *(vint8mf2_t*)(out + 100) = v; + } + else if (cond == 2) + { + vint8mf2_t v = *(vint8mf2_t*)(in + 200); + *(vint8mf2_t*)(out + 200) = v; + } + else if (cond == 3) + { + vint8mf2_t v = *(vint8mf2_t*)(in + 300); + *(vint8mf2_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vint8mf2_t v = *(vint8mf2_t*)(in + i); + *(vint8mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c new file mode 100644 index 00000000000..7ec497129b1 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 100); + *(vuint8mf2_t*)(out + 100) = v; + } + else if (cond == 2) + { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 200); + *(vuint8mf2_t*)(out + 200) = v; + } + else if (cond == 3) + { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 300); + *(vuint8mf2_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vuint8mf2_t v = *(vuint8mf2_t*)(in + i); + *(vuint8mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c new file mode 100644 index 00000000000..2772de06151 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint16mf4_t v = *(vint16mf4_t*)(in + 100); + *(vint16mf4_t*)(out + 100) = v; + } + else if (cond == 2) + { + vint16mf4_t v = *(vint16mf4_t*)(in + 200); + *(vint16mf4_t*)(out + 200) = v; + } + else if (cond == 3) + { + vint16mf4_t v = *(vint16mf4_t*)(in + 300); + *(vint16mf4_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vint16mf4_t v = *(vint16mf4_t*)(in + i); + *(vint16mf4_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c new file mode 100644 index 00000000000..124c09b485a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 100); + *(vuint16mf4_t*)(out + 100) = v; + } + else if (cond == 2) + { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 200); + *(vuint16mf4_t*)(out + 200) = v; + } + else if (cond == 3) + { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 300); + *(vuint16mf4_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vuint16mf4_t v = *(vuint16mf4_t*)(in + i); + *(vuint16mf4_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c new file mode 100644 index 00000000000..7699a4408ad --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint16mf2_t v = *(vint16mf2_t*)(in + 100); + *(vint16mf2_t*)(out + 100) = v; + } + else if (cond == 2) + { + vint16mf2_t v = *(vint16mf2_t*)(in + 200); + *(vint16mf2_t*)(out + 200) = v; + } + else if (cond == 3) + { + vint16mf2_t v = *(vint16mf2_t*)(in + 300); + *(vint16mf2_t*)(out + 300) = v; + } + for (int i = 0; i < n; i++) + { + vint16mf2_t v = *(vint16mf2_t*)(in + i); + *(vint16mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c new file mode 100644 index 00000000000..1c32dc3f844 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint8mf8_t v = *(vint8mf8_t*)(in + 100); + *(vint8mf8_t*)(out + 100) = v; + } + else if (cond == 2) + { + vint8mf8_t v = *(vint8mf8_t*)(in + 200); + *(vint8mf8_t*)(out + 200) = v; + } + else if (cond == 3) + { + vint8mf8_t v = *(vint8mf8_t*)(in + 300); + *(vint8mf8_t*)(out + 300) = v; + } + else + { + vint8mf8_t v = *(vint8mf8_t*)(in + 400); + *(vint8mf8_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vint8mf8_t v = *(vint8mf8_t*)(in + i); + *(vint8mf8_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,\.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c new file mode 100644 index 00000000000..e0cee66c2d2 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 100); + *(vuint16mf2_t*)(out + 100) = v; + } + else if (cond == 2) + { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 200); + *(vuint16mf2_t*)(out + 200) = v; + } + else if (cond == 3) + { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 300); + *(vuint16mf2_t*)(out + 300) = v; + } + else + { + vuint16mf2_t v = *(vuint16mf2_t*)(in + 400); + *(vuint16mf2_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vuint16mf2_t v = *(vuint16mf2_t*)(in + i); + *(vuint16mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c new file mode 100644 index 00000000000..67867dbf4c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint32mf2_t v = *(vint32mf2_t*)(in + 100); + *(vint32mf2_t*)(out + 100) = v; + } + else if (cond == 2) + { + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + 200) = v; + } + else if (cond == 3) + { + vint32mf2_t v = *(vint32mf2_t*)(in + 300); + *(vint32mf2_t*)(out + 300) = v; + } + else + { + vint32mf2_t v = *(vint32mf2_t*)(in + 400); + *(vint32mf2_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vint32mf2_t v = *(vint32mf2_t*)(in + i); + *(vint32mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c new file mode 100644 index 00000000000..530604218da --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 100); + *(vuint32mf2_t*)(out + 100) = v; + } + else if (cond == 2) + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 200); + *(vuint32mf2_t*)(out + 200) = v; + } + else if (cond == 3) + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 300); + *(vuint32mf2_t*)(out + 300) = v; + } + else + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + 400); + *(vuint32mf2_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + i); + *(vuint32mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c new file mode 100644 index 00000000000..3c7951ab67e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 100); + *(vfloat32mf2_t*)(out + 100) = v; + } + else if (cond == 2) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 200); + *(vfloat32mf2_t*)(out + 200) = v; + } + else if (cond == 3) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 300); + *(vfloat32mf2_t*)(out + 300) = v; + } + else + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + i); + *(vfloat32mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c new file mode 100644 index 00000000000..b44d28fd77a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c @@ -0,0 +1,217 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool64_t v = *(vbool64_t*)(in + 100); + *(vbool64_t*)(out + 100) = v; + } + else if (cond == 2) + { + vbool64_t v = *(vbool64_t*)(in + 200); + *(vbool64_t*)(out + 200) = v; + } + else if (cond == 3) + { + vbool64_t v = *(vbool64_t*)(in + 300); + *(vbool64_t*)(out + 300) = v; + } + else + { + vbool64_t v = *(vbool64_t*)(in + 400); + *(vbool64_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vbool64_t v = *(vbool64_t*)(in + i); + *(vbool64_t*)(out + i) = v; + } +} + +void f2 (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool32_t v = *(vbool32_t*)(in + 100); + *(vbool32_t*)(out + 100) = v; + } + else if (cond == 2) + { + vbool32_t v = *(vbool32_t*)(in + 200); + *(vbool32_t*)(out + 200) = v; + } + else if (cond == 3) + { + vbool32_t v = *(vbool32_t*)(in + 300); + *(vbool32_t*)(out + 300) = v; + } + else + { + vbool32_t v = *(vbool32_t*)(in + 400); + *(vbool32_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vbool32_t v = *(vbool32_t*)(in + i); + *(vbool32_t*)(out + i) = v; + } +} + +void f3 (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool16_t v = *(vbool16_t*)(in + 100); + *(vbool16_t*)(out + 100) = v; + } + else if (cond == 2) + { + vbool16_t v = *(vbool16_t*)(in + 200); + *(vbool16_t*)(out + 200) = v; + } + else if (cond == 3) + { + vbool16_t v = *(vbool16_t*)(in + 300); + *(vbool16_t*)(out + 300) = v; + } + else + { + vbool16_t v = *(vbool16_t*)(in + 400); + *(vbool16_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vbool16_t v = *(vbool16_t*)(in + i); + *(vbool16_t*)(out + i) = v; + } +} + +void f4 (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool8_t v = *(vbool8_t*)(in + 100); + *(vbool8_t*)(out + 100) = v; + } + else if (cond == 2) + { + vbool8_t v = *(vbool8_t*)(in + 200); + *(vbool8_t*)(out + 200) = v; + } + else if (cond == 3) + { + vbool8_t v = *(vbool8_t*)(in + 300); + *(vbool8_t*)(out + 300) = v; + } + else + { + vbool8_t v = *(vbool8_t*)(in + 400); + *(vbool8_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vbool8_t v = *(vbool8_t*)(in + i); + *(vbool8_t*)(out + i) = v; + } +} + +void f5 (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool4_t v = *(vbool4_t*)(in + 100); + *(vbool4_t*)(out + 100) = v; + } + else if (cond == 2) + { + vbool4_t v = *(vbool4_t*)(in + 200); + *(vbool4_t*)(out + 200) = v; + } + else if (cond == 3) + { + vbool4_t v = *(vbool4_t*)(in + 300); + *(vbool4_t*)(out + 300) = v; + } + else + { + vbool4_t v = *(vbool4_t*)(in + 400); + *(vbool4_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vbool4_t v = *(vbool4_t*)(in + i); + *(vbool4_t*)(out + i) = v; + } +} + +void f6 (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool2_t v = *(vbool2_t*)(in + 100); + *(vbool2_t*)(out + 100) = v; + } + else if (cond == 2) + { + vbool2_t v = *(vbool2_t*)(in + 200); + *(vbool2_t*)(out + 200) = v; + } + else if (cond == 3) + { + vbool2_t v = *(vbool2_t*)(in + 300); + *(vbool2_t*)(out + 300) = v; + } + else + { + vbool2_t v = *(vbool2_t*)(in + 400); + *(vbool2_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vbool2_t v = *(vbool2_t*)(in + i); + *(vbool2_t*)(out + i) = v; + } +} + +void f7 (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vbool1_t v = *(vbool1_t*)(in + 100); + *(vbool1_t*)(out + 100) = v; + } + else if (cond == 2) + { + vbool1_t v = *(vbool1_t*)(in + 200); + *(vbool1_t*)(out + 200) = v; + } + else if (cond == 3) + { + vbool1_t v = *(vbool1_t*)(in + 300); + *(vbool1_t*)(out + 300) = v; + } + else + { + vbool1_t v = *(vbool1_t*)(in + 400); + *(vbool1_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vbool1_t v = *(vbool1_t*)(in + i); + *(vbool1_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 7 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c new file mode 100644 index 00000000000..06d3ffd0020 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vint8mf8_t v = *(vint8mf8_t*)(in + 100); + *(vint8mf8_t*)(out + 100) = v; + break; + } + case 2:{ + vint8mf8_t v = *(vint8mf8_t*)(in + 200); + *(vint8mf8_t*)(out + 100) = v; + break; + } + case 3:{ + vint8mf8_t v = *(vint8mf8_t*)(in + 300); + *(vint8mf8_t*)(out + 100) = v; + break; + } + default:{ + vint8mf8_t v = *(vint8mf8_t*)(in + 400); + *(vint8mf8_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vint8mf8_t v = *(vint8mf8_t*)(in + i); + *(vint8mf8_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c new file mode 100644 index 00000000000..141602b9239 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vuint8mf8_t v = *(vuint8mf8_t*)(in + 100); + *(vuint8mf8_t*)(out + 100) = v; + break; + } + case 2:{ + vuint8mf8_t v = *(vuint8mf8_t*)(in + 200); + *(vuint8mf8_t*)(out + 100) = v; + break; + } + case 3:{ + vuint8mf8_t v = *(vuint8mf8_t*)(in + 300); + *(vuint8mf8_t*)(out + 100) = v; + break; + } + default:{ + vuint8mf8_t v = *(vuint8mf8_t*)(in + 400); + *(vuint8mf8_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vuint8mf8_t v = *(vuint8mf8_t*)(in + i); + *(vuint8mf8_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c new file mode 100644 index 00000000000..345d799bc6c --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vint8mf4_t v = *(vint8mf4_t*)(in + 100); + *(vint8mf4_t*)(out + 100) = v; + break; + } + case 2:{ + vint8mf4_t v = *(vint8mf4_t*)(in + 200); + *(vint8mf4_t*)(out + 100) = v; + break; + } + case 3:{ + vint8mf4_t v = *(vint8mf4_t*)(in + 300); + *(vint8mf4_t*)(out + 100) = v; + break; + } + default:{ + vint8mf4_t v = *(vint8mf4_t*)(in + 400); + *(vint8mf4_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vint8mf4_t v = *(vint8mf4_t*)(in + i); + *(vint8mf4_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c new file mode 100644 index 00000000000..bce14e29791 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vuint8mf4_t v = *(vuint8mf4_t*)(in + 100); + *(vuint8mf4_t*)(out + 100) = v; + break; + } + case 2:{ + vuint8mf4_t v = *(vuint8mf4_t*)(in + 200); + *(vuint8mf4_t*)(out + 100) = v; + break; + } + case 3:{ + vuint8mf4_t v = *(vuint8mf4_t*)(in + 300); + *(vuint8mf4_t*)(out + 100) = v; + break; + } + default:{ + vuint8mf4_t v = *(vuint8mf4_t*)(in + 400); + *(vuint8mf4_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vuint8mf4_t v = *(vuint8mf4_t*)(in + i); + *(vuint8mf4_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c new file mode 100644 index 00000000000..a0e3b5703a7 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vint8mf2_t v = *(vint8mf2_t*)(in + 100); + *(vint8mf2_t*)(out + 100) = v; + break; + } + case 2:{ + vint8mf2_t v = *(vint8mf2_t*)(in + 200); + *(vint8mf2_t*)(out + 100) = v; + break; + } + case 3:{ + vint8mf2_t v = *(vint8mf2_t*)(in + 300); + *(vint8mf2_t*)(out + 100) = v; + break; + } + default:{ + vint8mf2_t v = *(vint8mf2_t*)(in + 400); + *(vint8mf2_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vint8mf2_t v = *(vint8mf2_t*)(in + i); + *(vint8mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c new file mode 100644 index 00000000000..01b9a50389d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 100); + *(vuint8mf8_t*)(out + 100) = v; + } + else if (cond == 2) + { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 200); + *(vuint8mf8_t*)(out + 200) = v; + } + else if (cond == 3) + { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 300); + *(vuint8mf8_t*)(out + 300) = v; + } + else + { + vuint8mf8_t v = *(vuint8mf8_t*)(in + 400); + *(vuint8mf8_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vuint8mf8_t v = *(vuint8mf8_t*)(in + i); + *(vuint8mf8_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c new file mode 100644 index 00000000000..c41022dce3a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vuint8mf2_t v = *(vuint8mf2_t*)(in + 100); + *(vuint8mf2_t*)(out + 100) = v; + break; + } + case 2:{ + vuint8mf2_t v = *(vuint8mf2_t*)(in + 200); + *(vuint8mf2_t*)(out + 100) = v; + break; + } + case 3:{ + vuint8mf2_t v = *(vuint8mf2_t*)(in + 300); + *(vuint8mf2_t*)(out + 100) = v; + break; + } + default:{ + vuint8mf2_t v = *(vuint8mf2_t*)(in + 400); + *(vuint8mf2_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vuint8mf2_t v = *(vuint8mf2_t*)(in + i); + *(vuint8mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c new file mode 100644 index 00000000000..d90a06ce544 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vint16mf4_t v = *(vint16mf4_t*)(in + 100); + *(vint16mf4_t*)(out + 100) = v; + break; + } + case 2:{ + vint16mf4_t v = *(vint16mf4_t*)(in + 200); + *(vint16mf4_t*)(out + 100) = v; + break; + } + case 3:{ + vint16mf4_t v = *(vint16mf4_t*)(in + 300); + *(vint16mf4_t*)(out + 100) = v; + break; + } + default:{ + vint16mf4_t v = *(vint16mf4_t*)(in + 400); + *(vint16mf4_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vint16mf4_t v = *(vint16mf4_t*)(in + i); + *(vint16mf4_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c new file mode 100644 index 00000000000..6527a0a67dc --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vuint16mf4_t v = *(vuint16mf4_t*)(in + 100); + *(vuint16mf4_t*)(out + 100) = v; + break; + } + case 2:{ + vuint16mf4_t v = *(vuint16mf4_t*)(in + 200); + *(vuint16mf4_t*)(out + 100) = v; + break; + } + case 3:{ + vuint16mf4_t v = *(vuint16mf4_t*)(in + 300); + *(vuint16mf4_t*)(out + 100) = v; + break; + } + default:{ + vuint16mf4_t v = *(vuint16mf4_t*)(in + 400); + *(vuint16mf4_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vuint16mf4_t v = *(vuint16mf4_t*)(in + i); + *(vuint16mf4_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c new file mode 100644 index 00000000000..dc09782eb2d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vint16mf2_t v = *(vint16mf2_t*)(in + 100); + *(vint16mf2_t*)(out + 100) = v; + break; + } + case 2:{ + vint16mf2_t v = *(vint16mf2_t*)(in + 200); + *(vint16mf2_t*)(out + 100) = v; + break; + } + case 3:{ + vint16mf2_t v = *(vint16mf2_t*)(in + 300); + *(vint16mf2_t*)(out + 100) = v; + break; + } + default:{ + vint16mf2_t v = *(vint16mf2_t*)(in + 400); + *(vint16mf2_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vint16mf2_t v = *(vint16mf2_t*)(in + i); + *(vint16mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c new file mode 100644 index 00000000000..f566156a05e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vuint16mf2_t v = *(vuint16mf2_t*)(in + 100); + *(vuint16mf2_t*)(out + 100) = v; + break; + } + case 2:{ + vuint16mf2_t v = *(vuint16mf2_t*)(in + 200); + *(vuint16mf2_t*)(out + 100) = v; + break; + } + case 3:{ + vuint16mf2_t v = *(vuint16mf2_t*)(in + 300); + *(vuint16mf2_t*)(out + 100) = v; + break; + } + default:{ + vuint16mf2_t v = *(vuint16mf2_t*)(in + 400); + *(vuint16mf2_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vuint16mf2_t v = *(vuint16mf2_t*)(in + i); + *(vuint16mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c new file mode 100644 index 00000000000..4f2ca827705 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vint32mf2_t v = *(vint32mf2_t*)(in + 100); + *(vint32mf2_t*)(out + 100) = v; + break; + } + case 2:{ + vint32mf2_t v = *(vint32mf2_t*)(in + 200); + *(vint32mf2_t*)(out + 100) = v; + break; + } + case 3:{ + vint32mf2_t v = *(vint32mf2_t*)(in + 300); + *(vint32mf2_t*)(out + 100) = v; + break; + } + default:{ + vint32mf2_t v = *(vint32mf2_t*)(in + 400); + *(vint32mf2_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vint32mf2_t v = *(vint32mf2_t*)(in + i); + *(vint32mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c new file mode 100644 index 00000000000..9c0a07bc05d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vuint32mf2_t v = *(vuint32mf2_t*)(in + 100); + *(vuint32mf2_t*)(out + 100) = v; + break; + } + case 2:{ + vuint32mf2_t v = *(vuint32mf2_t*)(in + 200); + *(vuint32mf2_t*)(out + 100) = v; + break; + } + case 3:{ + vuint32mf2_t v = *(vuint32mf2_t*)(in + 300); + *(vuint32mf2_t*)(out + 100) = v; + break; + } + default:{ + vuint32mf2_t v = *(vuint32mf2_t*)(in + 400); + *(vuint32mf2_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + i); + *(vuint32mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c new file mode 100644 index 00000000000..6d78052cc61 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 100); + *(vfloat32mf2_t*)(out + 100) = v; + break; + } + case 2:{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 200); + *(vfloat32mf2_t*)(out + 100) = v; + break; + } + case 3:{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 300); + *(vfloat32mf2_t*)(out + 100) = v; + break; + } + default:{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400); + *(vfloat32mf2_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + i); + *(vfloat32mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c new file mode 100644 index 00000000000..cdd1d3a2e19 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c @@ -0,0 +1,237 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vbool64_t v = *(vbool64_t*)(in + 100); + *(vbool64_t*)(out + 100) = v; + break; + } + case 2:{ + vbool64_t v = *(vbool64_t*)(in + 200); + *(vbool64_t*)(out + 100) = v; + break; + } + case 3:{ + vbool64_t v = *(vbool64_t*)(in + 300); + *(vbool64_t*)(out + 100) = v; + break; + } + default:{ + vbool64_t v = *(vbool64_t*)(in + 400); + *(vbool64_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vbool64_t v = *(vbool64_t*)(in + i); + *(vbool64_t*)(out + i) = v; + } +} + +void f2 (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vbool32_t v = *(vbool32_t*)(in + 100); + *(vbool32_t*)(out + 100) = v; + break; + } + case 2:{ + vbool32_t v = *(vbool32_t*)(in + 200); + *(vbool32_t*)(out + 100) = v; + break; + } + case 3:{ + vbool32_t v = *(vbool32_t*)(in + 300); + *(vbool32_t*)(out + 100) = v; + break; + } + default:{ + vbool32_t v = *(vbool32_t*)(in + 400); + *(vbool32_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vbool32_t v = *(vbool32_t*)(in + i); + *(vbool32_t*)(out + i) = v; + } +} + +void f3 (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vbool16_t v = *(vbool16_t*)(in + 100); + *(vbool16_t*)(out + 100) = v; + break; + } + case 2:{ + vbool16_t v = *(vbool16_t*)(in + 200); + *(vbool16_t*)(out + 100) = v; + break; + } + case 3:{ + vbool16_t v = *(vbool16_t*)(in + 300); + *(vbool16_t*)(out + 100) = v; + break; + } + default:{ + vbool16_t v = *(vbool16_t*)(in + 400); + *(vbool16_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vbool16_t v = *(vbool16_t*)(in + i); + *(vbool16_t*)(out + i) = v; + } +} + +void f4 (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vbool8_t v = *(vbool8_t*)(in + 100); + *(vbool8_t*)(out + 100) = v; + break; + } + case 2:{ + vbool8_t v = *(vbool8_t*)(in + 200); + *(vbool8_t*)(out + 100) = v; + break; + } + case 3:{ + vbool8_t v = *(vbool8_t*)(in + 300); + *(vbool8_t*)(out + 100) = v; + break; + } + default:{ + vbool8_t v = *(vbool8_t*)(in + 400); + *(vbool8_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vbool8_t v = *(vbool8_t*)(in + i); + *(vbool8_t*)(out + i) = v; + } +} + +void f5 (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vbool4_t v = *(vbool4_t*)(in + 100); + *(vbool4_t*)(out + 100) = v; + break; + } + case 2:{ + vbool4_t v = *(vbool4_t*)(in + 200); + *(vbool4_t*)(out + 100) = v; + break; + } + case 3:{ + vbool4_t v = *(vbool4_t*)(in + 300); + *(vbool4_t*)(out + 100) = v; + break; + } + default:{ + vbool4_t v = *(vbool4_t*)(in + 400); + *(vbool4_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vbool4_t v = *(vbool4_t*)(in + i); + *(vbool4_t*)(out + i) = v; + } +} + +void f6 (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vbool2_t v = *(vbool2_t*)(in + 100); + *(vbool2_t*)(out + 100) = v; + break; + } + case 2:{ + vbool2_t v = *(vbool2_t*)(in + 200); + *(vbool2_t*)(out + 100) = v; + break; + } + case 3:{ + vbool2_t v = *(vbool2_t*)(in + 300); + *(vbool2_t*)(out + 100) = v; + break; + } + default:{ + vbool2_t v = *(vbool2_t*)(in + 400); + *(vbool2_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vbool2_t v = *(vbool2_t*)(in + i); + *(vbool2_t*)(out + i) = v; + } +} + +void f7 (void * restrict in, void * restrict out, int n, int cond) +{ + switch (cond) + { + case 1:{ + vbool1_t v = *(vbool1_t*)(in + 100); + *(vbool1_t*)(out + 100) = v; + break; + } + case 2:{ + vbool1_t v = *(vbool1_t*)(in + 200); + *(vbool1_t*)(out + 100) = v; + break; + } + case 3:{ + vbool1_t v = *(vbool1_t*)(in + 300); + *(vbool1_t*)(out + 100) = v; + break; + } + default:{ + vbool1_t v = *(vbool1_t*)(in + 400); + *(vbool1_t*)(out + 400) = v; + break; + } + } + for (int i = 0; i < n; i++) + { + vbool1_t v = *(vbool1_t*)(in + i); + *(vbool1_t*)(out + i) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vlm\.v\s*(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 7 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c new file mode 100644 index 00000000000..ddfc938bcc4 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint8mf4_t v = *(vint8mf4_t*)(in + 100); + *(vint8mf4_t*)(out + 100) = v; + } + else if (cond == 2) + { + vint8mf4_t v = *(vint8mf4_t*)(in + 200); + *(vint8mf4_t*)(out + 200) = v; + } + else if (cond == 3) + { + vint8mf4_t v = *(vint8mf4_t*)(in + 300); + *(vint8mf4_t*)(out + 300) = v; + } + else + { + vint8mf4_t v = *(vint8mf4_t*)(in + 400); + *(vint8mf4_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vint8mf4_t v = *(vint8mf4_t*)(in + i); + *(vint8mf4_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c new file mode 100644 index 00000000000..a6cb700185f --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 100); + *(vuint8mf4_t*)(out + 100) = v; + } + else if (cond == 2) + { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 200); + *(vuint8mf4_t*)(out + 200) = v; + } + else if (cond == 3) + { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 300); + *(vuint8mf4_t*)(out + 300) = v; + } + else + { + vuint8mf4_t v = *(vuint8mf4_t*)(in + 400); + *(vuint8mf4_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vuint8mf4_t v = *(vuint8mf4_t*)(in + i); + *(vuint8mf4_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c new file mode 100644 index 00000000000..1da94b4486d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint8mf2_t v = *(vint8mf2_t*)(in + 100); + *(vint8mf2_t*)(out + 100) = v; + } + else if (cond == 2) + { + vint8mf2_t v = *(vint8mf2_t*)(in + 200); + *(vint8mf2_t*)(out + 200) = v; + } + else if (cond == 3) + { + vint8mf2_t v = *(vint8mf2_t*)(in + 300); + *(vint8mf2_t*)(out + 300) = v; + } + else + { + vint8mf2_t v = *(vint8mf2_t*)(in + 400); + *(vint8mf2_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vint8mf2_t v = *(vint8mf2_t*)(in + i); + *(vint8mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c new file mode 100644 index 00000000000..19d005f70ee --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 100); + *(vuint8mf2_t*)(out + 100) = v; + } + else if (cond == 2) + { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 200); + *(vuint8mf2_t*)(out + 200) = v; + } + else if (cond == 3) + { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 300); + *(vuint8mf2_t*)(out + 300) = v; + } + else + { + vuint8mf2_t v = *(vuint8mf2_t*)(in + 400); + *(vuint8mf2_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vuint8mf2_t v = *(vuint8mf2_t*)(in + i); + *(vuint8mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c new file mode 100644 index 00000000000..6eabe9cb0ff --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint16mf4_t v = *(vint16mf4_t*)(in + 100); + *(vint16mf4_t*)(out + 100) = v; + } + else if (cond == 2) + { + vint16mf4_t v = *(vint16mf4_t*)(in + 200); + *(vint16mf4_t*)(out + 200) = v; + } + else if (cond == 3) + { + vint16mf4_t v = *(vint16mf4_t*)(in + 300); + *(vint16mf4_t*)(out + 300) = v; + } + else + { + vint16mf4_t v = *(vint16mf4_t*)(in + 400); + *(vint16mf4_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vint16mf4_t v = *(vint16mf4_t*)(in + i); + *(vint16mf4_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c new file mode 100644 index 00000000000..811f7b3f9a8 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 100); + *(vuint16mf4_t*)(out + 100) = v; + } + else if (cond == 2) + { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 200); + *(vuint16mf4_t*)(out + 200) = v; + } + else if (cond == 3) + { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 300); + *(vuint16mf4_t*)(out + 300) = v; + } + else + { + vuint16mf4_t v = *(vuint16mf4_t*)(in + 400); + *(vuint16mf4_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vuint16mf4_t v = *(vuint16mf4_t*)(in + i); + *(vuint16mf4_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c new file mode 100644 index 00000000000..a91eca7f3dd --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* The for loop body should not have vsetvl instruction. */ +void f (void * restrict in, void * restrict out, int n, int cond) +{ + if (cond == 1) + { + vint16mf2_t v = *(vint16mf2_t*)(in + 100); + *(vint16mf2_t*)(out + 100) = v; + } + else if (cond == 2) + { + vint16mf2_t v = *(vint16mf2_t*)(in + 200); + *(vint16mf2_t*)(out + 200) = v; + } + else if (cond == 3) + { + vint16mf2_t v = *(vint16mf2_t*)(in + 300); + *(vint16mf2_t*)(out + 300) = v; + } + else + { + vint16mf2_t v = *(vint16mf2_t*)(in + 400); + *(vint16mf2_t*)(out + 400) = v; + } + for (int i = 0; i < n; i++) + { + vint16mf2_t v = *(vint16mf2_t*)(in + i); + *(vint16mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c new file mode 100644 index 00000000000..016af8fc67b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c @@ -0,0 +1,154 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +/* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX. */ + +#include "riscv_vector.h" + +void foo1 (void * restrict in, void * restrict out) +{ + vbool64_t v1 = *(vbool64_t*)(in + 1); + vbool64_t v2 = *(vbool64_t*)(in + 2); + vbool64_t v3 = *(vbool64_t*)(in + 3); + vbool64_t v4 = *(vbool64_t*)(in + 4); + vbool64_t v5 = *(vbool64_t*)(in + 5); + vbool64_t v6 = *(vbool64_t*)(in + 6); + vbool64_t v7 = *(vbool64_t*)(in + 7); + vbool64_t v8 = *(vbool64_t*)(in + 8); + *(vbool64_t*)(out + 1) = v1; + *(vbool64_t*)(out + 2) = v2; + *(vbool64_t*)(out + 3) = v3; + *(vbool64_t*)(out + 4) = v4; + *(vbool64_t*)(out + 5) = v5; + *(vbool64_t*)(out + 6) = v6; + *(vbool64_t*)(out + 7) = v7; + *(vbool64_t*)(out + 8) = v8; +} + +void foo2 (void * restrict in, void * restrict out) +{ + vbool32_t v1 = *(vbool32_t*)(in + 1); + vbool32_t v2 = *(vbool32_t*)(in + 2); + vbool32_t v3 = *(vbool32_t*)(in + 3); + vbool32_t v4 = *(vbool32_t*)(in + 4); + vbool32_t v5 = *(vbool32_t*)(in + 5); + vbool32_t v6 = *(vbool32_t*)(in + 6); + vbool32_t v7 = *(vbool32_t*)(in + 7); + vbool32_t v8 = *(vbool32_t*)(in + 8); + *(vbool32_t*)(out + 1) = v1; + *(vbool32_t*)(out + 2) = v2; + *(vbool32_t*)(out + 3) = v3; + *(vbool32_t*)(out + 4) = v4; + *(vbool32_t*)(out + 5) = v5; + *(vbool32_t*)(out + 6) = v6; + *(vbool32_t*)(out + 7) = v7; + *(vbool32_t*)(out + 8) = v8; +} + +void foo3 (void * restrict in, void * restrict out) +{ + vbool16_t v1 = *(vbool16_t*)(in + 1); + vbool16_t v2 = *(vbool16_t*)(in + 2); + vbool16_t v3 = *(vbool16_t*)(in + 3); + vbool16_t v4 = *(vbool16_t*)(in + 4); + vbool16_t v5 = *(vbool16_t*)(in + 5); + vbool16_t v6 = *(vbool16_t*)(in + 6); + vbool16_t v7 = *(vbool16_t*)(in + 7); + vbool16_t v8 = *(vbool16_t*)(in + 8); + *(vbool16_t*)(out + 1) = v1; + *(vbool16_t*)(out + 2) = v2; + *(vbool16_t*)(out + 3) = v3; + *(vbool16_t*)(out + 4) = v4; + *(vbool16_t*)(out + 5) = v5; + *(vbool16_t*)(out + 6) = v6; + *(vbool16_t*)(out + 7) = v7; + *(vbool16_t*)(out + 8) = v8; +} + +void foo4 (void * restrict in, void * restrict out) +{ + vbool8_t v1 = *(vbool8_t*)(in + 1); + vbool8_t v2 = *(vbool8_t*)(in + 2); + vbool8_t v3 = *(vbool8_t*)(in + 3); + vbool8_t v4 = *(vbool8_t*)(in + 4); + vbool8_t v5 = *(vbool8_t*)(in + 5); + vbool8_t v6 = *(vbool8_t*)(in + 6); + vbool8_t v7 = *(vbool8_t*)(in + 7); + vbool8_t v8 = *(vbool8_t*)(in + 8); + *(vbool8_t*)(out + 1) = v1; + *(vbool8_t*)(out + 2) = v2; + *(vbool8_t*)(out + 3) = v3; + *(vbool8_t*)(out + 4) = v4; + *(vbool8_t*)(out + 5) = v5; + *(vbool8_t*)(out + 6) = v6; + *(vbool8_t*)(out + 7) = v7; + *(vbool8_t*)(out + 8) = v8; +} + +void foo5 (void * restrict in, void * restrict out) +{ + vbool4_t v1 = *(vbool4_t*)(in + 1); + vbool4_t v2 = *(vbool4_t*)(in + 2); + vbool4_t v3 = *(vbool4_t*)(in + 3); + vbool4_t v4 = *(vbool4_t*)(in + 4); + vbool4_t v5 = *(vbool4_t*)(in + 5); + vbool4_t v6 = *(vbool4_t*)(in + 6); + vbool4_t v7 = *(vbool4_t*)(in + 7); + vbool4_t v8 = *(vbool4_t*)(in + 8); + *(vbool4_t*)(out + 1) = v1; + *(vbool4_t*)(out + 2) = v2; + *(vbool4_t*)(out + 3) = v3; + *(vbool4_t*)(out + 4) = v4; + *(vbool4_t*)(out + 5) = v5; + *(vbool4_t*)(out + 6) = v6; + *(vbool4_t*)(out + 7) = v7; + *(vbool4_t*)(out + 8) = v8; +} + +void foo6 (void * restrict in, void * restrict out) +{ + vbool2_t v1 = *(vbool2_t*)(in + 1); + vbool2_t v2 = *(vbool2_t*)(in + 2); + vbool2_t v3 = *(vbool2_t*)(in + 3); + vbool2_t v4 = *(vbool2_t*)(in + 4); + vbool2_t v5 = *(vbool2_t*)(in + 5); + vbool2_t v6 = *(vbool2_t*)(in + 6); + vbool2_t v7 = *(vbool2_t*)(in + 7); + vbool2_t v8 = *(vbool2_t*)(in + 8); + *(vbool2_t*)(out + 1) = v1; + *(vbool2_t*)(out + 2) = v2; + *(vbool2_t*)(out + 3) = v3; + *(vbool2_t*)(out + 4) = v4; + *(vbool2_t*)(out + 5) = v5; + *(vbool2_t*)(out + 6) = v6; + *(vbool2_t*)(out + 7) = v7; + *(vbool2_t*)(out + 8) = v8; +} + +void foo7 (void * restrict in, void * restrict out) +{ + vbool1_t v1 = *(vbool1_t*)(in + 1); + vbool1_t v2 = *(vbool1_t*)(in + 2); + vbool1_t v3 = *(vbool1_t*)(in + 3); + vbool1_t v4 = *(vbool1_t*)(in + 4); + vbool1_t v5 = *(vbool1_t*)(in + 5); + vbool1_t v6 = *(vbool1_t*)(in + 6); + vbool1_t v7 = *(vbool1_t*)(in + 7); + vbool1_t v8 = *(vbool1_t*)(in + 8); + *(vbool1_t*)(out + 1) = v1; + *(vbool1_t*)(out + 2) = v2; + *(vbool1_t*)(out + 3) = v3; + *(vbool1_t*)(out + 4) = v4; + *(vbool1_t*)(out + 5) = v5; + *(vbool1_t*)(out + 6) = v6; + *(vbool1_t*)(out + 7) = v7; + *(vbool1_t*)(out + 8) = v8; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c new file mode 100644 index 00000000000..185db998df1 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c @@ -0,0 +1,143 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f1 (void * restrict in, void * restrict out) +{ + vint16mf4_t v1 = *(vint16mf4_t*)(in + 1); + vint8mf8_t v2; + *(vint16mf4_t*)(out + 1) = v1; + *(vint8mf8_t*)(out + 2) = v2; +} + +void f2 (void * restrict in, void * restrict out) +{ + vint16mf4_t v1 = *(vint16mf4_t*)(in + 1); + vint32mf2_t v2; + *(vint16mf4_t*)(out + 1) = v1; + *(vint32mf2_t*)(out + 2) = v2; +} + +void f3 (void * restrict in, void * restrict out) +{ + vint16mf4_t v1 = *(vint16mf4_t*)(in + 1); + vint64m1_t v2; + *(vint16mf4_t*)(out + 1) = v1; + *(vint64m1_t*)(out + 2) = v2; +} + +void f4 (void * restrict in, void * restrict out) +{ + vint16mf2_t v1 = *(vint16mf2_t*)(in + 1); + vint8mf4_t v2; + *(vint16mf2_t*)(out + 1) = v1; + *(vint8mf4_t*)(out + 2) = v2; +} + +void f5 (void * restrict in, void * restrict out) +{ + vint16mf2_t v1 = *(vint16mf2_t*)(in + 1); + vint32m1_t v2; + *(vint16mf2_t*)(out + 1) = v1; + *(vint32m1_t*)(out + 2) = v2; +} + +void f6 (void * restrict in, void * restrict out) +{ + vint16mf2_t v1 = *(vint16mf2_t*)(in + 1); + vint64m2_t v2; + *(vint16mf2_t*)(out + 1) = v1; + *(vint64m2_t*)(out + 2) = v2; +} + +void f7 (void * restrict in, void * restrict out) +{ + vint16m1_t v1 = *(vint16m1_t*)(in + 1); + vint8mf2_t v2; + *(vint16m1_t*)(out + 1) = v1; + *(vint8mf2_t*)(out + 2) = v2; +} + +void f8 (void * restrict in, void * restrict out) +{ + vint16m1_t v1 = *(vint16m1_t*)(in + 1); + vint32m2_t v2; + *(vint16m1_t*)(out + 1) = v1; + *(vint32m2_t*)(out + 2) = v2; +} + +void f9 (void * restrict in, void * restrict out) +{ + vint16m1_t v1 = *(vint16m1_t*)(in + 1); + vint64m4_t v2; + *(vint16m1_t*)(out + 1) = v1; + *(vint64m4_t*)(out + 2) = v2; +} + +void f10 (void * restrict in, void * restrict out) +{ + vint16m2_t v1 = *(vint16m2_t*)(in + 1); + vint8m1_t v2; + *(vint16m2_t*)(out + 1) = v1; + *(vint8m1_t*)(out + 2) = v2; +} + +void f11 (void * restrict in, void * restrict out) +{ + vint16m2_t v1 = *(vint16m2_t*)(in + 1); + vint32m4_t v2; + *(vint16m2_t*)(out + 1) = v1; + *(vint32m4_t*)(out + 2) = v2; +} + +void f12 (void * restrict in, void * restrict out) +{ + vint16m2_t v1 = *(vint16m2_t*)(in + 1); + vint64m8_t v2; + *(vint16m2_t*)(out + 1) = v1; + *(vint64m8_t*)(out + 2) = v2; +} + +void f13 (void * restrict in, void * restrict out) +{ + vint16m4_t v1 = *(vint16m4_t*)(in + 1); + vint8m2_t v2; + *(vint16m4_t*)(out + 1) = v1; + *(vint8m2_t*)(out + 2) = v2; +} + +void f14 (void * restrict in, void * restrict out) +{ + vint16m4_t v1 = *(vint16m4_t*)(in + 1); + vint32m8_t v2; + *(vint16m4_t*)(out + 1) = v1; + *(vint32m8_t*)(out + 2) = v2; +} + +void f15 (void * restrict in, void * restrict out) +{ + vint16m8_t v1 = *(vint16m8_t*)(in + 1); + vint8m4_t v2; + *(vint16m8_t*)(out + 1) = v1; + *(vint8m4_t*)(out + 2) = v2; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli} 15 { target { no-opts "-O0" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c new file mode 100644 index 00000000000..95746b763e0 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c @@ -0,0 +1,34 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f1 (void * restrict in, void * restrict out) +{ + vint32mf2_t v1 = *(vint32mf2_t*)(in + 1); + vint8mf8_t v2; + *(vint32mf2_t*)(out + 1) = v1; + *(vint8mf8_t*)(out + 2) = v2; +} + +void f2 (void * restrict in, void * restrict out) +{ + vint32mf2_t v1 = *(vint32mf2_t*)(in + 1); + vint16mf4_t v2; + *(vint32mf2_t*)(out + 1) = v1; + *(vint16mf4_t*)(out + 2) = v2; +} + +void f3 (void * restrict in, void * restrict out) +{ + vint32mf2_t v1 = *(vint32mf2_t*)(in + 1); + vint64m1_t v2; + *(vint32mf2_t*)(out + 1) = v1; + *(vint64m1_t*)(out + 2) = v2; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c new file mode 100644 index 00000000000..d3442457861 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c @@ -0,0 +1,92 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f1 (void * restrict in, void * restrict out) +{ + vint8mf8_t v1 = *(vint8mf8_t*)(in + 1); + vfloat32mf2_t v2; + *(vint8mf8_t*)(out + 1) = v1; + *(vfloat32mf2_t*)(out + 2) = v2; +} + +void f2 (void * restrict in, void * restrict out) +{ + vint8mf8_t v1 = *(vint8mf8_t*)(in + 1); + vfloat64m1_t v2; + *(vint8mf8_t*)(out + 1) = v1; + *(vfloat64m1_t*)(out + 2) = v2; +} + +void f3 (void * restrict in, void * restrict out) +{ + vint8mf4_t v1 = *(vint8mf4_t*)(in + 1); + vfloat32m1_t v2; + *(vint8mf4_t*)(out + 1) = v1; + *(vfloat32m1_t*)(out + 2) = v2; +} + +void f4 (void * restrict in, void * restrict out) +{ + vint8mf4_t v1 = *(vint8mf4_t*)(in + 1); + vfloat64m2_t v2; + *(vint8mf4_t*)(out + 1) = v1; + *(vfloat64m2_t*)(out + 2) = v2; +} + +void f5 (void * restrict in, void * restrict out) +{ + vint8mf2_t v1 = *(vint8mf2_t*)(in + 1); + vfloat32m2_t v2; + *(vint8mf2_t*)(out + 1) = v1; + *(vfloat32m2_t*)(out + 2) = v2; +} + +void f6 (void * restrict in, void * restrict out) +{ + vint8mf2_t v1 = *(vint8mf2_t*)(in + 1); + vfloat64m4_t v2; + *(vint8mf2_t*)(out + 1) = v1; + *(vfloat64m4_t*)(out + 2) = v2; +} + +void f7 (void * restrict in, void * restrict out) +{ + vint8m1_t v1 = *(vint8m1_t*)(in + 1); + vfloat32m4_t v2; + *(vint8m1_t*)(out + 1) = v1; + *(vfloat32m4_t*)(out + 2) = v2; +} + +void f8 (void * restrict in, void * restrict out) +{ + vint8m1_t v1 = *(vint8m1_t*)(in + 1); + vfloat64m8_t v2; + *(vint8m1_t*)(out + 1) = v1; + *(vfloat64m8_t*)(out + 2) = v2; +} + +void f9 (void * restrict in, void * restrict out) +{ + vint8m2_t v1 = *(vint8m2_t*)(in + 1); + vfloat32m8_t v2; + *(vint8m2_t*)(out + 1) = v1; + *(vfloat32m8_t*)(out + 2) = v2; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts "-O0" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c new file mode 100644 index 00000000000..9ed1020af29 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c @@ -0,0 +1,89 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f1 (void * restrict in, void * restrict out) +{ + vint16mf4_t v1 = *(vint16mf4_t*)(in + 1); + vfloat32mf2_t v2; + *(vint16mf4_t*)(out + 1) = v1; + *(vfloat32mf2_t*)(out + 2) = v2; +} + +void f2 (void * restrict in, void * restrict out) +{ + vint16mf4_t v1 = *(vint16mf4_t*)(in + 1); + vfloat64m1_t v2; + *(vint16mf4_t*)(out + 1) = v1; + *(vfloat64m1_t*)(out + 2) = v2; +} + +void f3 (void * restrict in, void * restrict out) +{ + vint16mf2_t v1 = *(vint16mf2_t*)(in + 1); + vfloat32m1_t v2; + *(vint16mf2_t*)(out + 1) = v1; + *(vfloat32m1_t*)(out + 2) = v2; +} + +void f4 (void * restrict in, void * restrict out) +{ + vint16mf2_t v1 = *(vint16mf2_t*)(in + 1); + vfloat64m2_t v2; + *(vint16mf2_t*)(out + 1) = v1; + *(vfloat64m2_t*)(out + 2) = v2; +} + +void f5 (void * restrict in, void * restrict out) +{ + vint16m1_t v1 = *(vint16m1_t*)(in + 1); + vfloat32m2_t v2; + *(vint16m1_t*)(out + 1) = v1; + *(vfloat32m2_t*)(out + 2) = v2; +} + +void f6 (void * restrict in, void * restrict out) +{ + vint16m1_t v1 = *(vint16m1_t*)(in + 1); + vfloat64m4_t v2; + *(vint16m1_t*)(out + 1) = v1; + *(vfloat64m4_t*)(out + 2) = v2; +} + +void f7 (void * restrict in, void * restrict out) +{ + vint16m2_t v1 = *(vint16m2_t*)(in + 1); + vfloat32m4_t v2; + *(vint16m2_t*)(out + 1) = v1; + *(vfloat32m4_t*)(out + 2) = v2; +} + +void f8 (void * restrict in, void * restrict out) +{ + vint16m2_t v1 = *(vint16m2_t*)(in + 1); + vfloat64m8_t v2; + *(vint16m2_t*)(out + 1) = v1; + *(vfloat64m8_t*)(out + 2) = v2; +} + +void f9 (void * restrict in, void * restrict out) +{ + vint16m4_t v1 = *(vint16m4_t*)(in + 1); + vfloat32m8_t v2; + *(vint16m4_t*)(out + 1) = v1; + *(vfloat32m8_t*)(out + 2) = v2; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts "-O0" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c new file mode 100644 index 00000000000..f5d91c68a16 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f3 (void * restrict in, void * restrict out) +{ + vint32mf2_t v1 = *(vint32mf2_t*)(in + 1); + vfloat64m1_t v2; + *(vint32mf2_t*)(out + 1) = v1; + *(vfloat64m1_t*)(out + 2) = v2; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c new file mode 100644 index 00000000000..3d9e8370cc9 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c @@ -0,0 +1,42 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f1 (void * restrict in, void * restrict out) +{ + vfloat32mf2_t v1 = *(vfloat32mf2_t*)(in + 1); + vint8mf8_t v2; + *(vfloat32mf2_t*)(out + 1) = v1; + *(vint8mf8_t*)(out + 2) = v2; +} + +void f2 (void * restrict in, void * restrict out) +{ + vfloat32mf2_t v1 = *(vfloat32mf2_t*)(in + 1); + vint16mf4_t v2; + *(vfloat32mf2_t*)(out + 1) = v1; + *(vint16mf4_t*)(out + 2) = v2; +} + +void f3 (void * restrict in, void * restrict out) +{ + vfloat32mf2_t v1 = *(vfloat32mf2_t*)(in + 1); + vint64m1_t v2; + *(vfloat32mf2_t*)(out + 1) = v1; + *(vint64m1_t*)(out + 2) = v2; +} + +void f4 (void * restrict in, void * restrict out) +{ + vfloat32mf2_t v1 = *(vfloat32mf2_t*)(in + 1); + vfloat64m1_t v2; + *(vfloat32mf2_t*)(out + 1) = v1; + *(vfloat64m1_t*)(out + 2) = v2; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts "-O0" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c new file mode 100644 index 00000000000..6ee416088ca --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c @@ -0,0 +1,147 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f1 (void * restrict in, void * restrict out) +{ + vbool64_t v1 = *(vbool64_t*)(in + 1); + vint16mf4_t v2; + *(vbool64_t*)(out + 1) = v1; + *(vint16mf4_t*)(out + 2) = v2; +} + +void f2 (void * restrict in, void * restrict out) +{ + vbool64_t v1 = *(vbool64_t*)(in + 1); + vint32mf2_t v2; + *(vbool64_t*)(out + 1) = v1; + *(vint32mf2_t*)(out + 2) = v2; +} + +void f3 (void * restrict in, void * restrict out) +{ + vbool64_t v1 = *(vbool64_t*)(in + 1); + vint64m1_t v2; + *(vbool64_t*)(out + 1) = v1; + *(vint64m1_t*)(out + 2) = v2; +} + +void f4 (void * restrict in, void * restrict out) +{ + vbool32_t v1 = *(vbool32_t*)(in + 1); + vint16mf2_t v2; + *(vbool32_t*)(out + 1) = v1; + *(vint16mf2_t*)(out + 2) = v2; +} + +void f5 (void * restrict in, void * restrict out) +{ + vbool32_t v1 = *(vbool32_t*)(in + 1); + vint32m1_t v2; + *(vbool32_t*)(out + 1) = v1; + *(vint32m1_t*)(out + 2) = v2; +} + +void f6 (void * restrict in, void * restrict out) +{ + vbool32_t v1 = *(vbool32_t*)(in + 1); + vint64m2_t v2; + *(vbool32_t*)(out + 1) = v1; + *(vint64m2_t*)(out + 2) = v2; +} + +void f7 (void * restrict in, void * restrict out) +{ + vbool16_t v1 = *(vbool16_t*)(in + 1); + vint16m1_t v2; + *(vbool16_t*)(out + 1) = v1; + *(vint16m1_t*)(out + 2) = v2; +} + +void f8 (void * restrict in, void * restrict out) +{ + vbool16_t v1 = *(vbool16_t*)(in + 1); + vint32m2_t v2; + *(vbool16_t*)(out + 1) = v1; + *(vint32m2_t*)(out + 2) = v2; +} + +void f9 (void * restrict in, void * restrict out) +{ + vbool16_t v1 = *(vbool16_t*)(in + 1); + vint64m4_t v2; + *(vbool16_t*)(out + 1) = v1; + *(vint64m4_t*)(out + 2) = v2; +} + +void f10 (void * restrict in, void * restrict out) +{ + vbool8_t v1 = *(vbool8_t*)(in + 1); + vint16m2_t v2; + *(vbool8_t*)(out + 1) = v1; + *(vint16m2_t*)(out + 2) = v2; +} + +void f11 (void * restrict in, void * restrict out) +{ + vbool8_t v1 = *(vbool8_t*)(in + 1); + vint32m4_t v2; + *(vbool8_t*)(out + 1) = v1; + *(vint32m4_t*)(out + 2) = v2; +} + +void f12 (void * restrict in, void * restrict out) +{ + vbool8_t v1 = *(vbool8_t*)(in + 1); + vint64m8_t v2; + *(vbool8_t*)(out + 1) = v1; + *(vint64m8_t*)(out + 2) = v2; +} + +void f13 (void * restrict in, void * restrict out) +{ + vbool4_t v1 = *(vbool4_t*)(in + 1); + vint16m4_t v2; + *(vbool4_t*)(out + 1) = v1; + *(vint16m4_t*)(out + 2) = v2; +} + +void f14 (void * restrict in, void * restrict out) +{ + vbool4_t v1 = *(vbool4_t*)(in + 1); + vint32m8_t v2; + *(vbool4_t*)(out + 1) = v1; + *(vint32m8_t*)(out + 2) = v2; +} + +void f15 (void * restrict in, void * restrict out) +{ + vbool2_t v1 = *(vbool2_t*)(in + 1); + vint16m8_t v2; + *(vbool2_t*)(out + 1) = v1; + *(vint16m8_t*)(out + 2) = v2; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli} 15 { target { no-opts "-O0" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c new file mode 100644 index 00000000000..7fba5560f88 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void foo7 (void * restrict in, void * restrict out) +{ + vbool1_t v1 = *(vbool1_t*)(in + 1); + vbool2_t v2 = *(vbool2_t*)(in + 2); + vbool4_t v3 = *(vbool4_t*)(in + 3); + vbool8_t v4 = *(vbool8_t*)(in + 4); + vbool16_t v5 = *(vbool16_t*)(in + 5); + vbool32_t v6 = *(vbool32_t*)(in + 6); + vbool64_t v7 = *(vbool64_t*)(in + 7); + *(vbool1_t*)(out + 1) = v1; + *(vbool2_t*)(out + 2) = v2; + *(vbool4_t*)(out + 3) = v3; + *(vbool8_t*)(out + 4) = v4; + *(vbool16_t*)(out + 5) = v5; + *(vbool32_t*)(out + 6) = v6; + *(vbool64_t*)(out + 7) = v7; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ +/* { dg-final { scan-assembler-times {vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 7 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ +/* { dg-final { scan-assembler-times {vsm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 7 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c new file mode 100644 index 00000000000..01ea59db736 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out) +{ + vint8mf8_t v1 = *(vint8mf8_t*)(in + 1); + vint16mf4_t v2 = *(vint16mf4_t*)(in + 2); + vint32mf2_t v3 = *(vint32mf2_t*)(in + 3); + vfloat32mf2_t v4 = *(vfloat32mf2_t*)(in + 4); + + vint8mf4_t v5 = *(vint8mf4_t*)(in + 5); + vint16mf2_t v6 = *(vint16mf2_t*)(in + 6); + + vint8mf2_t v7 = *(vint8mf2_t*)(in + 7); + + *(vint8mf8_t*)(out + 1) = v1; + *(vint16mf4_t*)(out + 2) = v2; + *(vint32mf2_t*)(out + 3) = v3; + *(vfloat32mf2_t*)(out + 4) = v4; + + *(vint8mf4_t*)(out + 5) = v5; + *(vint16mf2_t*)(out + 6) = v6; + + *(vint8mf2_t*)(out + 7) = v7; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c new file mode 100644 index 00000000000..431ec82846b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c @@ -0,0 +1,105 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out) +{ + vint8mf8_t v1 = *(vint8mf8_t*)(in + 1); + vint16mf4_t v2; + *(vint8mf8_t*)(out + 1) = v1; + *(vint16mf4_t*)(out + 2) = v2; + + vint8mf8_t v3 = *(vint8mf8_t*)(in + 3); + vint32mf2_t v4; + *(vint8mf8_t*)(out + 3) = v3; + *(vint32mf2_t*)(out + 4) = v4; + + vint8mf8_t v5 = *(vint8mf8_t*)(in + 5); + vint64m1_t v6; + *(vint8mf8_t*)(out + 5) = v5; + *(vint64m1_t*)(out + 6) = v6; + + vint8mf4_t v7 = *(vint8mf4_t*)(in + 7); + vint16mf2_t v8; + *(vint8mf4_t*)(out + 7) = v7; + *(vint16mf2_t*)(out + 8) = v8; + + vint8mf4_t v9 = *(vint8mf4_t*)(in + 9); + vint32m1_t v10; + *(vint8mf4_t*)(out + 9) = v9; + *(vint32m1_t*)(out + 10) = v10; + + vint8mf4_t v11 = *(vint8mf4_t*)(in + 11); + vint64m2_t v12; + *(vint8mf4_t*)(out + 11) = v11; + *(vint64m2_t*)(out + 12) = v12; + + vint8mf2_t v13 = *(vint8mf2_t*)(in + 13); + vint16m1_t v14; + *(vint8mf2_t*)(out + 13) = v13; + *(vint16m1_t*)(out + 14) = v14; + + vint8mf2_t v15 = *(vint8mf2_t*)(in + 15); + vint32m2_t v16; + *(vint8mf2_t*)(out + 15) = v15; + *(vint32m2_t*)(out + 16) = v16; + + vint8mf2_t v17 = *(vint8mf2_t*)(in + 17); + vint64m4_t v18; + *(vint8mf2_t*)(out + 17) = v17; + *(vint64m4_t*)(out + 18) = v18; + + vint8m1_t v19 = *(vint8m1_t*)(in + 19); + vint16m2_t v20; + *(vint8m1_t*)(out + 19) = v19; + *(vint16m2_t*)(out + 20) = v20; + + vint8m1_t v21 = *(vint8m1_t*)(in + 20); + vint32m4_t v22; + *(vint8m1_t*)(out + 20) = v21; + *(vint32m4_t*)(out + 21) = v22; + + vint8m1_t v23 = *(vint8m1_t*)(in + 23); + vint64m8_t v24; + *(vint8m1_t*)(out + 21) = v23; + *(vint64m8_t*)(out + 22) = v24; + + vint8m2_t v25 = *(vint8m2_t*)(in + 25); + vint16m4_t v26; + *(vint8m2_t*)(out + 25) = v25; + *(vint16m4_t*)(out + 26) = v26; + + vint8m2_t v27 = *(vint8m2_t*)(in + 27); + vint32m8_t v28; + *(vint8m2_t*)(out + 27) = v27; + *(vint32m8_t*)(out + 28) = v28; + + vint8m4_t v29 = *(vint8m4_t*)(in + 29); + vint16m8_t v30; + *(vint8m4_t*)(out + 29) = v29; + *(vint16m8_t*)(out + 30) = v30; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e64,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e64,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli} 15 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c new file mode 100644 index 00000000000..1660ab7d8d8 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c @@ -0,0 +1,70 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +/* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX. */ + +#include "riscv_vector.h" + +void foo1 (void * restrict in, void * restrict out) +{ + vint8mf8_t v1 = *(vint8mf8_t*)(in + 1); + vint8mf8_t v2 = *(vint8mf8_t*)(in + 2); + vint8mf8_t v3 = *(vint8mf8_t*)(in + 3); + vint8mf8_t v4 = *(vint8mf8_t*)(in + 4); + vint8mf8_t v5 = *(vint8mf8_t*)(in + 5); + vint8mf8_t v6 = *(vint8mf8_t*)(in + 6); + vint8mf8_t v7 = *(vint8mf8_t*)(in + 7); + vint8mf8_t v8 = *(vint8mf8_t*)(in + 8); + *(vint8mf8_t*)(out + 1) = v1; + *(vint8mf8_t*)(out + 2) = v2; + *(vint8mf8_t*)(out + 3) = v3; + *(vint8mf8_t*)(out + 4) = v4; + *(vint8mf8_t*)(out + 5) = v5; + *(vint8mf8_t*)(out + 6) = v6; + *(vint8mf8_t*)(out + 7) = v7; + *(vint8mf8_t*)(out + 8) = v8; +} + +void foo2 (void * restrict in, void * restrict out) +{ + vint8mf4_t v1 = *(vint8mf4_t*)(in + 1); + vint8mf4_t v2 = *(vint8mf4_t*)(in + 2); + vint8mf4_t v3 = *(vint8mf4_t*)(in + 3); + vint8mf4_t v4 = *(vint8mf4_t*)(in + 4); + vint8mf4_t v5 = *(vint8mf4_t*)(in + 5); + vint8mf4_t v6 = *(vint8mf4_t*)(in + 6); + vint8mf4_t v7 = *(vint8mf4_t*)(in + 7); + vint8mf4_t v8 = *(vint8mf4_t*)(in + 8); + *(vint8mf4_t*)(out + 1) = v1; + *(vint8mf4_t*)(out + 2) = v2; + *(vint8mf4_t*)(out + 3) = v3; + *(vint8mf4_t*)(out + 4) = v4; + *(vint8mf4_t*)(out + 5) = v5; + *(vint8mf4_t*)(out + 6) = v6; + *(vint8mf4_t*)(out + 7) = v7; + *(vint8mf4_t*)(out + 8) = v8; +} + +void foo3 (void * restrict in, void * restrict out) +{ + vint8mf2_t v1 = *(vint8mf2_t*)(in + 1); + vint8mf2_t v2 = *(vint8mf2_t*)(in + 2); + vint8mf2_t v3 = *(vint8mf2_t*)(in + 3); + vint8mf2_t v4 = *(vint8mf2_t*)(in + 4); + vint8mf2_t v5 = *(vint8mf2_t*)(in + 5); + vint8mf2_t v6 = *(vint8mf2_t*)(in + 6); + vint8mf2_t v7 = *(vint8mf2_t*)(in + 7); + vint8mf2_t v8 = *(vint8mf2_t*)(in + 8); + *(vint8mf2_t*)(out + 1) = v1; + *(vint8mf2_t*)(out + 2) = v2; + *(vint8mf2_t*)(out + 3) = v3; + *(vint8mf2_t*)(out + 4) = v4; + *(vint8mf2_t*)(out + 5) = v5; + *(vint8mf2_t*)(out + 6) = v6; + *(vint8mf2_t*)(out + 7) = v7; + *(vint8mf2_t*)(out + 8) = v8; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c new file mode 100644 index 00000000000..13c801fc33e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c @@ -0,0 +1,70 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +/* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX. */ + +#include "riscv_vector.h" + +void foo1 (void * restrict in, void * restrict out) +{ + vuint8mf8_t v1 = *(vuint8mf8_t*)(in + 1); + vuint8mf8_t v2 = *(vuint8mf8_t*)(in + 2); + vuint8mf8_t v3 = *(vuint8mf8_t*)(in + 3); + vuint8mf8_t v4 = *(vuint8mf8_t*)(in + 4); + vuint8mf8_t v5 = *(vuint8mf8_t*)(in + 5); + vuint8mf8_t v6 = *(vuint8mf8_t*)(in + 6); + vuint8mf8_t v7 = *(vuint8mf8_t*)(in + 7); + vuint8mf8_t v8 = *(vuint8mf8_t*)(in + 8); + *(vuint8mf8_t*)(out + 1) = v1; + *(vuint8mf8_t*)(out + 2) = v2; + *(vuint8mf8_t*)(out + 3) = v3; + *(vuint8mf8_t*)(out + 4) = v4; + *(vuint8mf8_t*)(out + 5) = v5; + *(vuint8mf8_t*)(out + 6) = v6; + *(vuint8mf8_t*)(out + 7) = v7; + *(vuint8mf8_t*)(out + 8) = v8; +} + +void foo2 (void * restrict in, void * restrict out) +{ + vuint8mf4_t v1 = *(vuint8mf4_t*)(in + 1); + vuint8mf4_t v2 = *(vuint8mf4_t*)(in + 2); + vuint8mf4_t v3 = *(vuint8mf4_t*)(in + 3); + vuint8mf4_t v4 = *(vuint8mf4_t*)(in + 4); + vuint8mf4_t v5 = *(vuint8mf4_t*)(in + 5); + vuint8mf4_t v6 = *(vuint8mf4_t*)(in + 6); + vuint8mf4_t v7 = *(vuint8mf4_t*)(in + 7); + vuint8mf4_t v8 = *(vuint8mf4_t*)(in + 8); + *(vuint8mf4_t*)(out + 1) = v1; + *(vuint8mf4_t*)(out + 2) = v2; + *(vuint8mf4_t*)(out + 3) = v3; + *(vuint8mf4_t*)(out + 4) = v4; + *(vuint8mf4_t*)(out + 5) = v5; + *(vuint8mf4_t*)(out + 6) = v6; + *(vuint8mf4_t*)(out + 7) = v7; + *(vuint8mf4_t*)(out + 8) = v8; +} + +void foo3 (void * restrict in, void * restrict out) +{ + vuint8mf2_t v1 = *(vuint8mf2_t*)(in + 1); + vuint8mf2_t v2 = *(vuint8mf2_t*)(in + 2); + vuint8mf2_t v3 = *(vuint8mf2_t*)(in + 3); + vuint8mf2_t v4 = *(vuint8mf2_t*)(in + 4); + vuint8mf2_t v5 = *(vuint8mf2_t*)(in + 5); + vuint8mf2_t v6 = *(vuint8mf2_t*)(in + 6); + vuint8mf2_t v7 = *(vuint8mf2_t*)(in + 7); + vuint8mf2_t v8 = *(vuint8mf2_t*)(in + 8); + *(vuint8mf2_t*)(out + 1) = v1; + *(vuint8mf2_t*)(out + 2) = v2; + *(vuint8mf2_t*)(out + 3) = v3; + *(vuint8mf2_t*)(out + 4) = v4; + *(vuint8mf2_t*)(out + 5) = v5; + *(vuint8mf2_t*)(out + 6) = v6; + *(vuint8mf2_t*)(out + 7) = v7; + *(vuint8mf2_t*)(out + 8) = v8; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c new file mode 100644 index 00000000000..2a597986e2a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c @@ -0,0 +1,49 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +/* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX. */ + +#include "riscv_vector.h" + +void foo2 (void * restrict in, void * restrict out) +{ + vint16mf4_t v1 = *(vint16mf4_t*)(in + 1); + vint16mf4_t v2 = *(vint16mf4_t*)(in + 2); + vint16mf4_t v3 = *(vint16mf4_t*)(in + 3); + vint16mf4_t v4 = *(vint16mf4_t*)(in + 4); + vint16mf4_t v5 = *(vint16mf4_t*)(in + 5); + vint16mf4_t v6 = *(vint16mf4_t*)(in + 6); + vint16mf4_t v7 = *(vint16mf4_t*)(in + 7); + vint16mf4_t v8 = *(vint16mf4_t*)(in + 8); + *(vint16mf4_t*)(out + 1) = v1; + *(vint16mf4_t*)(out + 2) = v2; + *(vint16mf4_t*)(out + 3) = v3; + *(vint16mf4_t*)(out + 4) = v4; + *(vint16mf4_t*)(out + 5) = v5; + *(vint16mf4_t*)(out + 6) = v6; + *(vint16mf4_t*)(out + 7) = v7; + *(vint16mf4_t*)(out + 8) = v8; +} + +void foo3 (void * restrict in, void * restrict out) +{ + vint16mf2_t v1 = *(vint16mf2_t*)(in + 1); + vint16mf2_t v2 = *(vint16mf2_t*)(in + 2); + vint16mf2_t v3 = *(vint16mf2_t*)(in + 3); + vint16mf2_t v4 = *(vint16mf2_t*)(in + 4); + vint16mf2_t v5 = *(vint16mf2_t*)(in + 5); + vint16mf2_t v6 = *(vint16mf2_t*)(in + 6); + vint16mf2_t v7 = *(vint16mf2_t*)(in + 7); + vint16mf2_t v8 = *(vint16mf2_t*)(in + 8); + *(vint16mf2_t*)(out + 1) = v1; + *(vint16mf2_t*)(out + 2) = v2; + *(vint16mf2_t*)(out + 3) = v3; + *(vint16mf2_t*)(out + 4) = v4; + *(vint16mf2_t*)(out + 5) = v5; + *(vint16mf2_t*)(out + 6) = v6; + *(vint16mf2_t*)(out + 7) = v7; + *(vint16mf2_t*)(out + 8) = v8; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c new file mode 100644 index 00000000000..982ec8c2567 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c @@ -0,0 +1,49 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +/* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX. */ + +#include "riscv_vector.h" + +void foo2 (void * restrict in, void * restrict out) +{ + vuint16mf4_t v1 = *(vuint16mf4_t*)(in + 1); + vuint16mf4_t v2 = *(vuint16mf4_t*)(in + 2); + vuint16mf4_t v3 = *(vuint16mf4_t*)(in + 3); + vuint16mf4_t v4 = *(vuint16mf4_t*)(in + 4); + vuint16mf4_t v5 = *(vuint16mf4_t*)(in + 5); + vuint16mf4_t v6 = *(vuint16mf4_t*)(in + 6); + vuint16mf4_t v7 = *(vuint16mf4_t*)(in + 7); + vuint16mf4_t v8 = *(vuint16mf4_t*)(in + 8); + *(vuint16mf4_t*)(out + 1) = v1; + *(vuint16mf4_t*)(out + 2) = v2; + *(vuint16mf4_t*)(out + 3) = v3; + *(vuint16mf4_t*)(out + 4) = v4; + *(vuint16mf4_t*)(out + 5) = v5; + *(vuint16mf4_t*)(out + 6) = v6; + *(vuint16mf4_t*)(out + 7) = v7; + *(vuint16mf4_t*)(out + 8) = v8; +} + +void foo3 (void * restrict in, void * restrict out) +{ + vuint16mf2_t v1 = *(vuint16mf2_t*)(in + 1); + vuint16mf2_t v2 = *(vuint16mf2_t*)(in + 2); + vuint16mf2_t v3 = *(vuint16mf2_t*)(in + 3); + vuint16mf2_t v4 = *(vuint16mf2_t*)(in + 4); + vuint16mf2_t v5 = *(vuint16mf2_t*)(in + 5); + vuint16mf2_t v6 = *(vuint16mf2_t*)(in + 6); + vuint16mf2_t v7 = *(vuint16mf2_t*)(in + 7); + vuint16mf2_t v8 = *(vuint16mf2_t*)(in + 8); + *(vuint16mf2_t*)(out + 1) = v1; + *(vuint16mf2_t*)(out + 2) = v2; + *(vuint16mf2_t*)(out + 3) = v3; + *(vuint16mf2_t*)(out + 4) = v4; + *(vuint16mf2_t*)(out + 5) = v5; + *(vuint16mf2_t*)(out + 6) = v6; + *(vuint16mf2_t*)(out + 7) = v7; + *(vuint16mf2_t*)(out + 8) = v8; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c new file mode 100644 index 00000000000..f75449e7345 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +/* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX. */ + +#include "riscv_vector.h" + +void foo3 (void * restrict in, void * restrict out) +{ + vint32mf2_t v1 = *(vint32mf2_t*)(in + 1); + vint32mf2_t v2 = *(vint32mf2_t*)(in + 2); + vint32mf2_t v3 = *(vint32mf2_t*)(in + 3); + vint32mf2_t v4 = *(vint32mf2_t*)(in + 4); + vint32mf2_t v5 = *(vint32mf2_t*)(in + 5); + vint32mf2_t v6 = *(vint32mf2_t*)(in + 6); + vint32mf2_t v7 = *(vint32mf2_t*)(in + 7); + vint32mf2_t v8 = *(vint32mf2_t*)(in + 8); + *(vint32mf2_t*)(out + 1) = v1; + *(vint32mf2_t*)(out + 2) = v2; + *(vint32mf2_t*)(out + 3) = v3; + *(vint32mf2_t*)(out + 4) = v4; + *(vint32mf2_t*)(out + 5) = v5; + *(vint32mf2_t*)(out + 6) = v6; + *(vint32mf2_t*)(out + 7) = v7; + *(vint32mf2_t*)(out + 8) = v8; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c new file mode 100644 index 00000000000..08017e24ef3 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +/* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX. */ + +#include "riscv_vector.h" + +void foo3 (void * restrict in, void * restrict out) +{ + vuint32mf2_t v1 = *(vuint32mf2_t*)(in + 1); + vuint32mf2_t v2 = *(vuint32mf2_t*)(in + 2); + vuint32mf2_t v3 = *(vuint32mf2_t*)(in + 3); + vuint32mf2_t v4 = *(vuint32mf2_t*)(in + 4); + vuint32mf2_t v5 = *(vuint32mf2_t*)(in + 5); + vuint32mf2_t v6 = *(vuint32mf2_t*)(in + 6); + vuint32mf2_t v7 = *(vuint32mf2_t*)(in + 7); + vuint32mf2_t v8 = *(vuint32mf2_t*)(in + 8); + *(vuint32mf2_t*)(out + 1) = v1; + *(vuint32mf2_t*)(out + 2) = v2; + *(vuint32mf2_t*)(out + 3) = v3; + *(vuint32mf2_t*)(out + 4) = v4; + *(vuint32mf2_t*)(out + 5) = v5; + *(vuint32mf2_t*)(out + 6) = v6; + *(vuint32mf2_t*)(out + 7) = v7; + *(vuint32mf2_t*)(out + 8) = v8; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c new file mode 100644 index 00000000000..f03cc5b1b2b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +/* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX. */ + +#include "riscv_vector.h" + +void foo3 (void * restrict in, void * restrict out) +{ + vfloat32mf2_t v1 = *(vfloat32mf2_t*)(in + 1); + vfloat32mf2_t v2 = *(vfloat32mf2_t*)(in + 2); + vfloat32mf2_t v3 = *(vfloat32mf2_t*)(in + 3); + vfloat32mf2_t v4 = *(vfloat32mf2_t*)(in + 4); + vfloat32mf2_t v5 = *(vfloat32mf2_t*)(in + 5); + vfloat32mf2_t v6 = *(vfloat32mf2_t*)(in + 6); + vfloat32mf2_t v7 = *(vfloat32mf2_t*)(in + 7); + vfloat32mf2_t v8 = *(vfloat32mf2_t*)(in + 8); + *(vfloat32mf2_t*)(out + 1) = v1; + *(vfloat32mf2_t*)(out + 2) = v2; + *(vfloat32mf2_t*)(out + 3) = v3; + *(vfloat32mf2_t*)(out + 4) = v4; + *(vfloat32mf2_t*)(out + 5) = v5; + *(vfloat32mf2_t*)(out + 6) = v6; + *(vfloat32mf2_t*)(out + 7) = v7; + *(vfloat32mf2_t*)(out + 8) = v8; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c new file mode 100644 index 00000000000..e4a734ce616 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c @@ -0,0 +1,147 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f1 (void * restrict in, void * restrict out) +{ + vint8mf8_t v1 = *(vint8mf8_t*)(in + 1); + vint16mf4_t v2; + *(vint8mf8_t*)(out + 1) = v1; + *(vint16mf4_t*)(out + 2) = v2; +} + +void f2 (void * restrict in, void * restrict out) +{ + vint8mf8_t v1 = *(vint8mf8_t*)(in + 1); + vint32mf2_t v2; + *(vint8mf8_t*)(out + 1) = v1; + *(vint32mf2_t*)(out + 2) = v2; +} + +void f3 (void * restrict in, void * restrict out) +{ + vint8mf8_t v1 = *(vint8mf8_t*)(in + 1); + vint64m1_t v2; + *(vint8mf8_t*)(out + 1) = v1; + *(vint64m1_t*)(out + 2) = v2; +} + +void f4 (void * restrict in, void * restrict out) +{ + vint8mf4_t v1 = *(vint8mf4_t*)(in + 1); + vint16mf2_t v2; + *(vint8mf4_t*)(out + 1) = v1; + *(vint16mf2_t*)(out + 2) = v2; +} + +void f5 (void * restrict in, void * restrict out) +{ + vint8mf4_t v1 = *(vint8mf4_t*)(in + 1); + vint32m1_t v2; + *(vint8mf4_t*)(out + 1) = v1; + *(vint32m1_t*)(out + 2) = v2; +} + +void f6 (void * restrict in, void * restrict out) +{ + vint8mf4_t v1 = *(vint8mf4_t*)(in + 1); + vint64m2_t v2; + *(vint8mf4_t*)(out + 1) = v1; + *(vint64m2_t*)(out + 2) = v2; +} + +void f7 (void * restrict in, void * restrict out) +{ + vint8mf2_t v1 = *(vint8mf2_t*)(in + 1); + vint16m1_t v2; + *(vint8mf2_t*)(out + 1) = v1; + *(vint16m1_t*)(out + 2) = v2; +} + +void f8 (void * restrict in, void * restrict out) +{ + vint8mf2_t v1 = *(vint8mf2_t*)(in + 1); + vint32m2_t v2; + *(vint8mf2_t*)(out + 1) = v1; + *(vint32m2_t*)(out + 2) = v2; +} + +void f9 (void * restrict in, void * restrict out) +{ + vint8mf2_t v1 = *(vint8mf2_t*)(in + 1); + vint64m4_t v2; + *(vint8mf2_t*)(out + 1) = v1; + *(vint64m4_t*)(out + 2) = v2; +} + +void f10 (void * restrict in, void * restrict out) +{ + vint8m1_t v1 = *(vint8m1_t*)(in + 1); + vint16m2_t v2; + *(vint8m1_t*)(out + 1) = v1; + *(vint16m2_t*)(out + 2) = v2; +} + +void f11 (void * restrict in, void * restrict out) +{ + vint8m1_t v1 = *(vint8m1_t*)(in + 1); + vint32m4_t v2; + *(vint8m1_t*)(out + 1) = v1; + *(vint32m4_t*)(out + 2) = v2; +} + +void f12 (void * restrict in, void * restrict out) +{ + vint8m1_t v1 = *(vint8m1_t*)(in + 1); + vint64m8_t v2; + *(vint8m1_t*)(out + 1) = v1; + *(vint64m8_t*)(out + 2) = v2; +} + +void f13 (void * restrict in, void * restrict out) +{ + vint8m2_t v1 = *(vint8m2_t*)(in + 1); + vint16m4_t v2; + *(vint8m2_t*)(out + 1) = v1; + *(vint16m4_t*)(out + 2) = v2; +} + +void f14 (void * restrict in, void * restrict out) +{ + vint8m2_t v1 = *(vint8m2_t*)(in + 1); + vint32m8_t v2; + *(vint8m2_t*)(out + 1) = v1; + *(vint32m8_t*)(out + 2) = v2; +} + +void f15 (void * restrict in, void * restrict out) +{ + vint8m4_t v1 = *(vint8m4_t*)(in + 1); + vint16m8_t v2; + *(vint8m4_t*)(out + 1) = v1; + *(vint16m8_t*)(out + 2) = v2; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli} 15 { target { no-opts "-O0" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c new file mode 100644 index 00000000000..6f0da3a1581 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c @@ -0,0 +1,86 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3" } */ + +#include "riscv_vector.h" + +/* Check vsetvl instruction is hoisted outside the loop, so it should + stay before label. */ + +void foo1 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vbool64_t v = *(vbool64_t*)(in + i); + *(vbool64_t*)(out + i) = v; + } +} + +void foo2 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vbool32_t v = *(vbool32_t*)(in + i); + *(vbool32_t*)(out + i) = v; + } +} + +void foo3 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vbool16_t v = *(vbool16_t*)(in + i); + *(vbool16_t*)(out + i) = v; + } +} + +void foo4 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vbool8_t v = *(vbool8_t*)(in + i); + *(vbool8_t*)(out + i) = v; + } +} + +void foo5 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vbool4_t v = *(vbool4_t*)(in + i); + *(vbool4_t*)(out + i) = v; + } +} + +void foo6 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vbool2_t v = *(vbool2_t*)(in + i); + *(vbool2_t*)(out + i) = v; + } +} + +void foo7 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vbool1_t v = *(vbool1_t*)(in + i); + *(vbool1_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c new file mode 100644 index 00000000000..b2dcda61d3d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c @@ -0,0 +1,42 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* Check vsetvl instruction is hoisted outside the loop, so it should + stay before label. */ + +void foo1 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vint8mf8_t v = *(vint8mf8_t*)(in + i); + *(vint8mf8_t*)(out + i) = v; + } +} + +void foo2 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vint8mf4_t v = *(vint8mf4_t*)(in + i); + *(vint8mf4_t*)(out + i) = v; + } +} + +void foo3 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vint8mf2_t v = *(vint8mf2_t*)(in + i); + *(vint8mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c new file mode 100644 index 00000000000..28215d7b033 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* Check vsetvl instruction is hoisted outside the loop, so it should + stay before label. */ + +void foo1 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vuint8mf8_t v = *(vuint8mf8_t*)(in + i); + *(vuint8mf8_t*)(out + i) = v; + } +} + +void foo2 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vuint8mf4_t v = *(vuint8mf4_t*)(in + i); + *(vuint8mf4_t*)(out + i) = v; + } +} + +void foo3 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vuint8mf2_t v = *(vuint8mf2_t*)(in + i); + *(vuint8mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c new file mode 100644 index 00000000000..6c485369ca5 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* Check vsetvl instruction is hoisted outside the loop, so it should + stay before label. */ + +void foo2 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vint16mf4_t v = *(vint16mf4_t*)(in + i); + *(vint16mf4_t*)(out + i) = v; + } +} + +void foo3 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vint16mf2_t v = *(vint16mf2_t*)(in + i); + *(vint16mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c new file mode 100644 index 00000000000..d87c4fb075e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* Check vsetvl instruction is hoisted outside the loop, so it should + stay before label. */ + +void foo2 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vuint16mf4_t v = *(vuint16mf4_t*)(in + i); + *(vuint16mf4_t*)(out + i) = v; + } +} + +void foo3 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vuint16mf2_t v = *(vuint16mf2_t*)(in + i); + *(vuint16mf2_t*)(out + i) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c new file mode 100644 index 00000000000..d8b00b5fce8 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* Check vsetvl instruction is hoisted outside the loop, so it should + stay before label. */ + +void foo2 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vint32mf2_t v = *(vint32mf2_t*)(in + i); + *(vint32mf2_t*)(out + i) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c new file mode 100644 index 00000000000..602062c54ae --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* Check vsetvl instruction is hoisted outside the loop, so it should + stay before label. */ + +void foo2 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vuint32mf2_t v = *(vuint32mf2_t*)(in + i); + *(vuint32mf2_t*)(out + i) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c new file mode 100644 index 00000000000..53659787802 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +/* Check vsetvl instruction is hoisted outside the loop, so it should + stay before label. */ + +void foo2 (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + i); + *(vfloat32mf2_t*)(out + i) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]\:\s+vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c new file mode 100644 index 00000000000..023827b2ebc --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, int n) +{ + vint8mf8_t v1 = *(vint8mf8_t*)(in + 1); + vint16mf4_t v2 = *(vint16mf4_t*)(in + 2); + vint32mf2_t v3 = *(vint32mf2_t*)(in + 3); + vfloat32mf2_t v4 = *(vfloat32mf2_t*)(in + 4); + + *(vint8mf8_t*)(out + 1) = v1; + *(vint16mf4_t*)(out + 2) = v2; + *(vint32mf2_t*)(out + 3) = v3; + *(vfloat32mf2_t*)(out + 4) = v4; + + for (int i = 0; i < n; i++) + { + vint8mf8_t v = *(vint8mf8_t*)(in + i + 5); + *(vint8mf8_t*)(out + i + 5) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c new file mode 100644 index 00000000000..6c97f3c1cc3 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c @@ -0,0 +1,47 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo (int8_t * restrict in, int8_t * restrict out, int n, int cond) +{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 10000); + *(vfloat32mf2_t*)(out + 10000) = v; + + if (cond) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 30000); + *(vfloat32mf2_t*)(out + 30000) = v; + } + else + { + vint16mf2_t v = *(vint16mf2_t*)(in + 20000); + *(vint16mf2_t*)(out + 20000) = v; + } + + for (int i = 0; i < n; i++) + { + vint32mf2_t v0 = *(vint32mf2_t*)(in + i + 100); + + vint16mf2_t v1 = *(vint16mf2_t*)(in + i + 200); + vint8mf2_t v2 = *(vint8mf2_t*)(in + i + 300); + vint8mf4_t v3 = *(vint8mf4_t*)(in + i + 400); + vint8mf8_t v4 = *(vint8mf8_t*)(in + i + 500); + vbool1_t v5 = *(vbool1_t*)(in + i + 600); + + vint32mf2_t v6 = *(vint32mf2_t*)(in + i + 700); + + *(vint32mf2_t*)(out + i + 100) = v0; + *(vint16mf2_t*)(out + i + 200) = v1; + *(vint8mf2_t*)(out + i + 300) = v2; + *(vint8mf4_t*)(out + i + 400) = v3; + *(vint8mf8_t*)(out + i + 500) = v4; + *(vbool1_t*)(out + i + 600) = v5; + *(vint32mf2_t*)(out + i + 700) = v6; + } +} + +/* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {\s*\.L[0-9]+:\s*vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9]+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-11.c new file mode 100644 index 00000000000..a6530a2712f --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-11.c @@ -0,0 +1,55 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo (int8_t * restrict in, int8_t * restrict out, int n, int cond1, int cond2) +{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 10000); + *(vfloat32mf2_t*)(out + 10000) = v; + + if (cond1) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 30000); + *(vfloat32mf2_t*)(out + 30000) = v; + } + else + { + vint8mf8_t v = *(vint8mf8_t*)(in + 20000); + *(vint8mf8_t*)(out + 20000) = v; + } + + for (int i = 0; i < n; i++) + { + vint32mf2_t v0 = *(vint32mf2_t*)(in + i + 100); + + vint16mf2_t v1 = *(vint16mf2_t*)(in + i + 200); + vint8mf2_t v2 = *(vint8mf2_t*)(in + i + 300); + vint8mf4_t v3 = *(vint8mf4_t*)(in + i + 400); + vint8mf8_t v4 = *(vint8mf8_t*)(in + i + 500); + vbool1_t v5 = *(vbool1_t*)(in + i + 600); + + vint32mf2_t v6 = *(vint32mf2_t*)(in + i + 700); + + *(vint32mf2_t*)(out + i + 100) = v0; + *(vint16mf2_t*)(out + i + 200) = v1; + *(vint8mf2_t*)(out + i + 300) = v2; + *(vint8mf4_t*)(out + i + 400) = v3; + *(vint8mf8_t*)(out + i + 500) = v4; + *(vbool1_t*)(out + i + 600) = v5; + *(vint32mf2_t*)(out + i + 700) = v6; + } + + if (cond2) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 40000); + *(vfloat32mf2_t*)(out + 40000) = v; + } + else + { + vint16mf4_t v = *(vint16mf4_t*)(in + 30000); + *(vint16mf4_t*)(out + 30000) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli} 7 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c new file mode 100644 index 00000000000..e96f246ece7 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c @@ -0,0 +1,55 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo (int8_t * restrict in, int8_t * restrict out, int n, int cond1, int cond2) +{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 10000); + *(vfloat32mf2_t*)(out + 10000) = v; + + if (cond1) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 30000); + *(vfloat32mf2_t*)(out + 30000) = v; + } + else + { + vint8mf2_t v = *(vint8mf2_t*)(in + 20000); + *(vint8mf2_t*)(out + 20000) = v; + } + + for (int i = 0; i < n; i++) + { + vint32mf2_t v0 = *(vint32mf2_t*)(in + i + 100); + + vint16mf2_t v1 = *(vint16mf2_t*)(in + i + 200); + vint8mf2_t v2 = *(vint8mf2_t*)(in + i + 300); + vint8mf4_t v3 = *(vint8mf4_t*)(in + i + 400); + vint8mf8_t v4 = *(vint8mf8_t*)(in + i + 500); + vbool1_t v5 = *(vbool1_t*)(in + i + 600); + + vint32mf2_t v6 = *(vint32mf2_t*)(in + i + 700); + + *(vint32mf2_t*)(out + i + 100) = v0; + *(vint16mf2_t*)(out + i + 200) = v1; + *(vint8mf2_t*)(out + i + 300) = v2; + *(vint8mf4_t*)(out + i + 400) = v3; + *(vint8mf8_t*)(out + i + 500) = v4; + *(vbool1_t*)(out + i + 600) = v5; + *(vint32mf2_t*)(out + i + 700) = v6; + } + + if (cond2) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 40000); + *(vfloat32mf2_t*)(out + 40000) = v; + } + else + { + vint16mf4_t v = *(vint16mf4_t*)(in + 30000); + *(vint16mf4_t*)(out + 30000) = v; + } +} +/* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+j\s+\.L[0-9]+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c new file mode 100644 index 00000000000..f6ca90bb3a4 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, int n) +{ + vint8mf8_t v1; + vint16mf4_t v2; + + *(vint8mf8_t*)(out + 1) = v1; + *(vint16mf4_t*)(out + 2) = v2; +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c new file mode 100644 index 00000000000..1bdb3626c86 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c @@ -0,0 +1,39 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, int32_t * a, int32_t * b, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } + for (int i = 0; i < n; i++) { + a[i] = a[i] + b[i]; + } + for (int i = 0; i < n; i++) { + a[i] = a[i] * b[i]; + } + for (int i = 0; i < n; i++) { + a[i] = a[i] - b[i]; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v; + *(vint32mf2_t*)(out + i + 7000) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v; + *(vint64m1_t*)(out + i + 8000) = v; + } + for (int i = 0; i < n; i++) { + vint8mf8_t v; + *(vint8mf8_t*)(out + i + 9000) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c new file mode 100644 index 00000000000..2b35de00a25 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c @@ -0,0 +1,52 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, int32_t * a, int32_t * b, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } + for (int i = 0; i < n; i++) { + a[i] = a[i] + b[i]; + } + for (int i = 0; i < n; i++) { + a[i] = a[i] * b[i]; + } + for (int i = 0; i < n; i++) { + a[i] = a[i] - b[i]; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v; + *(vint32mf2_t*)(out + i + 7000) = v; + } + for (int i = 0; i < n; i++) { + vint16mf2_t v; + *(vint16mf2_t*)(out + i + 777) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v; + *(vint64m1_t*)(out + i + 8000) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v; + *(vfloat32mf2_t*)(out + i + 7777) = v; + } + for (int i = 0; i < n; i++) { + vuint16mf2_t v; + *(vuint16mf2_t*)(out + i + 888) = v; + } + for (int i = 0; i < n; i++) { + vint8mf8_t v; + *(vint8mf8_t*)(out + i + 9000) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 7 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c new file mode 100644 index 00000000000..a04ab3674b5 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c @@ -0,0 +1,60 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, int32_t * a, int32_t * b, int n, int cond) +{ + for (int i = 0; i < n; i++) { + vint16mf4_t v; + *(vint16mf4_t*)(out + i + 700) = v; + } + for (int i = 0; i < n; i++) { + a[i] = a[i] + b[i]; + } + for (int i = 0; i < n; i++) { + a[i] = a[i] * b[i]; + } + for (int i = 0; i < n; i++) { + a[i] = a[i] - b[i]; + } + for (int i = 0; i < n; i++) { + vint32mf2_t v; + *(vint32mf2_t*)(out + i + 7000) = v; + } + for (int i = 0; i < n; i++) { + vint16mf2_t v; + *(vint16mf2_t*)(out + i + 777) = v; + } + for (int i = 0; i < n; i++) { + vint64m1_t v; + *(vint64m1_t*)(out + i + 8000) = v; + } + if (cond == 0) { + vbool64_t v; + *(vbool64_t*)(out + 1234) = v; + } else { + vuint8mf8_t v; + *(vuint8mf8_t*)(out + 5432) = v; + } + for (int i = 0; i < n; i++) { + vfloat32mf2_t v; + *(vfloat32mf2_t*)(out + i + 7777) = v; + } + for (int i = 0; i < n; i++) { + vuint16mf2_t v; + *(vuint16mf2_t*)(out + i + 888) = v; + } + for (int i = 0; i < n; i++) { + vint8mf8_t v; + *(vint8mf8_t*)(out + i + 9000) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 10 { target { no-opts "-O0" no-opts "-O1" no-opts "-funroll-loops" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c new file mode 100644 index 00000000000..623978f27e8 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, int n) +{ + vint8mf8_t v1 = *(vint8mf8_t*)(in + 1); + vint16mf4_t v2 = *(vint16mf4_t*)(in + 2); + vint32mf2_t v3 = *(vint32mf2_t*)(in + 3); + vfloat32mf2_t v4 = *(vfloat32mf2_t*)(in + 4); + + *(vint8mf8_t*)(out + 1) = v1; + *(vint16mf4_t*)(out + 2) = v2; + *(vint32mf2_t*)(out + 3) = v3; + *(vfloat32mf2_t*)(out + 4) = v4; + + for (int i = 0; i < n; i++) + { + vint16mf4_t v = *(vint16mf4_t*)(in + i + 5); + *(vint16mf4_t*)(out + i + 5) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-Os" no-opts "-flto" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-3.c new file mode 100644 index 00000000000..30c2e061c13 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-3.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, int n) +{ + vint8mf8_t v1 = *(vint8mf8_t*)(in + 1); + vint16mf4_t v2 = *(vint16mf4_t*)(in + 2); + vint32mf2_t v3 = *(vint32mf2_t*)(in + 3); + vfloat32mf2_t v4 = *(vfloat32mf2_t*)(in + 4); + + *(vint8mf8_t*)(out + 1) = v1; + *(vint16mf4_t*)(out + 2) = v2; + *(vint32mf2_t*)(out + 3) = v3; + *(vfloat32mf2_t*)(out + 4) = v4; + + for (int i = 0; i < n; i++) + { + vint16mf2_t v = *(vint16mf2_t*)(in + i + 5); + *(vint16mf2_t*)(out + i + 5) = v; + } +} + +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-flto" no-opts "-g" no-opts "-funroll-loops" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c new file mode 100644 index 00000000000..280192aecb5 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, int n) +{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 10000); + *(vfloat32mf2_t*)(out + 10000) = v; + for (int i = 0; i < n; i++) + { + vint16mf2_t v1 = *(vint16mf2_t*)(in + i + 1); + vint32mf2_t v2 = *(vint32mf2_t*)(in + i + 2); + *(vint16mf2_t*)(out + i + 1) = v1; + *(vint32mf2_t*)(out + i + 2) = v2; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" no-opts "-funroll-loops" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" no-opts "-funroll-loops" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c new file mode 100644 index 00000000000..280192aecb5 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void f (void * restrict in, void * restrict out, int n) +{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 10000); + *(vfloat32mf2_t*)(out + 10000) = v; + for (int i = 0; i < n; i++) + { + vint16mf2_t v1 = *(vint16mf2_t*)(in + i + 1); + vint32mf2_t v2 = *(vint32mf2_t*)(in + i + 2); + *(vint16mf2_t*)(out + i + 1) = v1; + *(vint32mf2_t*)(out + i + 2) = v2; + } +} + +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" no-opts "-funroll-loops" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-flto" no-opts "-g" no-opts "-funroll-loops" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c new file mode 100644 index 00000000000..52bb793a057 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c @@ -0,0 +1,33 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ + +#include "riscv_vector.h" + +void foo (void * restrict in, void * restrict out, int n) +{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 10000); + *(vfloat32mf2_t*)(out + 10000) = v; + for (int i = 0; i < n; i++) + { + vint32mf2_t v0 = *(vint32mf2_t*)(in + i + 100); + + vint16mf2_t v1 = *(vint16mf2_t*)(in + i + 200); + vint8mf2_t v2 = *(vint8mf2_t*)(in + i + 300); + vint8mf4_t v3 = *(vint8mf4_t*)(in + i + 400); + vint8mf8_t v4 = *(vint8mf8_t*)(in + i + 500); + vbool1_t v5 = *(vbool1_t*)(in + i + 600); + + vint32mf2_t v6 = *(vint32mf2_t*)(in + i + 700); + + *(vint32mf2_t*)(out + i + 100) = v0; + *(vint16mf2_t*)(out + i + 200) = v1; + *(vint8mf2_t*)(out + i + 300) = v2; + *(vint8mf4_t*)(out + i + 400) = v3; + *(vint8mf8_t*)(out + i + 500) = v4; + *(vbool1_t*)(out + i + 600) = v5; + *(vint32mf2_t*)(out + i + 700) = v6; + } +} + +/* { dg-final { scan-assembler-times {vsetvli} 7 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c new file mode 100644 index 00000000000..97df1e354db --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c @@ -0,0 +1,43 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo (int8_t * restrict in, int8_t * restrict out, int n) +{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 10000); + *(vfloat32mf2_t*)(out + 10000) = v; + + for (int i = 0 ; i < n * n; i++) + out[i] = out[i] + out[i]; + + for (int i = 0 ; i < n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0 ; i < n * n * n * n; i++) + out[i] = out[i] * out[i]; + + for (int i = 0; i < n; i++) + { + vint32mf2_t v0 = *(vint32mf2_t*)(in + i + 100); + + vint16mf2_t v1 = *(vint16mf2_t*)(in + i + 200); + vint8mf2_t v2 = *(vint8mf2_t*)(in + i + 300); + vint8mf4_t v3 = *(vint8mf4_t*)(in + i + 400); + vint8mf8_t v4 = *(vint8mf8_t*)(in + i + 500); + vbool1_t v5 = *(vbool1_t*)(in + i + 600); + + vint32mf2_t v6 = *(vint32mf2_t*)(in + i + 700); + + *(vint32mf2_t*)(out + i + 100) = v0; + *(vint16mf2_t*)(out + i + 200) = v1; + *(vint8mf2_t*)(out + i + 300) = v2; + *(vint8mf4_t*)(out + i + 400) = v3; + *(vint8mf8_t*)(out + i + 500) = v4; + *(vbool1_t*)(out + i + 600) = v5; + *(vint32mf2_t*)(out + i + 700) = v6; + } +} + +/* { dg-final { scan-assembler-times {vsetvli} 7 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c new file mode 100644 index 00000000000..57c9dd839a5 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c @@ -0,0 +1,45 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo (int8_t * restrict in, int8_t * restrict out, int n, int cond) +{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 10000); + *(vfloat32mf2_t*)(out + 10000) = v; + + if (cond) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 20000); + *(vfloat32mf2_t*)(out + 20000) = v; + } + else + { + vint16mf4_t v = *(vint16mf4_t*)(in + 20000); + *(vint16mf4_t*)(out + 20000) = v; + } + + for (int i = 0; i < n; i++) + { + vint32mf2_t v0 = *(vint32mf2_t*)(in + i + 100); + + vint16mf2_t v1 = *(vint16mf2_t*)(in + i + 200); + vint8mf2_t v2 = *(vint8mf2_t*)(in + i + 300); + vint8mf4_t v3 = *(vint8mf4_t*)(in + i + 400); + vint8mf8_t v4 = *(vint8mf8_t*)(in + i + 500); + vbool1_t v5 = *(vbool1_t*)(in + i + 600); + + vint32mf2_t v6 = *(vint32mf2_t*)(in + i + 700); + + *(vint32mf2_t*)(out + i + 100) = v0; + *(vint16mf2_t*)(out + i + 200) = v1; + *(vint8mf2_t*)(out + i + 300) = v2; + *(vint8mf4_t*)(out + i + 400) = v3; + *(vint8mf8_t*)(out + i + 500) = v4; + *(vbool1_t*)(out + i + 600) = v5; + *(vint32mf2_t*)(out + i + 700) = v6; + } +} +/* { dg-final { scan-assembler-times {vsetvli} 7 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-not {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16\s*mf4,\s*t[au],\s*m[au]} { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c new file mode 100644 index 00000000000..57c9dd839a5 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c @@ -0,0 +1,45 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ + +#include "riscv_vector.h" + +void foo (int8_t * restrict in, int8_t * restrict out, int n, int cond) +{ + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 10000); + *(vfloat32mf2_t*)(out + 10000) = v; + + if (cond) + { + vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 20000); + *(vfloat32mf2_t*)(out + 20000) = v; + } + else + { + vint16mf4_t v = *(vint16mf4_t*)(in + 20000); + *(vint16mf4_t*)(out + 20000) = v; + } + + for (int i = 0; i < n; i++) + { + vint32mf2_t v0 = *(vint32mf2_t*)(in + i + 100); + + vint16mf2_t v1 = *(vint16mf2_t*)(in + i + 200); + vint8mf2_t v2 = *(vint8mf2_t*)(in + i + 300); + vint8mf4_t v3 = *(vint8mf4_t*)(in + i + 400); + vint8mf8_t v4 = *(vint8mf8_t*)(in + i + 500); + vbool1_t v5 = *(vbool1_t*)(in + i + 600); + + vint32mf2_t v6 = *(vint32mf2_t*)(in + i + 700); + + *(vint32mf2_t*)(out + i + 100) = v0; + *(vint16mf2_t*)(out + i + 200) = v1; + *(vint8mf2_t*)(out + i + 300) = v2; + *(vint8mf4_t*)(out + i + 400) = v3; + *(vint8mf8_t*)(out + i + 500) = v4; + *(vbool1_t*)(out + i + 600) = v5; + *(vint32mf2_t*)(out + i + 700) = v6; + } +} +/* { dg-final { scan-assembler-times {vsetvli} 7 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-not {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16\s*mf4,\s*t[au],\s*m[au]} { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" } } } } */ -- 2.36.3