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From: juzhe.zhong@rivai.ai
To: gcc-patches@gcc.gnu.org
Cc: kito.cheng@gmail.com, palmer@dabbelt.com, jeffreyalaw@gmail.com,
	Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
Subject: [PATCH] RISC-V: Fix muti-line condition format
Date: Tue, 20 Dec 2022 07:09:35 +0800	[thread overview]
Message-ID: <20221219230935.89797-1-juzhe.zhong@rivai.ai> (raw)

From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>

gcc/ChangeLog:

        * config/riscv/riscv-vsetvl.cc (vlmax_avl_insn_p): Fix multi-line conditional.
        (vsetvl_insn_p): Ditto.
        (same_bb_and_before_p): Ditto.
        (same_bb_and_after_or_equal_p): Ditto.

---
 gcc/config/riscv/riscv-vsetvl.cc | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
index 3ca3fc15e5a..0c2ff630e96 100644
--- a/gcc/config/riscv/riscv-vsetvl.cc
+++ b/gcc/config/riscv/riscv-vsetvl.cc
@@ -112,8 +112,8 @@ vlmax_avl_p (rtx x)
 static bool
 vlmax_avl_insn_p (rtx_insn *rinsn)
 {
-  return INSN_CODE (rinsn) == CODE_FOR_vlmax_avlsi
-	 || INSN_CODE (rinsn) == CODE_FOR_vlmax_avldi;
+  return (INSN_CODE (rinsn) == CODE_FOR_vlmax_avlsi
+	  || INSN_CODE (rinsn) == CODE_FOR_vlmax_avldi);
 }
 
 static bool
@@ -156,24 +156,24 @@ vector_config_insn_p (rtx_insn *rinsn)
 static bool
 vsetvl_insn_p (rtx_insn *rinsn)
 {
-  return INSN_CODE (rinsn) == CODE_FOR_vsetvldi
-	 || INSN_CODE (rinsn) == CODE_FOR_vsetvlsi;
+  return (INSN_CODE (rinsn) == CODE_FOR_vsetvldi
+	 || INSN_CODE (rinsn) == CODE_FOR_vsetvlsi);
 }
 
 /* Return true if INSN1 comes befeore INSN2 in the same block.  */
 static bool
 same_bb_and_before_p (const insn_info *insn1, const insn_info *insn2)
 {
-  return (insn1->bb ()->index () == insn2->bb ()->index ())
-	 && (*insn1 < *insn2);
+  return ((insn1->bb ()->index () == insn2->bb ()->index ())
+	 && (*insn1 < *insn2));
 }
 
 /* Return true if INSN1 comes after or equal INSN2 in the same block.  */
 static bool
 same_bb_and_after_or_equal_p (const insn_info *insn1, const insn_info *insn2)
 {
-  return (insn1->bb ()->index () == insn2->bb ()->index ())
-	 && (*insn1 >= *insn2);
+  return ((insn1->bb ()->index () == insn2->bb ()->index ())
+	 && (*insn1 >= *insn2));
 }
 
 /* An "anticipatable occurrence" is one that is the first occurrence in the
-- 
2.36.1


             reply	other threads:[~2022-12-19 23:09 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-19 23:09 juzhe.zhong [this message]
2022-12-20  0:27 ` Jeff Law
2022-12-23  5:43   ` Kito Cheng

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