Re: [PATCH] rs6000: Fix some issues related to Power10 fusion [PR104024]

[Segher Boessenkool <segher@kernel.crashing.org>]

Hi!

On Mon, Dec 19, 2022 at 02:13:49PM +0800, Kewen.Lin wrote:
> on 2022/12/15 06:29, Segher Boessenkool wrote:
> > On Wed, Nov 30, 2022 at 04:30:13PM +0800, Kewen.Lin wrote:
> >> --- a/gcc/config/rs6000/genfusion.pl
> >> +++ b/gcc/config/rs6000/genfusion.pl
> >> @@ -167,7 +167,7 @@ sub gen_logical_addsubf
> >>  	$inner_comp, $inner_inv, $inner_rtl, $inner_op, $both_commute, $c4,
> >>  	$bc, $inner_arg0, $inner_arg1, $inner_exp, $outer_arg2, $outer_exp,
> >>  	$ftype, $insn, $is_subf, $is_rsubf, $outer_32, $outer_42,$outer_name,
> >> -	$fuse_type);
> >> +	$fuse_type, $constraint_cond);
> >>    KIND: foreach $kind ('scalar','vector') {
> >>        @outer_ops = @logicals;
> >>        if ( $kind eq 'vector' ) {
> >> @@ -176,12 +176,14 @@ sub gen_logical_addsubf
> >>  	  $pred = "altivec_register_operand";
> >>  	  $constraint = "v";
> >>  	  $fuse_type = "fused_vector";
> >> +	  $constraint_cond = "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode) && ";
> >>        } else {
> >>  	  $vchr = "";
> >>  	  $mode = "GPR";
> >>  	  $pred = "gpc_reg_operand";
> >>  	  $constraint = "r";
> >>  	  $fuse_type = "fused_arith_logical";
> >> +	  $constraint_cond = "";
> >>  	  push (@outer_ops, @addsub);
> >>  	  push (@outer_ops, ( "rsubf" ));
> >>        }
> > 
> > I don't like this at all.  Please use the "isa" attribute where needed?
> > Or do you need more in some cases?  But, again, separate patch.
> 
> This is to add one more condition for those define_insns, for example:

Sure, I understand that.  What I don't like is the generator program is
much too big and unstructured already, and this doesn't help at all; it
makes it quite a bit worse even.

> It's to avoid the pseudo whose mode isn't available for register constraint v
> causes ICE during reload.  I'm not sure how the "isa" attribute helps here,
> could you elaborate it?

Yeah, it doesn't help.  The condition implied by the isa attribute is
not added to the insn condition automatically; doing that could be too
expensive, and disruptive as well.  Something for stage 1 :-)

> >> +  if (TARGET_POWER10
> >> +      && (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION) == 0)
> >> +    rs6000_isa_flags |= OPTION_MASK_P10_FUSION;
> >> +  else if (!TARGET_POWER10 && TARGET_P10_FUSION)
> >> +    rs6000_isa_flags &= ~OPTION_MASK_P10_FUSION;
> > 
> > That's not right.  If you want something like this you should check for
> > TARGET_POWER10 whenever you check for TARGET_P10_FUSION; but there
> > really is no reason at all to disable P10 fusion on other CPUs (neither
> > newer nor older!).
> 
> Good point, and I just noticed that we should check tune setting instead
> of TARGET_POWER10 here?  Something like:
> 
> if (!(rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION))
>   {
>     if (processor_target_table[tune_index].processor == PROCESSOR_POWER10)
>       rs6000_isa_flags |= OPTION_MASK_P10_FUSION;
>     else
>       rs6000_isa_flags &= ~OPTION_MASK_P10_FUSION;
>   }

Yeah that looks better :-)

Maybe you can restructure the Perl code a bit in a first patch, and then
add the insn condition?  If you're not comfortable with Perl, I'll deal
with it, just update the patch.

Thanks,


Segher