From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR01-HE1-obe.outbound.protection.outlook.com (mail-he1eur01on2045.outbound.protection.outlook.com [40.107.13.45]) by sourceware.org (Postfix) with ESMTPS id EA62F3858D1E for ; Fri, 20 Jan 2023 16:40:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org EA62F3858D1E Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=P2SHQwt4OSjEHTHQa9R2o8N4V4bX7Ou5N4KQMck/rtc=; b=F+QtSlEG/3cATR1hEMggTOTM1yJEwVPLAF0cJy6EWgrpJmp1OAQqp+oqlWwKsO5wxZwsF81WJ0RV9eP171L7amGL1rEdXRVUxKGLhwr6SE/LLhEXSh0z3VgfxLlFDd9q8Mdxcpegtq03jLv6/8u6HU9aG1VpmQp+V6DBdCqCKQQ= Received: from AS9P194CA0007.EURP194.PROD.OUTLOOK.COM (2603:10a6:20b:46d::21) by GV1PR08MB8011.eurprd08.prod.outlook.com (2603:10a6:150:99::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5986.23; Fri, 20 Jan 2023 16:40:34 +0000 Received: from AM7EUR03FT061.eop-EUR03.prod.protection.outlook.com (2603:10a6:20b:46d:cafe::4f) by AS9P194CA0007.outlook.office365.com (2603:10a6:20b:46d::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.27 via Frontend Transport; Fri, 20 Jan 2023 16:40:34 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; pr=C Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by AM7EUR03FT061.mail.protection.outlook.com (100.127.140.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6023.16 via Frontend Transport; Fri, 20 Jan 2023 16:40:34 +0000 Received: ("Tessian outbound 43b0faad5a68:v132"); Fri, 20 Jan 2023 16:40:34 +0000 X-CheckRecipientChecked: true X-CR-MTA-CID: 662ea8e7cbce9bb6 X-CR-MTA-TID: 64aa7808 Received: from 1d58400fbe8a.1 by 64aa7808-outbound-1.mta.getcheckrecipient.com id 11AF151D-6425-4FE7-ADC2-2FFDE7D5EEA0.1; Fri, 20 Jan 2023 16:40:27 +0000 Received: from EUR02-VI1-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id 1d58400fbe8a.1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Fri, 20 Jan 2023 16:40:27 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=FjaRshzzU0+ah2PW1gV/g8oMIgdgwhieKf9wkyFDO5dhNzpB/F1JrldshubbZOoD9apjP4BUAb3mSKPBFPTejTsDZaEbTI+46s2JXLw/7Z3xD/mlDIBDCrMJ135/U3X6b47xiP30JajA9nxxao8cIiuU1dHWReGTfSREwQcsfZE1cqSms33DvLFK4tH6mA91jnJDm/Kae2W9BvhkNPDEncZ8aDwbAHobTP8REy3Uc06rtys9O8vSRZ9H3ojcwi3j44rJRS0Z67Upssg/ILlHChQ8ccTjmRIxHK/dBy62/sUAGGEYTn54s40FFMo2qrIYGwvvgRbe0FiUQDMaVp3t0w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=P2SHQwt4OSjEHTHQa9R2o8N4V4bX7Ou5N4KQMck/rtc=; b=BMfjZy6xdH2XYYcdjhmJW1SfUllfL2wbIFvA11q37F18/lrLknui4hUrZRmbb9lkXdIPuGO7J7ofCCPWq6UtYT/lLkq3FLWK1ziOajmnkS9mIc4hRWMJHtBnIB2QqsV/SLlh70ddU7SHMTmd8hqosTMNRJiAWv5Bkvx6J41m7Kv0TE9qbkDchX+/y8H7e3vJo0nhVHWrWHoud2606K77ehX6kldTCATlRif3vM0gH7O0TOSbSx0Iobnn4m2siD8J5Offb4/RmCLdbOAE2LekhOjxECQGC8odJRlidFs/TOvWIIqNJudqLGpC2sXH790wervuBrQpXhI1WcL71mUhFQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 40.67.248.234) smtp.rcpttodomain=gcc.gnu.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=P2SHQwt4OSjEHTHQa9R2o8N4V4bX7Ou5N4KQMck/rtc=; b=F+QtSlEG/3cATR1hEMggTOTM1yJEwVPLAF0cJy6EWgrpJmp1OAQqp+oqlWwKsO5wxZwsF81WJ0RV9eP171L7amGL1rEdXRVUxKGLhwr6SE/LLhEXSh0z3VgfxLlFDd9q8Mdxcpegtq03jLv6/8u6HU9aG1VpmQp+V6DBdCqCKQQ= Received: from DB6P193CA0007.EURP193.PROD.OUTLOOK.COM (2603:10a6:6:29::17) by DB8PR08MB5420.eurprd08.prod.outlook.com (2603:10a6:10:11a::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.25; Fri, 20 Jan 2023 16:40:23 +0000 Received: from DBAEUR03FT017.eop-EUR03.prod.protection.outlook.com (2603:10a6:6:29:cafe::ba) by DB6P193CA0007.outlook.office365.com (2603:10a6:6:29::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.19 via Frontend Transport; Fri, 20 Jan 2023 16:40:23 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 40.67.248.234) smtp.mailfrom=arm.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C Received: from nebula.arm.com (40.67.248.234) by DBAEUR03FT017.mail.protection.outlook.com (100.127.142.243) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6023.16 via Frontend Transport; Fri, 20 Jan 2023 16:40:23 +0000 Received: from AZ-NEU-EX02.Emea.Arm.com (10.251.26.5) by AZ-NEU-EX03.Arm.com (10.251.24.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Fri, 20 Jan 2023 16:40:23 +0000 Received: from AZ-NEU-EX04.Arm.com (10.251.24.32) by AZ-NEU-EX02.Emea.Arm.com (10.251.26.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Fri, 20 Jan 2023 16:40:23 +0000 Received: from e124257.nice.arm.com (10.34.105.24) by mail.arm.com (10.251.24.32) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Fri, 20 Jan 2023 16:40:22 +0000 From: Andrea Corallo To: CC: , , Andrea Corallo Subject: [PATCH 06/23] arm: improve tests for vmulltq* Date: Fri, 20 Jan 2023 17:39:31 +0100 Message-ID: <20230120163948.752531-7-andrea.corallo@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230120163948.752531-1-andrea.corallo@arm.com> References: <20230120163948.752531-1-andrea.corallo@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: DBAEUR03FT017:EE_|DB8PR08MB5420:EE_|AM7EUR03FT061:EE_|GV1PR08MB8011:EE_ X-MS-Office365-Filtering-Correlation-Id: 40712776-3346-4450-c80f-08dafb050d5f x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: fl15LX4t6cjWLLUm/9rD/BIJx3lpHdrW6tA2O7cVZgIxY88Big1e6tO7Ky4Ty5oergDTOBPEOdy5T/nRvkAHPRSe3wctT+fiQxqTO6dcFYm4lCmnLYQCQEmL/6Y0UHg28poWSlA7sQikgr62vSLSFBFaVdIDirEFBNB6h6qTw237GI/QcfQjUjqzr9LeYTbta6RfWsQ4Roz4AoN3lVXsUYoCXktCK4qmazgyLVTG1VPCuZ7REqHAjc+H+ssc6tLm0+jztR3OjaaN9XvEub+FHpaVwa2RskHVlGPEuiWsM6BVBox18s4qXJejv6TX1Y9lcMnFa+pmin+ePUVejJ+RNqsmxxhhd2k7V8Jfek+0mxrrdfa646tzltcN8X2Vjk1/JUVCIRwTotyuObVByvxXow5TE3VitQzQdcAtKh7s76QKdwhMGEf2XkBOujnaH2kc3X2qgE1AKsVS4KRtDAdaKwcpduLD+73aRRBPOL9e3xH/4+VZ18BjzoNj6z29hbOtuIh7t6BHhHmX/ANFg9ww9Y0AP9i3JbQMiG08YO5PX9nh1Rj3kRhGPF2OoEthdfL8SxvcqVwq3eL0cqyD9gjCOO/+rFRLgBpXfBg+Y1Xlh7js8jtlOt2x5apld7UKaynbZfl8twW+FuefZuvm2hU9ZnFT0WGzHBQHV5mVPpXV7jIu5dM3q0Y+E75WlIF/yrstWQwUsgmuzX1bAarxWr80IwQlAPYm/mYzYtjII7QgDvI6gGPDRZ7plcxfkcUJ2eGyT2E+dZVQswFjC3mJ+549MiZXQdknkgHT6TtK65Yd1vBopLpbnHPPdIp+9LRsJoGS X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:nebula.arm.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(136003)(396003)(376002)(346002)(451199015)(40470700004)(46966006)(36840700001)(36756003)(186003)(1076003)(26005)(6666004)(36860700001)(82740400003)(478600001)(7696005)(356005)(83380400001)(82310400005)(40480700001)(47076005)(86362001)(426003)(81166007)(40460700003)(336012)(2616005)(8936002)(4326008)(6916009)(316002)(70206006)(70586007)(84970400001)(44832011)(30864003)(5660300002)(8676002)(54906003)(41300700001)(2906002)(36900700001);DIR:OUT;SFP:1101; X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB8PR08MB5420 X-MS-Exchange-Transport-CrossTenantHeadersStripped: AM7EUR03FT061.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: a088aeeb-febe-4892-805e-08dafb05070b X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: BuaDJPwkRm5vzHPx+iZAoHjJAvHmw0RtBms7vjYF8JmLeY+p6+gEdECCDGGVpIHA9aah/EEmo0shuY3O7QeCjIv4XrNP0GLgd62RKK/xXYXswfIid+QVVmS7rBX+3cucsUmknHKRYQlyC9cg+lsSr5qmuknypvUEReDZFcABAcb5D38z5bK+4w1tQtp0npzof69ACyvIv8LOuUJZlRTSOWOv38KFIh5uTXhqj3BTVectZMXsL6zbZC9H1TNeCBbcnWOzW9jZi0tG/0Du/ZXCqGiImvIgVOmfVJgkPV+Zm+WBM42yX6HuBRt2I56ld/HxwgeP93jj2ajGV3ExUlTKSex7uLQlmvV8XsZ4wTeVrQNH4WtdQYK5z4ZFw2LfckIM7LoYYmqXgQTz86kuuO+b1OFGOl9+KtvEL+b5ZHsgj85U/mIkGIAQH+XkJ1DGojW5pj+O5L6CwEwhQujfroUPANVDD/yjdyfqL9H8G88nIMaxtD9kmUmdNEJ3ZTfbGlrtoQqrzEF7H8ZC3cX7EC8xFSrKoQWvmlDN4X/1NgSx3UudT6lxyu4MaGVheZSWmZMCytkgf7/0SMOiw64r+sVf5bbtgY6k24F1rgbHoPqcvAOwzgCk6zjEsTRham74HrqGRzP9Kr954DYpYUFXAfkroZjey/4k6R9rtOx5EIPTmg/L2HlEWc2+0wE7lfSaP2weWR5MTrSg06M8TG+lToo8lIYTHz4YKD8ICOK/mzjHAarWB8fIzOCss5MR9gjrzPE4cvV5NfQUZT0WkL7tfOz6Nw== X-Forefront-Antispam-Report: CIP:63.35.35.123;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:64aa7808-outbound-1.mta.getcheckrecipient.com;PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com;CAT:NONE;SFS:(13230022)(4636009)(346002)(376002)(39860400002)(396003)(136003)(451199015)(40470700004)(46966006)(36840700001)(40480700001)(82310400005)(47076005)(84970400001)(40460700003)(36756003)(2616005)(426003)(30864003)(4326008)(8936002)(83380400001)(44832011)(336012)(478600001)(41300700001)(186003)(26005)(8676002)(70586007)(7696005)(6916009)(5660300002)(316002)(54906003)(70206006)(1076003)(6666004)(2906002)(81166007)(82740400003)(36860700001)(86362001);DIR:OUT;SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Jan 2023 16:40:34.3354 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 40712776-3346-4450-c80f-08dafb050d5f X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT061.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV1PR08MB8011 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c: Improve test. * gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c: Likewise. --- .../arm/mve/intrinsics/vmulltq_int_m_s16.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vmulltq_int_m_s32.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vmulltq_int_m_s8.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vmulltq_int_m_u16.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vmulltq_int_m_u32.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vmulltq_int_m_u8.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vmulltq_int_s16.c | 24 +++++++++++-- .../arm/mve/intrinsics/vmulltq_int_s32.c | 24 +++++++++++-- .../arm/mve/intrinsics/vmulltq_int_s8.c | 24 +++++++++++-- .../arm/mve/intrinsics/vmulltq_int_u16.c | 24 +++++++++++-- .../arm/mve/intrinsics/vmulltq_int_u32.c | 24 +++++++++++-- .../arm/mve/intrinsics/vmulltq_int_u8.c | 24 +++++++++++-- .../arm/mve/intrinsics/vmulltq_int_x_s16.c | 33 ++++++++++++++++-- .../arm/mve/intrinsics/vmulltq_int_x_s32.c | 33 ++++++++++++++++-- .../arm/mve/intrinsics/vmulltq_int_x_s8.c | 33 ++++++++++++++++-- .../arm/mve/intrinsics/vmulltq_int_x_u16.c | 33 ++++++++++++++++-- .../arm/mve/intrinsics/vmulltq_int_x_u32.c | 33 ++++++++++++++++-- .../arm/mve/intrinsics/vmulltq_int_x_u8.c | 33 ++++++++++++++++-- .../arm/mve/intrinsics/vmulltq_poly_m_p16.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vmulltq_poly_m_p8.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vmulltq_poly_p16.c | 24 +++++++++++-- .../arm/mve/intrinsics/vmulltq_poly_p8.c | 24 +++++++++++-- .../arm/mve/intrinsics/vmulltq_poly_x_p16.c | 33 ++++++++++++++++-- .../arm/mve/intrinsics/vmulltq_poly_x_p8.c | 33 ++++++++++++++++-- 24 files changed, 656 insertions(+), 72 deletions(-) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c index 25ecf7a2c51..7f573e9109e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmulltq_int_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmulltq_int_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c index f8d02880ea0..da440dd1365 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmulltq_int_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmulltq_int_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c index 3f2fc333a65..ceb8e1d5a94 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vmulltq_int_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vmulltq_int_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c index b7ab408d53c..a751546ae13 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmulltq_int_m_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmulltq_int_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c index e43ad98d933..a6c4d272968 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64x2_t foo (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vmulltq_int_m_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64x2_t foo1 (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vmulltq_int_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c index 7f4b90b08dd..1a7466bb5b8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmulltq_int_m_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmulltq_int_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c index 34b75d4abc8..cd907f6224c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmullt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int16x8_t a, int16x8_t b) { return vmulltq_int_s16 (a, b); } -/* { dg-final { scan-assembler "vmullt.s16" } } */ +/* +**foo1: +** ... +** vmullt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int16x8_t a, int16x8_t b) { return vmulltq_int (a, b); } -/* { dg-final { scan-assembler "vmullt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c index 7e09bf93e0e..dbc4c80b440 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmullt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo (int32x4_t a, int32x4_t b) { return vmulltq_int_s32 (a, b); } -/* { dg-final { scan-assembler "vmullt.s32" } } */ +/* +**foo1: +** ... +** vmullt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo1 (int32x4_t a, int32x4_t b) { return vmulltq_int (a, b); } -/* { dg-final { scan-assembler "vmullt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c index b6eb1f5e7f2..0fef6a21207 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmullt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int8x16_t a, int8x16_t b) { return vmulltq_int_s8 (a, b); } -/* { dg-final { scan-assembler "vmullt.s8" } } */ +/* +**foo1: +** ... +** vmullt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int8x16_t a, int8x16_t b) { return vmulltq_int (a, b); } -/* { dg-final { scan-assembler "vmullt.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c index f4fc9c0c634..91b6fb4595d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmullt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint16x8_t a, uint16x8_t b) { return vmulltq_int_u16 (a, b); } -/* { dg-final { scan-assembler "vmullt.u16" } } */ +/* +**foo1: +** ... +** vmullt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint16x8_t a, uint16x8_t b) { return vmulltq_int (a, b); } -/* { dg-final { scan-assembler "vmullt.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c index d1bc3a8f990..71c62a12afb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmullt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64x2_t foo (uint32x4_t a, uint32x4_t b) { return vmulltq_int_u32 (a, b); } -/* { dg-final { scan-assembler "vmullt.u32" } } */ +/* +**foo1: +** ... +** vmullt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64x2_t foo1 (uint32x4_t a, uint32x4_t b) { return vmulltq_int (a, b); } -/* { dg-final { scan-assembler "vmullt.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c index 87f3c4e386a..7506adce33e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmullt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint8x16_t a, uint8x16_t b) { return vmulltq_int_u8 (a, b); } -/* { dg-final { scan-assembler "vmullt.u8" } } */ +/* +**foo1: +** ... +** vmullt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint8x16_t a, uint8x16_t b) { return vmulltq_int (a, b); } -/* { dg-final { scan-assembler "vmullt.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c index c13ef50147e..c2376abe268 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmulltq_int_x_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmulltq_int_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c index e82321ecb79..788789db120 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmulltq_int_x_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmulltq_int_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c index 7f093c26080..3935741d041 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vmulltq_int_x_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vmulltq_int_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c index d0f6461448b..32ee5b2e4e8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmulltq_int_x_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmulltq_int_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c index 55e19cb204a..cc3105650a1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64x2_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vmulltq_int_x_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64x2_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vmulltq_int_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c index 650c9471c7e..01713fba245 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmulltq_int_x_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmulltq_int_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c index 944db4c2fab..6d368e2ba68 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmulltq_poly_m_p16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.p16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmulltq_poly_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.p16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c index d07311943c2..75b8811fdd9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmulltq_poly_m_p8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.p8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmulltq_poly_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.p8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c index 121de8e9c0e..9f08d57eef9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmullt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint16x8_t a, uint16x8_t b) { return vmulltq_poly_p16 (a, b); } -/* { dg-final { scan-assembler "vmullt.p16" } } */ +/* +**foo1: +** ... +** vmullt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint16x8_t a, uint16x8_t b) { return vmulltq_poly (a, b); } -/* { dg-final { scan-assembler "vmullt.p16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c index c7d9548a8ab..59e6e1bb6e0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmullt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint8x16_t a, uint8x16_t b) { return vmulltq_poly_p8 (a, b); } -/* { dg-final { scan-assembler "vmullt.p8" } } */ +/* +**foo1: +** ... +** vmullt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint8x16_t a, uint8x16_t b) { return vmulltq_poly (a, b); } -/* { dg-final { scan-assembler "vmullt.p8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c index fb4b849b8b0..f3d3de2d1d6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmulltq_poly_x_p16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.p16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmulltq_poly_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c index 1e79b2987c9..2c7a6294540 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmulltq_poly_x_p8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmulltt.p8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmulltt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmulltq_poly_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file -- 2.25.1