From: Segher Boessenkool <segher@kernel.crashing.org>
To: Michael Meissner <meissner@linux.ibm.com>,
gcc-patches@gcc.gnu.org, "Kewen.Lin" <linkw@linux.ibm.com>,
David Edelsohn <dje.gcc@gmail.com>,
Peter Bergner <bergner@linux.ibm.com>,
Will Schmidt <will_schmidt@vnet.ibm.com>
Subject: Re: [PATCH 0/6] PowerPC Dense Math prelimary support (-mcpu=future)
Date: Wed, 1 Feb 2023 18:05:19 -0600 [thread overview]
Message-ID: <20230202000519.GZ25951@gate.crashing.org> (raw)
In-Reply-To: <Y9nc9zStwWpFH3Cq@toto.the-meissners.org>
On Tue, Jan 31, 2023 at 10:31:03PM -0500, Michael Meissner wrote:
> Ok, I tracked down the source of the bug. The CCP pass is depending on the
> precision field. Unfortunately in tree-core.h, the precision is a 10 integer
> bit field, so 1,024 will become 0.
>
> Having a 0 precision meant that the hwint function for sign extending a value
> would generate:
>
> (HOST_WIDE_INT)(((unsigned HOST_WIDE_INT)value << 64) >> 64)
>
> which is undefined behavior in C and C++. On the x86_64 doing the shift left
> and then right gives you the initial value (which was -1), while on the PowerPC
> it always gives you 0. The CCP code was assuming if it wasn't -1, that it was
> an integer, but the TDO type is opaque, not integer.
Variable 64-bit shifts on x86 mask the shift amount to 6 bits, while on
PowerPC it is masked to 7 bits. It sounds like that is what you hit,
with some -O0 build perhaps. But either way UB is UB, the program has
no meaning, any output is correct, no output is correct as well :-)
Nasal demons and all that.
bootstrap-ubsan should have found this?
Segher
prev parent reply other threads:[~2023-02-02 0:06 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-10 2:43 Michael Meissner
2022-11-10 2:44 ` [PATCH 1/6] PowerPC: Add -mcpu=future Michael Meissner
2022-11-11 21:07 ` Peter Bergner
2023-01-20 21:05 ` Ping: " Michael Meissner
2023-01-27 20:00 ` Segher Boessenkool
2022-11-10 2:45 ` [PATCH 2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair Michael Meissner
2023-01-20 21:07 ` Ping: " Michael Meissner
2022-11-10 2:46 ` [PATCH 3/6] PowerPC: Add support for accumulators in DMR registers Michael Meissner
2023-01-20 21:08 ` Ping: " Michael Meissner
2022-11-10 2:50 ` [PATCH 4/6] PowerPC: Make MMA insns support " Michael Meissner
2023-01-20 21:10 ` Ping: " Michael Meissner
2022-11-10 2:51 ` [PATCH 5/6] PowerPC: Switch to dense math names for all MMA operations Michael Meissner
2023-01-20 21:11 ` Ping: " Michael Meissner
2022-11-10 2:52 ` [PATCH 6/6] PowerPC: Add support for 1,024 bit DMR registers Michael Meissner
2023-01-20 21:12 ` Ping: " Michael Meissner
2022-11-12 5:07 ` [PATCH 7] PowerPC: Add -mcpu=future saturating subtract built-ins Michael Meissner
2023-01-20 21:13 ` Ping: " Michael Meissner
2022-11-12 5:10 ` [PATCH 8] PowerPC: Support load/store vector with right length Michael Meissner
2023-01-20 21:15 ` Patch: " Michael Meissner
2023-01-27 19:59 ` [PATCH 0/6] PowerPC Dense Math prelimary support (-mcpu=future) Segher Boessenkool
2023-01-28 7:29 ` Michael Meissner
2023-01-30 2:52 ` Michael Meissner
2023-02-01 3:31 ` Michael Meissner
2023-02-02 0:05 ` Segher Boessenkool [this message]
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