From: Richard Biener <rguenther@suse.de>
To: gcc-patches@gcc.gnu.org
Subject: [PATCH] target/108738 - optimize bit operations in STV
Date: Thu, 9 Feb 2023 14:24:40 +0000 (UTC) [thread overview]
Message-ID: <20230209142440.OLrdX31_cR8Y3XSoIL2Th9BIqvkPb8GaCd7queE0ro0@z> (raw)
The following does low-hanging optimizations, combining bitmap
test and set and removing redundant operations.
This shaves off half of the testcase compile time.
Bootstrapped and tested on x86_64-unknown-linux-gnu, OK?
Thanks,
Richard.
PR target/108738
* config/i386/i386-features.cc (scalar_chain::add_to_queue):
Combine bitmap test and set.
(scalar_chain::add_insn): Likewise.
(scalar_chain::analyze_register_chain): Remove redundant
attempt to add to queue and instead strengthen assert.
Sink common attempts to mark the def dual-mode.
(scalar_chain::add_to_queue): Remove redundant insn bitmap
check.
---
gcc/config/i386/i386-features.cc | 18 ++++++++----------
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/gcc/config/i386/i386-features.cc b/gcc/config/i386/i386-features.cc
index 9bd6d8677bb..eff91301009 100644
--- a/gcc/config/i386/i386-features.cc
+++ b/gcc/config/i386/i386-features.cc
@@ -314,14 +314,12 @@ scalar_chain::~scalar_chain ()
void
scalar_chain::add_to_queue (unsigned insn_uid)
{
- if (bitmap_bit_p (insns, insn_uid)
- || bitmap_bit_p (queue, insn_uid))
+ if (!bitmap_set_bit (queue, insn_uid))
return;
if (dump_file)
fprintf (dump_file, " Adding insn %d into chain's #%d queue\n",
insn_uid, chain_id);
- bitmap_set_bit (queue, insn_uid);
}
/* For DImode conversion, mark register defined by DEF as requiring
@@ -362,10 +360,9 @@ void
scalar_chain::analyze_register_chain (bitmap candidates, df_ref ref)
{
df_link *chain;
+ bool mark_def = false;
- gcc_assert (bitmap_bit_p (insns, DF_REF_INSN_UID (ref))
- || bitmap_bit_p (candidates, DF_REF_INSN_UID (ref)));
- add_to_queue (DF_REF_INSN_UID (ref));
+ gcc_checking_assert (bitmap_bit_p (insns, DF_REF_INSN_UID (ref)));
for (chain = DF_REF_CHAIN (ref); chain; chain = chain->next)
{
@@ -398,9 +395,12 @@ scalar_chain::analyze_register_chain (bitmap candidates, df_ref ref)
if (dump_file)
fprintf (dump_file, " r%d use in insn %d isn't convertible\n",
DF_REF_REGNO (chain->ref), uid);
- mark_dual_mode_def (ref);
+ mark_def = true;
}
}
+
+ if (mark_def)
+ mark_dual_mode_def (ref);
}
/* Add instruction into a chain. */
@@ -408,14 +408,12 @@ scalar_chain::analyze_register_chain (bitmap candidates, df_ref ref)
void
scalar_chain::add_insn (bitmap candidates, unsigned int insn_uid)
{
- if (bitmap_bit_p (insns, insn_uid))
+ if (!bitmap_set_bit (insns, insn_uid))
return;
if (dump_file)
fprintf (dump_file, " Adding insn %d to chain #%d\n", insn_uid, chain_id);
- bitmap_set_bit (insns, insn_uid);
-
rtx_insn *insn = DF_INSN_UID_GET (insn_uid)->insn;
rtx def_set = single_set (insn);
if (def_set && REG_P (SET_DEST (def_set))
--
2.35.3
next reply other threads:[~2023-02-09 14:24 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-09 14:24 Richard Biener [this message]
2023-02-14 13:58 Richard Biener
[not found] <20230209142502.30F293858413@sourceware.org>
2023-02-14 16:24 ` Uros Bizjak
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