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([2a01:4f9:3a:1e26::2]) by smtp.gmail.com with ESMTPSA id c15-20020a17090603cf00b0088bd62b1cbbsm2976956eja.192.2023.02.10.14.42.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Feb 2023 14:42:02 -0800 (PST) From: Philipp Tomsich To: gcc-patches@gcc.gnu.org Cc: Kito Cheng , Christoph Muellner , Palmer Dabbelt , Andrew Waterman , Vineet Gupta , Philipp Tomsich Subject: [RFC PATCH v1 09/10] RISC-V: Recognize xventanacondops extension Date: Fri, 10 Feb 2023 23:41:49 +0100 Message-Id: <20230210224150.2801962-10-philipp.tomsich@vrull.eu> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230210224150.2801962-1-philipp.tomsich@vrull.eu> References: <20230210224150.2801962-1-philipp.tomsich@vrull.eu> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,JMQ_SPF_NEUTRAL,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This adds the xventanacondops extension to the option parsing and as a default for the ventana-vt1 core: gcc/Changelog: * common/config/riscv/riscv-common.cc: Recognize "xventanacondops" as part of an architecture string. * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): Define. (TARGET_XVENTANACONDOPS): Define. * config/riscv/riscv.opt: Add "riscv_xventanacondops". Signed-off-by: Philipp Tomsich --- gcc/common/config/riscv/riscv-common.cc | 2 ++ gcc/config/riscv/riscv-opts.h | 3 +++ gcc/config/riscv/riscv.opt | 3 +++ 3 files changed, 8 insertions(+) diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc index 999e1926db1..a77a04d68d9 100644 --- a/gcc/common/config/riscv/riscv-common.cc +++ b/gcc/common/config/riscv/riscv-common.cc @@ -1250,6 +1250,8 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] = {"svinval", &gcc_options::x_riscv_sv_subext, MASK_SVINVAL}, {"svnapot", &gcc_options::x_riscv_sv_subext, MASK_SVNAPOT}, + {"xventanacondops", &gcc_options::x_riscv_xventanacondops, MASK_XVENTANACONDOPS}, + {NULL, NULL, 0} }; diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h index 61d5212da20..d80e81c6c28 100644 --- a/gcc/config/riscv/riscv-opts.h +++ b/gcc/config/riscv/riscv-opts.h @@ -191,4 +191,7 @@ enum stack_protector_guard { ? 0 \ : 32 << (__builtin_popcount (riscv_zvl_flags) - 1)) +#define MASK_XVENTANACONDOPS (1 << 0) +#define TARGET_XVENTANACONDOPS ((riscv_xventanacondops & MASK_XVENTANACONDOPS) != 0) + #endif /* ! GCC_RISCV_OPTS_H */ diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt index e78c99382cd..6ebaad43d0e 100644 --- a/gcc/config/riscv/riscv.opt +++ b/gcc/config/riscv/riscv.opt @@ -233,6 +233,9 @@ int riscv_zm_subext TargetVariable int riscv_sv_subext +TargetVariable +int riscv_xventanacondops = 0 + Enum Name(isa_spec_class) Type(enum riscv_isa_spec_class) Supported ISA specs (for use with the -misa-spec= option): -- 2.34.1