From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtpbguseast2.qq.com (smtpbguseast2.qq.com [54.204.34.130]) by sourceware.org (Postfix) with ESMTPS id EC6CA3858D35 for ; Wed, 15 Feb 2023 11:22:42 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org EC6CA3858D35 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp82t1676460153tdokwxqv Received: from rios-cad5.localdomain ( [58.60.1.11]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 15 Feb 2023 19:22:32 +0800 (CST) X-QQ-SSF: 01400000000000E0L000000A0000000 X-QQ-FEAT: ILHsT53NKPiGoLMKatDlbUE6aAPfdulNuCwdZn64p3xdzlOS1xbyFYlKw9Tpf 3XKqXtpPFa5OYDRTsChXfrOO1RNkmvhiQZcom9/LHFZ++btwXT8YbYRURc+Jrv8bScCikkt KGmbkj34P2Tfxca0SaFX2R3kGPN/568bMiL1a/E0W+tKdyFGLZ0ZPqdbx0UXSUEhclq9EAZ r2ASzhMAU6DG5u3oL3VrMx5VSnZbG3BHUkAv0Sf8LkxwLq9qTp3/hSnJjgTERkvFHttMOPQ 9Ak8HUrZKDciwkvovqVR41Pvx73e3fKjhVVqxcowkvEu4rAvcNCc7Dpbvaek5fLJbrp0PaA VF4ucpduy9ASQNSwrkVWx+OOrt3mM4NlMfNuDBQHK+280cDX7tK78donq9mKeeHF520liX7 X-QQ-GoodBg: 2 From: juzhe.zhong@rivai.ai To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, Ju-Zhe Zhong Subject: [PATCH] RISC-V: Rename tu_preds to none_tu_preds [NFC] Date: Wed, 15 Feb 2023 19:22:31 +0800 Message-Id: <20230215112231.45341-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvr:qybglogicsvr7 X-Spam-Status: No, score=-13.0 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: Ju-Zhe Zhong To be consistent with other naming of preds array variable. Change tu_preds into none_tu_preds which indicate such preds include vop and vop_tu combinations. gcc/ChangeLog: * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename. (vsbc): Ditto. (vmerge): Ditto. (vmv_v): Ditto. * config/riscv/riscv-vector-builtins.cc: Ditto. --- .../riscv/riscv-vector-builtins-functions.def | 16 ++++++++-------- gcc/config/riscv/riscv-vector-builtins.cc | 2 +- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/gcc/config/riscv/riscv-vector-builtins-functions.def b/gcc/config/riscv/riscv-vector-builtins-functions.def index 9bad1373bfd..e6c19691d17 100644 --- a/gcc/config/riscv/riscv-vector-builtins-functions.def +++ b/gcc/config/riscv/riscv-vector-builtins-functions.def @@ -113,14 +113,14 @@ DEF_RVV_FUNCTION (vsext, alu, full_preds, i_vf4_ops) DEF_RVV_FUNCTION (vsext, alu, full_preds, i_vf8_ops) // 11.4. Vector Integer Add-with-Carry/Subtract-with-Borrow Instructions -DEF_RVV_FUNCTION (vadc, no_mask_policy, tu_preds, iu_vvvm_ops) -DEF_RVV_FUNCTION (vadc, no_mask_policy, tu_preds, iu_vvxm_ops) +DEF_RVV_FUNCTION (vadc, no_mask_policy, none_tu_preds, iu_vvvm_ops) +DEF_RVV_FUNCTION (vadc, no_mask_policy, none_tu_preds, iu_vvxm_ops) DEF_RVV_FUNCTION (vmadc, return_mask, none_preds, iu_mvvm_ops) DEF_RVV_FUNCTION (vmadc, return_mask, none_preds, iu_mvxm_ops) DEF_RVV_FUNCTION (vmadc, return_mask, none_preds, iu_mvv_ops) DEF_RVV_FUNCTION (vmadc, return_mask, none_preds, iu_mvx_ops) -DEF_RVV_FUNCTION (vsbc, no_mask_policy, tu_preds, iu_vvvm_ops) -DEF_RVV_FUNCTION (vsbc, no_mask_policy, tu_preds, iu_vvxm_ops) +DEF_RVV_FUNCTION (vsbc, no_mask_policy, none_tu_preds, iu_vvvm_ops) +DEF_RVV_FUNCTION (vsbc, no_mask_policy, none_tu_preds, iu_vvxm_ops) DEF_RVV_FUNCTION (vmsbc, return_mask, none_preds, iu_mvvm_ops) DEF_RVV_FUNCTION (vmsbc, return_mask, none_preds, iu_mvxm_ops) DEF_RVV_FUNCTION (vmsbc, return_mask, none_preds, iu_mvv_ops) @@ -230,12 +230,12 @@ DEF_RVV_FUNCTION (vwmaccsu, alu, full_preds, i_su_wwxv_ops) DEF_RVV_FUNCTION (vwmaccus, alu, full_preds, i_us_wwxv_ops) // 11.15. Vector Integer Merge Instructions -DEF_RVV_FUNCTION (vmerge, no_mask_policy, tu_preds, all_vvvm_ops) -DEF_RVV_FUNCTION (vmerge, no_mask_policy, tu_preds, iu_vvxm_ops) +DEF_RVV_FUNCTION (vmerge, no_mask_policy, none_tu_preds, all_vvvm_ops) +DEF_RVV_FUNCTION (vmerge, no_mask_policy, none_tu_preds, iu_vvxm_ops) // 11.16 Vector Integer Move Instructions -DEF_RVV_FUNCTION (vmv_v, move, tu_preds, all_v_ops) -DEF_RVV_FUNCTION (vmv_v, move, tu_preds, iu_x_ops) +DEF_RVV_FUNCTION (vmv_v, move, none_tu_preds, all_v_ops) +DEF_RVV_FUNCTION (vmv_v, move, none_tu_preds, iu_x_ops) /* 12. Vector Fixed-Point Arithmetic Instructions. */ diff --git a/gcc/config/riscv/riscv-vector-builtins.cc b/gcc/config/riscv/riscv-vector-builtins.cc index 54681bab3ea..97ca1f11541 100644 --- a/gcc/config/riscv/riscv-vector-builtins.cc +++ b/gcc/config/riscv/riscv-vector-builtins.cc @@ -481,7 +481,7 @@ static CONSTEXPR const predication_type_index full_preds[] PRED_TYPE_tumu, PRED_TYPE_mu, NUM_PRED_TYPES}; /* vop/vop_tu will be registered. */ -static CONSTEXPR const predication_type_index tu_preds[] +static CONSTEXPR const predication_type_index none_tu_preds[] = {PRED_TYPE_none, PRED_TYPE_tu, NUM_PRED_TYPES}; /* vop/vop_m will be registered. */ -- 2.36.3