From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from cstnet.cn (smtp80.cstnet.cn [159.226.251.80]) by sourceware.org (Postfix) with ESMTP id 3835C3858412 for ; Thu, 16 Feb 2023 07:50:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 3835C3858412 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=iscas.ac.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=iscas.ac.cn Received: from localhost.localdomain (unknown [39.170.88.238]) by APP-01 (Coremail) with SMTP id qwCowAAXG0c54O1jP3dbBQ--.9892S7; Thu, 16 Feb 2023 15:50:21 +0800 (CST) From: Liao Shihua To: gcc-patches@gcc.gnu.org Cc: jiawei@iscas.ac.cn, kito.cheng@gmail.com, mjos@iki.fi, palmer@dabbelt.com, shiyulong@iscas.ac.cn, ben.marshall@pqshield.com, christoph.muellner@vrull.eu, Liao Shihua Subject: [PATCH V2 5/5] Implement ZKSH and ZKSED extensions Date: Thu, 16 Feb 2023 15:50:05 +0800 Message-Id: <20230216075005.2600-6-shihua@iscas.ac.cn> X-Mailer: git-send-email 2.38.1.windows.1 In-Reply-To: <20230216075005.2600-1-shihua@iscas.ac.cn> References: <20230216075005.2600-1-shihua@iscas.ac.cn> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID:qwCowAAXG0c54O1jP3dbBQ--.9892S7 X-Coremail-Antispam: 1UD129KBjvJXoW3AFW7WF1fGrW3ZF1UJw1kZrb_yoW3CFW7pa 98J3y5AFW8Xrs3Ga4SqF95J345A3s7Ww45ZasxurWDAayUJrZ7tFnFkw1Iv3yDXF15Cr1a kayFkFWj9r4jyw7anT9S1TB71UUUUUDqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUPI14x267AKxVWrJVCq3wAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_JF0E3s1l82xGYI kIc2x26xkF7I0E14v26ryj6s0DM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2 z4x0Y4vE2Ix0cI8IcVAFwI0_Gr0_Xr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Gr1j6F 4UJwA2z4x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjcxK6I8E87Iv6xkF7I0E14v26F4U JVW0owAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7V C0I7IYx2IY67AKxVWUGVWUXwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j 6r4UM4x0Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwCY1x0262kKe7AKxV WUtVW8ZwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E 14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jw0_GFylIx kGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVW8JVW5JwCI42IY6xIIjxv20xvEc7CjxVAF wI0_Gr1j6F4UJwCI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Gr 0_Cr1lIxAIcVC2z280aVCY1x0267AKxVW8Jr0_Cr1UYxBIdaVFxhVjvjDU0xZFpf9x0JUW MKtUUUUU= X-Originating-IP: [39.170.88.238] X-CM-SenderInfo: xvklx33d6l2u1dvotugofq/1tbiCgwEEWPt2n8S7gAAsE X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,KAM_SHORT,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This patch support Zksh and Zksed extension. It includes instruction's machine description, built-in funtion, and intrinsics. gcc/ChangeLog: * config/riscv/crypto.md (riscv_sm3p0_): Add ZKSH's and ZKSED's instructions. (riscv_sm3p1_): Likewise. (riscv_sm4ed_): Likewise. (riscv_sm4ks_): Likewise. * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSH's and ZKSED's AVAIL. * config/riscv/riscv-crypto.def (RISCV_BUILTIN): Add ZKSH's and ZKSED's built-in functions. * config/riscv/riscv_scalar_crypto.h (__riscv_sm4ks): Add ZKSH's and ZKSED's intrinsics. (__riscv_sm4ed): Likewise. (__riscv_sm3p0): Likewise. (__riscv_sm3p1): Likewise. gcc/testsuite/ChangeLog: * gcc.target/riscv/zksed.c: New test. * gcc.target/riscv/zksh.c: New test. Co-Authored-By: SiYu Wu --- gcc/config/riscv/crypto.md | 50 +++++++++++++++++++++++++- gcc/config/riscv/riscv-builtins.cc | 4 +++ gcc/config/riscv/riscv-crypto.def | 12 +++++++ gcc/config/riscv/riscv_scalar_crypto.h | 20 +++++++++++ gcc/testsuite/gcc.target/riscv/zksed.c | 20 +++++++++++ gcc/testsuite/gcc.target/riscv/zksh.c | 19 ++++++++++ 6 files changed, 124 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/riscv/zksed.c create mode 100644 gcc/testsuite/gcc.target/riscv/zksh.c diff --git a/gcc/config/riscv/crypto.md b/gcc/config/riscv/crypto.md index 063a8025f20..e28bdd91078 100644 --- a/gcc/config/riscv/crypto.md +++ b/gcc/config/riscv/crypto.md @@ -64,6 +64,14 @@ UNSPEC_SHA_512_SUM0R UNSPEC_SHA_512_SUM1 UNSPEC_SHA_512_SUM1R + + ;; ZKSH unspecs + UNSPEC_SM3_P0 + UNSPEC_SM3_P1 + + ;; ZKSED unspecs + UNSPEC_SM4_ED + UNSPEC_SM4_KS ]) ;; ZBKB extension @@ -384,4 +392,44 @@ UNSPEC_SHA_512_SUM1))] "TARGET_ZKNH && TARGET_64BIT" "sha512sum1\t%0,%1" - [(set_attr "type" "crypto")]) \ No newline at end of file + [(set_attr "type" "crypto")]) + + ;; ZKSH + +(define_insn "riscv_sm3p0_" + [(set (match_operand:X 0 "register_operand" "=r") + (unspec:X [(match_operand:X 1 "register_operand" "r")] + UNSPEC_SM3_P0))] + "TARGET_ZKSH" + "sm3p0\t%0,%1" + [(set_attr "type" "crypto")]) + +(define_insn "riscv_sm3p1_" + [(set (match_operand:X 0 "register_operand" "=r") + (unspec:X [(match_operand:X 1 "register_operand" "r")] + UNSPEC_SM3_P1))] + "TARGET_ZKSH" + "sm3p1\t%0,%1" + [(set_attr "type" "crypto")]) + +;; ZKSED + +(define_insn "riscv_sm4ed_" + [(set (match_operand:X 0 "register_operand" "=r") + (unspec:X [(match_operand:X 1 "register_operand" "r") + (match_operand:X 2 "register_operand" "r") + (match_operand:SI 3 "register_operand" "D03")] + UNSPEC_SM4_ED))] + "TARGET_ZKSED" + "sm4ed\t%0,%1,%2,%3" + [(set_attr "type" "crypto")]) + +(define_insn "riscv_sm4ks_" + [(set (match_operand:X 0 "register_operand" "=r") + (unspec:X [(match_operand:X 1 "register_operand" "r") + (match_operand:X 2 "register_operand" "r") + (match_operand:SI 3 "register_operand" "D03")] + UNSPEC_SM4_KS))] + "TARGET_ZKSED" + "sm4ks\t%0,%1,%2,%3" + [(set_attr "type" "crypto")]) diff --git a/gcc/config/riscv/riscv-builtins.cc b/gcc/config/riscv/riscv-builtins.cc index 2a35167e6fb..18c0cce6b8b 100644 --- a/gcc/config/riscv/riscv-builtins.cc +++ b/gcc/config/riscv/riscv-builtins.cc @@ -113,6 +113,10 @@ AVAIL (crypto_zkne64, TARGET_ZKNE && TARGET_64BIT) AVAIL (crypto_zkne_or_zknd, (TARGET_ZKNE || TARGET_ZKND) && TARGET_64BIT) AVAIL (crypto_zknh32, TARGET_ZKNH && !TARGET_64BIT) AVAIL (crypto_zknh64, TARGET_ZKNH && TARGET_64BIT) +AVAIL (crypto_zksh32, TARGET_ZKSH && !TARGET_64BIT) +AVAIL (crypto_zksh64, TARGET_ZKSH && TARGET_64BIT) +AVAIL (crypto_zksed32, TARGET_ZKSED && !TARGET_64BIT) +AVAIL (crypto_zksed64, TARGET_ZKSED && TARGET_64BIT) AVAIL (always, (!0)) /* Construct a riscv_builtin_description from the given arguments. diff --git a/gcc/config/riscv/riscv-crypto.def b/gcc/config/riscv/riscv-crypto.def index 831ab8c0d01..7774b801aec 100644 --- a/gcc/config/riscv/riscv-crypto.def +++ b/gcc/config/riscv/riscv-crypto.def @@ -80,3 +80,15 @@ DIRECT_BUILTIN (sha512sig0, RISCV_DI_FTYPE_DI, crypto_zknh64), DIRECT_BUILTIN (sha512sig1, RISCV_DI_FTYPE_DI, crypto_zknh64), DIRECT_BUILTIN (sha512sum0, RISCV_DI_FTYPE_DI, crypto_zknh64), DIRECT_BUILTIN (sha512sum1, RISCV_DI_FTYPE_DI, crypto_zknh64), + +// ZKSH +RISCV_BUILTIN (sm3p0_si, "sm3p0", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, crypto_zksh32), +RISCV_BUILTIN (sm3p0_di, "sm3p0", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI, crypto_zksh64), +RISCV_BUILTIN (sm3p1_si, "sm3p1", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, crypto_zksh32), +RISCV_BUILTIN (sm3p1_di, "sm3p1", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI, crypto_zksh64), + +// ZKSED +RISCV_BUILTIN (sm4ed_si, "sm4ed", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI_SI_SI, crypto_zksed32), +RISCV_BUILTIN (sm4ed_di, "sm4ed", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI_DI_SI, crypto_zksed64), +RISCV_BUILTIN (sm4ks_si, "sm4ks", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI_SI_SI, crypto_zksed32), +RISCV_BUILTIN (sm4ks_di, "sm4ks", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI_DI_SI, crypto_zksed64), diff --git a/gcc/config/riscv/riscv_scalar_crypto.h b/gcc/config/riscv/riscv_scalar_crypto.h index 06e73a0169b..ba85483aa4a 100644 --- a/gcc/config/riscv/riscv_scalar_crypto.h +++ b/gcc/config/riscv/riscv_scalar_crypto.h @@ -196,3 +196,23 @@ static inline int64_t __riscv_sha512sum0(int64_t rs1) static inline int64_t __riscv_sha512sum1(int64_t rs1) { return _RVK_INTRIN_IMPL(sha512sum1)(rs1); } // SHA512SUM1 #endif + +// === (mapping) Zksed: ShangMi Suite: SM4 Block Cipher Instructions + +static inline long __riscv_sm4ks(long rs1, long rs2, int bs) + { return _RVK_INTRIN_IMPL(sm4ks)(rs1, rs2, bs); } // SM4KS + +static inline long __riscv_sm4ed(long rs1, long rs2, int bs) + { return _RVK_INTRIN_IMPL(sm4ed)(rs1, rs2, bs); } // SM4ED + +// === (mapping) Zksh: ShangMi Suite: SM3 Hash Function Instructions + +static inline long __riscv_sm3p0(long rs1) + { return _RVK_INTRIN_IMPL(sm3p0)(rs1); } // SM3P0 + +static inline long __riscv_sm3p1(long rs1) + { return _RVK_INTRIN_IMPL(sm3p1)(rs1); } // SM3P1 + +#ifdef __cplusplus +} +#endif diff --git a/gcc/testsuite/gcc.target/riscv/zksed.c b/gcc/testsuite/gcc.target/riscv/zksed.c new file mode 100644 index 00000000000..2c7a6ab4089 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zksed.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=rv64gc_zksed -mabi=lp64" } */ +/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */ + +#include"riscv_scalar_crypto.h" + +long foo1(long rs1, long rs2, int bs) +{ + return __riscv_sm4ks(rs1,rs2,bs); +} + +long foo2(long rs1, long rs2, int bs) +{ + return __riscv_sm4ed(rs1,rs2,bs); +} + + +/* { dg-final { scan-assembler-times "sm4ks" 1 } } */ +/* { dg-final { scan-assembler-times "sm4ed" 1 } } */ + diff --git a/gcc/testsuite/gcc.target/riscv/zksh.c b/gcc/testsuite/gcc.target/riscv/zksh.c new file mode 100644 index 00000000000..79485c7f3a9 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zksh.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=rv64gc_zksh -mabi=lp64" } */ +/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */ + +#include"riscv_scalar_crypto.h" + +long foo1(long rs1) +{ + return __riscv_sm3p0(rs1); +} + +long foo2(long rs1) +{ + return __riscv_sm3p1(rs1); +} + + +/* { dg-final { scan-assembler-times "sm3p0" 1 } } */ +/* { dg-final { scan-assembler-times "sm3p1" 1 } } */ -- 2.38.1.windows.1