From: Kito Cheng <kito.cheng@sifive.com>
To: gcc-patches@gcc.gnu.org, kito.cheng@gmail.com
Cc: Kito Cheng <kito.cheng@sifive.com>
Subject: [committed] RISC-V: Make the test condition more strict for gcc.target/riscv/_Float16-zhinxmin-1.c
Date: Wed, 22 Feb 2023 20:21:14 +0800 [thread overview]
Message-ID: <20230222122114.47958-1-kito.cheng@sifive.com> (raw)
LTO might generate random string for the section name, which might contain `mv`,
then might cause random false alarm.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/_Float16-zhinxmin-1.c: Tweak test
condition.
---
gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c
index 0070ebf616c..fa049db5b93 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c
@@ -5,6 +5,6 @@ _Float16 foo1 (_Float16 a, _Float16 b)
{
/* { dg-final { scan-assembler-not "fmv.h" } } */
/* { dg-final { scan-assembler-not "fmv.s" } } */
- /* { dg-final { scan-assembler-times "mv" 1 } } */
+ /* { dg-final { scan-assembler-times "mv\ta0" 1 } } */
return b;
}
--
2.37.2
reply other threads:[~2023-02-22 12:21 UTC|newest]
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