From: Lin Sinan <mynameisxiaou@gmail.com>
To: gcc-patches@gcc.gnu.org
Cc: philipp.tomsich@vrull.eu, kito.cheng@gmail.com,
palmer@dabbelt.com, andrew@sifive.com,
Lin Sinan <sinan.lin@linux.alibaba.com>
Subject: [PATCH] RISC-V: Fix wrong partial subreg check for bsetidisi
Date: Tue, 28 Feb 2023 13:00:36 +0800 [thread overview]
Message-ID: <20230228050036.30601-1-mynameisxiaou@gmail.com> (raw)
From: Lin Sinan <sinan.lin@linux.alibaba.com>
The partial subreg check should be for subreg operand(operand 1) instead of
the immediate operand(operand 2). This change also fix pr68648.c in zbs.
gcc/ChangeLog:
* config/riscv/bitmanip.md: Fix wrong index in the check.
---
gcc/config/riscv/bitmanip.md | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index 14d18edbe62..58a86bd929f 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -442,7 +442,7 @@
(ior:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r"))
(match_operand 2 "single_bit_mask_operand" "i")))]
"TARGET_ZBS && TARGET_64BIT
- && !partial_subreg_p (operands[2])"
+ && !partial_subreg_p (operands[1])"
"bseti\t%0,%1,%S2"
[(set_attr "type" "bitmanip")])
--
2.34.1
next reply other threads:[~2023-02-28 5:00 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-28 5:00 Lin Sinan [this message]
2023-02-28 5:12 ` Sinan Lin
2023-02-28 9:32 ` Philipp Tomsich
2023-03-05 9:27 ` Kito Cheng
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