From: juzhe.zhong@rivai.ai
To: gcc-patches@gcc.gnu.org
Cc: kito.cheng@gmail.com, rep.dot.nop@gmail.com,
Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
Subject: [PATCH V2] RISC-V: Add fault first load C/C++ support
Date: Thu, 9 Mar 2023 06:21:46 +0800 [thread overview]
Message-ID: <20230308222146.102045-1-juzhe.zhong@rivai.ai> (raw)
From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc: Remove magic number.
---
gcc/config/riscv/riscv-vector-builtins-bases.cc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc b/gcc/config/riscv/riscv-vector-builtins-bases.cc
index 9f87f8c645a..3f0f809c714 100644
--- a/gcc/config/riscv/riscv-vector-builtins-bases.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc
@@ -1617,7 +1617,7 @@ public:
====> vleff (const *base, size_t vl)
new_vl = MEM_REF[read_vl ()]. */
- auto_vec<tree, 8> vargs;
+ auto_vec<tree> vargs (gimple_call_num_args (f.call) - 1);
for (unsigned i = 0; i < gimple_call_num_args (f.call); i++)
{
--
2.36.3
reply other threads:[~2023-03-08 22:21 UTC|newest]
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